From 2eb2f8edd75e405783788d5c26d6c08e716bdc5a Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Fri, 9 Jun 2017 13:05:21 +1200 Subject: [PATCH 01/15] Use vector_table symbol for assignment of SCB_VTOR. --- src/platforms/native/platform.c | 3 ++- src/platforms/stlink/platform.c | 4 +++- src/platforms/swlink/platform.c | 4 +++- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/src/platforms/native/platform.c b/src/platforms/native/platform.c index d7686616..338cd857 100644 --- a/src/platforms/native/platform.c +++ b/src/platforms/native/platform.c @@ -161,7 +161,8 @@ void platform_init(void) GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0); } /* Relocate interrupt vector table here */ - SCB_VTOR = 0x2000; + extern int vector_table; + SCB_VTOR = (uint32_t)&vector_table; platform_timing_init(); cdcacm_init(); diff --git a/src/platforms/stlink/platform.c b/src/platforms/stlink/platform.c index 33f231c2..dcc14932 100644 --- a/src/platforms/stlink/platform.c +++ b/src/platforms/stlink/platform.c @@ -101,7 +101,9 @@ void platform_init(void) gpio_set_mode(LED_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, led_idle_run); - SCB_VTOR = 0x2000; /* Relocate interrupt vector table here */ + /* Relocate interrupt vector table here */ + extern int vector_table; + SCB_VTOR = (uint32_t)&vector_table; platform_timing_init(); cdcacm_init(); diff --git a/src/platforms/swlink/platform.c b/src/platforms/swlink/platform.c index 921e7e88..aace5a12 100644 --- a/src/platforms/swlink/platform.c +++ b/src/platforms/swlink/platform.c @@ -77,7 +77,9 @@ void platform_init(void) data |= AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP1; AFIO_MAPR = data; - SCB_VTOR = 0x2000; // Relocate interrupt vector table here + /* Relocate interrupt vector table here */ + extern int vector_table; + SCB_VTOR = (uint32_t)&vector_table; platform_timing_init(); cdcacm_init(); From 73ac700c6fdf2ba549fead791c60ae94949c4d7d Mon Sep 17 00:00:00 2001 From: Nicolas Schodet Date: Tue, 30 Jun 2015 15:29:27 +0200 Subject: [PATCH 02/15] Fix gdb.py to program last chunk of a memory range --- scripts/gdb.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/gdb.py b/scripts/gdb.py index ed0b4e26..eb28ed88 100644 --- a/scripts/gdb.py +++ b/scripts/gdb.py @@ -291,7 +291,7 @@ class Target: def flash_write_prepare(self, address, data): for m in self.mem: - if (address >= m.offset) and (address + len(data) < m.offset + m.length): + if (address >= m.offset) and (address + len(data) <= m.offset + m.length): m.prog(address, data) def flash_commit(self, progress_cb=None): From 680aa30d52e572808f39f4ac9aa57d8cca83d198 Mon Sep 17 00:00:00 2001 From: Nicolas Schodet Date: Mon, 29 May 2017 13:41:41 +0200 Subject: [PATCH 03/15] stm32f4: add support for STM32F4[67]9 --- src/target/stm32f4.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/target/stm32f4.c b/src/target/stm32f4.c index 5762e19a..e201ee42 100644 --- a/src/target/stm32f4.c +++ b/src/target/stm32f4.c @@ -173,6 +173,7 @@ bool stm32f4_probe(target *t) switch(idcode) { case ID_STM32F42X: /* 427/437 */ + case ID_STM32F46X: /* 469/479 */ /* Second bank for 2M parts. */ stm32f4_add_flash(t, 0x8100000, 0x10000, 0x4000, 12); stm32f4_add_flash(t, 0x8110000, 0x10000, 0x10000, 16); From 02ce5e23b62a83012f421eab7fb501f6927e73f9 Mon Sep 17 00:00:00 2001 From: Nicolas Schodet Date: Mon, 19 Jun 2017 10:56:20 +0200 Subject: [PATCH 04/15] stm32f4: fix typo in target name --- src/target/stm32f4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/target/stm32f4.c b/src/target/stm32f4.c index 5762e19a..b381bf64 100644 --- a/src/target/stm32f4.c +++ b/src/target/stm32f4.c @@ -216,7 +216,7 @@ bool stm32f4_probe(target *t) stm32f4_add_flash(t, 0x0200000, 0x20000, 0x8000, 0); stm32f4_add_flash(t, 0x0220000, 0x20000, 0x20000, 4); stm32f4_add_flash(t, 0x0240000, 0xC0000, 0x40000, 5); - target_add_commands(t, stm32f4_cmd_list, "STM32F4x"); + target_add_commands(t, stm32f4_cmd_list, "STM32F74x"); break; case ID_STM32F76X: /* F76x F77x RM0410 */ t->driver = stm32f7_driver_str; @@ -239,7 +239,7 @@ bool stm32f4_probe(target *t) stm32f4_add_flash(t, 0x8000000, 0x010000, 0x4000, 0); stm32f4_add_flash(t, 0x8010000, 0x010000, 0x10000, 4); stm32f4_add_flash(t, 0x8020000, 0x060000, 0x20000, 3); - target_add_commands(t, stm32f4_cmd_list, "STM32F76x"); + target_add_commands(t, stm32f4_cmd_list, "STM32F72x"); break; default: return false; From f036be8cb28e39a6f8f8399dc281a06a348f7437 Mon Sep 17 00:00:00 2001 From: Daniel Egger Date: Fri, 23 Jun 2017 21:52:13 +0200 Subject: [PATCH 05/15] Identify and support LPC1112/102 MCU as well Signed-off-by: Daniel Egger --- src/target/lpc11xx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/target/lpc11xx.c b/src/target/lpc11xx.c index e929d6ac..248e7ee7 100644 --- a/src/target/lpc11xx.c +++ b/src/target/lpc11xx.c @@ -89,6 +89,13 @@ lpc11xx_probe(target *t) target_add_ram(t, 0x10000000, 0x2000); lpc11xx_add_flash(t, 0x00000000, 0x20000, 0x1000); return true; + + case 0x0A24902B: + case 0x1A24902B: + t->driver = "LPC1112"; + target_add_ram(t, 0x10000000, 0x1000); + lpc11xx_add_flash(t, 0x00000000, 0x10000, 0x1000); + return true; } idcode = target_mem_read32(t, LPC8XX_DEVICE_ID); From 43ac4a04f7e765bc94444b14c8cfc5528cd3a255 Mon Sep 17 00:00:00 2001 From: nar0909 Date: Tue, 4 Jul 2017 12:32:39 +1000 Subject: [PATCH 06/15] New Device Id update - QFAA G1 New device Id - for NRF51822 QFAA G1 1529AM. --- src/target/nrf51.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/target/nrf51.c b/src/target/nrf51.c index 2e361c62..d193d596 100644 --- a/src/target/nrf51.c +++ b/src/target/nrf51.c @@ -112,6 +112,7 @@ bool nrf51_probe(target *t) case 0x0020: /* nRF51822 (rev 1) CEAA BA */ case 0x0024: /* nRF51422 (rev 1) QFAA C0 */ case 0x002A: /* nRF51822 (rev 2) QFAA FA0 */ + case 0x004A: /* nRF51822 (rev 3) QFAA G1 */ case 0x002D: /* nRF51422 (rev 2) QFAA DAA */ case 0x002E: /* nRF51422 (rev 2) QFAA E0 */ case 0x002F: /* nRF51822 (rev 1) CEAA B0 */ From 3846ea47084d8f6a9ef4a5ac43a367bc7e84c1fd Mon Sep 17 00:00:00 2001 From: Nicolas Schodet Date: Fri, 16 Jun 2017 14:39:57 +0200 Subject: [PATCH 07/15] stm32f4: allow selection of flash programming parallelism --- src/target/stm32f4.c | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/src/target/stm32f4.c b/src/target/stm32f4.c index 29dcd1e9..31bc3af2 100644 --- a/src/target/stm32f4.c +++ b/src/target/stm32f4.c @@ -37,10 +37,12 @@ static bool stm32f4_cmd_erase_mass(target *t); static bool stm32f4_cmd_option(target *t, int argc, char *argv[]); +static bool stm32f4_cmd_psize(target *t, int argc, char *argv[]); const struct command_s stm32f4_cmd_list[] = { {"erase_mass", (cmd_handler)stm32f4_cmd_erase_mass, "Erase entire flash memory"}, {"option", (cmd_handler)stm32f4_cmd_option, "Manipulate option bytes"}, + {"psize", (cmd_handler)stm32f4_cmd_psize, "Configure flash write parallelism: (x8|x32)"}, {NULL, NULL, NULL} }; @@ -123,6 +125,7 @@ static const uint16_t stm32f4_flash_write_x8_stub[] = { struct stm32f4_flash { struct target_flash f; uint8_t base_sector; + uint8_t psize; }; static void stm32f4_add_flash(target *t, @@ -139,6 +142,7 @@ static void stm32f4_add_flash(target *t, f->align = 4; f->erased = 0xff; sf->base_sector = base_sector; + sf->psize = 32; target_add_flash(t, f); } @@ -273,8 +277,12 @@ static int stm32f4_flash_write(struct target_flash *f, } /* Write buffer to target ram call stub */ - target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_x8_stub, - sizeof(stm32f4_flash_write_x8_stub)); + if (((struct stm32f4_flash *)f)->psize == 32) + target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_x32_stub, + sizeof(stm32f4_flash_write_x32_stub)); + else + target_mem_write(f->t, SRAM_BASE, stm32f4_flash_write_x8_stub, + sizeof(stm32f4_flash_write_x8_stub)); target_mem_write(f->t, STUB_BUFFER_BASE, src, len); return cortexm_run_stub(f->t, SRAM_BASE, dest, STUB_BUFFER_BASE, len, 0); @@ -362,3 +370,33 @@ static bool stm32f4_cmd_option(target *t, int argc, char *argv[]) } return true; } + +static bool stm32f4_cmd_psize(target *t, int argc, char *argv[]) +{ + if (argc == 1) { + uint8_t psize = 8; + for (struct target_flash *f = t->flash; f; f = f->next) { + if (f->write == stm32f4_flash_write) { + psize = ((struct stm32f4_flash *)f)->psize; + } + } + tc_printf(t, "Flash write parallelism: %s\n", + psize == 32 ? "x32" : "x8"); + } else { + uint8_t psize; + if (!strcmp(argv[1], "x8")) { + psize = 8; + } else if (!strcmp(argv[1], "x32")) { + psize = 32; + } else { + tc_printf(t, "usage: monitor psize (x8|x32)\n"); + return false; + } + for (struct target_flash *f = t->flash; f; f = f->next) { + if (f->write == stm32f4_flash_write) { + ((struct stm32f4_flash *)f)->psize = psize; + } + } + } + return true; +} From a0b0b8a7160559e6206bd348e00d1f6419567dfe Mon Sep 17 00:00:00 2001 From: Chris Pavlina Date: Fri, 21 Jul 2017 13:29:41 -0600 Subject: [PATCH 08/15] lm3s/tm4c: add TM4C1230C3PM --- src/target/lmi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/target/lmi.c b/src/target/lmi.c index 7f3aa0f3..ed54d57a 100644 --- a/src/target/lmi.c +++ b/src/target/lmi.c @@ -89,6 +89,13 @@ bool lmi_probe(target *t) * only use the AIRCR SYSRESETREQ. */ t->target_options |= CORTEXM_TOPT_INHIBIT_SRST; return true; + + case 0x1022: /* TM4C1230C3PM */ + t->driver = lmi_driver_str; + target_add_ram(t, 0x20000000, 0x6000); + lmi_add_flash(t, 0x10000); + t->target_options |= CORTEXM_TOPT_INHIBIT_SRST; + return true; } return false; } From 1be9c6e9c5afe3e4b2fe680876e6091ef0309d18 Mon Sep 17 00:00:00 2001 From: Uwe Bonnes Date: Sun, 25 Jun 2017 15:18:08 +0200 Subject: [PATCH 09/15] stm32_mem.py: Set address before writing to inhibit bootloader overwrite. --- scripts/stm32_mem.py | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/scripts/stm32_mem.py b/scripts/stm32_mem.py index 9f2e2287..780da327 100755 --- a/scripts/stm32_mem.py +++ b/scripts/stm32_mem.py @@ -39,6 +39,16 @@ def stm32_erase(dev, addr): if status.bState == dfu.STATE_DFU_DOWNLOAD_IDLE: break +def stm32_set_address(dev, addr): + set_address_cmd = struct.pack(" Date: Mon, 28 Aug 2017 22:40:43 +0200 Subject: [PATCH 10/15] STM32F0: Several STM32F0[3|7]0 have same ID as other STM32F0X0. --- src/target/stm32f1.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/src/target/stm32f1.c b/src/target/stm32f1.c index 3c723845..c9823db3 100644 --- a/src/target/stm32f1.c +++ b/src/target/stm32f1.c @@ -25,6 +25,11 @@ * ST doc - RM0008 * Reference manual - STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx * and STM32F107xx advanced ARM-based 32-bit MCUs + * ST doc - RM0091 + * Reference manual - STM32F0x1/STM32F0x2/STM32F0x8 + * advanced ARM®-based 32-bit MCUs + * ST doc - RM0360 + * Reference manual - STM32F030x4/x6/x8/xC and STM32F070x6/xB * ST doc - PM0075 * Programming manual - STM32F10xxx Flash memory microcontrollers */ @@ -145,21 +150,21 @@ bool stm32f1_probe(target *t) t->idcode = target_mem_read32(t, DBGMCU_IDCODE_F0) & 0xfff; switch(t->idcode) { - case 0x444: /* STM32F03 RM0091 Rev.7 */ + case 0x444: /* STM32F03 RM0091 Rev.7, STM32F030x[4|6] RM0360 Rev. 4*/ t->driver = "STM32F03"; break; - case 0x445: /* STM32F04 RM0091 Rev.7 */ - t->driver = "STM32F04"; + case 0x445: /* STM32F04 RM0091 Rev.7, STM32F070x6 RM0360 Rev. 4*/ + t->driver = "STM32F04/F070x6"; break; - case 0x440: /* STM32F05 RM0091 Rev.7 */ - t->driver = "STM32F05"; + case 0x440: /* STM32F05 RM0091 Rev.7, STM32F030x8 RM0360 Rev. 4*/ + t->driver = "STM32F05/F030x8"; break; - case 0x448: /* STM32F07 RM0091 Rev.7 */ + case 0x448: /* STM32F07 RM0091 Rev.7, STM32F070xB RM0360 Rev. 4*/ t->driver = "STM32F07"; block_size = 0x800; break; - case 0x442: /* STM32F09 RM0091 Rev.7 */ - t->driver = "STM32F09"; + case 0x442: /* STM32F09 RM0091 Rev.7, STM32F030xC RM0360 Rev. 4*/ + t->driver = "STM32F09/F030xC"; block_size = 0x800; break; default: /* NONE */ From 37f9623de261c68a49274a23771803b381103550 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Carl=20Sandstr=C3=B6m?= Date: Wed, 30 Aug 2017 17:14:52 +0200 Subject: [PATCH 11/15] Added NRF51_FICR_CONFIGID for nRF51822 QFAA H2 --- src/target/nrf51.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/target/nrf51.c b/src/target/nrf51.c index d193d596..6a46823e 100644 --- a/src/target/nrf51.c +++ b/src/target/nrf51.c @@ -129,6 +129,7 @@ bool nrf51_probe(target *t) case 0x0079: /* nRF51822 (rev 3) CEAA E0 */ case 0x007A: /* nRF51422 (rev 3) CEAA C0 */ case 0x008F: /* nRF51822 (rev 3) QFAA H1 See https://devzone.nordicsemi.com/question/97769/can-someone-conform-the-config-id-code-for-the-nrf51822qfaah1/ */ + case 0x00D1: /* nRF51822 (rev 3) QFAA H2 */ t->driver = "Nordic nRF51"; target_add_ram(t, 0x20000000, 0x4000); nrf51_add_flash(t, 0x00000000, 0x40000, NRF51_PAGE_SIZE); From 46e363393ffad93a39a0f646ef020e8bae282ed9 Mon Sep 17 00:00:00 2001 From: "David R. Piegdon" Date: Sun, 3 Sep 2017 23:05:29 +0000 Subject: [PATCH 12/15] Add nRF52840 support (PCA10056, nrf52840 PDK) --- src/target/nrf51.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/target/nrf51.c b/src/target/nrf51.c index 6a46823e..91f1d43f 100644 --- a/src/target/nrf51.c +++ b/src/target/nrf51.c @@ -164,13 +164,20 @@ bool nrf51_probe(target *t) target_add_commands(t, nrf51_cmd_list, "nRF51"); return true; case 0x00AC: /* nRF52832 Preview QFAA BA0 */ - case 0x00C7: /* nRF52832 Revision 1 QFAA B00 */ + case 0x00C7: /* nRF52832 Revision 1 QFAA B00 */ t->driver = "Nordic nRF52"; target_add_ram(t, 0x20000000, 64*1024); nrf51_add_flash(t, 0x00000000, 512*1024, NRF52_PAGE_SIZE); nrf51_add_flash(t, NRF51_UICR, 0x100, 0x100); target_add_commands(t, nrf51_cmd_list, "nRF52"); return true; + case 0x00EB: /* nRF52840 Preview QIAA AA0 */ + t->driver = "Nordic nRF52"; + target_add_ram(t, 0x20000000, 256*1024); + nrf51_add_flash(t, 0x00000000, 1024*1024, NRF52_PAGE_SIZE); + nrf51_add_flash(t, NRF51_UICR, 0x100, 0x100); + target_add_commands(t, nrf51_cmd_list, "nRF52"); + return true; } return false; From 41025f55ea189250943fb3f62cd387a67a59291f Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Wed, 6 Sep 2017 11:01:43 +1200 Subject: [PATCH 13/15] Specify Trusty for Travis build --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index 0512f661..09b6db04 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,3 +1,4 @@ +dist: trusty sudo: required before_install: From d33a8e31b4fc6a0c6b121f28c68176e845a3c513 Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Wed, 6 Sep 2017 14:33:40 +1200 Subject: [PATCH 14/15] Run pip without sudo --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 09b6db04..e7132beb 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,7 +5,7 @@ before_install: - sudo add-apt-repository -y ppa:team-gcc-arm-embedded/ppa - sudo apt-get update -qq - sudo apt-get install -y build-essential libftdi-dev gcc-arm-embedded - - sudo pip install intelhex + - pip install intelhex install: true From 4af7a0524985fe517aaac3d81cb8eb861be9098e Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Tue, 12 Sep 2017 12:55:02 +1200 Subject: [PATCH 15/15] Travis: Call pip with `--user` --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index e7132beb..c879677d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,7 +5,7 @@ before_install: - sudo add-apt-repository -y ppa:team-gcc-arm-embedded/ppa - sudo apt-get update -qq - sudo apt-get install -y build-essential libftdi-dev gcc-arm-embedded - - pip install intelhex + - pip install --user intelhex install: true