diff --git a/Makefile b/Makefile index c7391f07..139d295e 100644 --- a/Makefile +++ b/Makefile @@ -25,7 +25,7 @@ LIBDIR = $(DESTDIR)/$(PREFIX)/lib SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts INSTALL = install -TARGETS = stm32 lpc13xx lm3s +TARGETS = stm32f1 stm32f2 lpc13xx lm3s # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) diff --git a/examples/lm3s/Makefile.include b/examples/lm3s/Makefile.include index 24248325..0eafe7d3 100644 --- a/examples/lm3s/Makefile.include +++ b/examples/lm3s/Makefile.include @@ -25,7 +25,7 @@ LD = $(PREFIX)-gcc OBJCOPY = $(PREFIX)-objcopy OBJDUMP = $(PREFIX)-objdump # Uncomment this line if you want to use the installed (not local) library. -# TOOLCHAIN_DIR = `dirname \`which $(CC)\``/../$(PREFIX) +# TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) TOOLCHAIN_DIR = ../../../.. CFLAGS += -O0 -g3 -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ -mcpu=cortex-m3 -mthumb -MD diff --git a/examples/lpc13xx/Makefile.include b/examples/lpc13xx/Makefile.include index fe2c3ba0..948d6c45 100644 --- a/examples/lpc13xx/Makefile.include +++ b/examples/lpc13xx/Makefile.include @@ -25,7 +25,7 @@ LD = $(PREFIX)-gcc OBJCOPY = $(PREFIX)-objcopy OBJDUMP = $(PREFIX)-objdump # Uncomment this line if you want to use the installed (not local) library. -# TOOLCHAIN_DIR = `dirname \`which $(CC)\``/../$(PREFIX) +# TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) TOOLCHAIN_DIR = ../../../.. CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ -mcpu=cortex-m3 -mthumb -MD diff --git a/examples/stm32/Makefile.include b/examples/stm32f1/Makefile.include similarity index 83% rename from examples/stm32/Makefile.include rename to examples/stm32f1/Makefile.include index a4512e9a..2edd2552 100644 --- a/examples/stm32/Makefile.include +++ b/examples/stm32f1/Makefile.include @@ -24,14 +24,13 @@ CC = $(PREFIX)-gcc LD = $(PREFIX)-gcc OBJCOPY = $(PREFIX)-objcopy OBJDUMP = $(PREFIX)-objdump -GDB = $(PREFIX)-gdb # Uncomment this line if you want to use the installed (not local) library. -# TOOLCHAIN_DIR = `dirname \`which $(CC)\``/../$(PREFIX) +#TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) TOOLCHAIN_DIR = ../../../.. CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \ - -fno-common -mcpu=cortex-m3 -mthumb -msoft-float -MD + -fno-common -mcpu=cortex-m3 -mthumb -msoft-float -MD -DSTM32F1 LDSCRIPT = $(BINARY).ld -LDFLAGS += -lc -lnosys -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/stm32 \ +LDFLAGS += -lc -lnosys -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/stm32f1 \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \ -mthumb -march=armv7 -mfix-cortex-m3-ldrd -msoft-float OBJS += $(BINARY).o @@ -39,9 +38,6 @@ OBJS += $(BINARY).o OOCD ?= openocd OOCD_INTERFACE ?= flossjtag OOCD_BOARD ?= olimex_stm32_h103 -# Black magic probe specific variables -# Set the BMP_PORT to a serial port and then BMP is used for flashing -BMP_PORT ?= # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) @@ -79,9 +75,9 @@ flash: $(BINARY).flash @#printf " OBJDUMP $(*).list\n" $(Q)$(OBJDUMP) -S $(*).elf > $(*).list -%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32/libopencm3_stm32.a +%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f1/libopencm3_stm32f1.a @#printf " LD $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32 $(LDFLAGS) + $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32f1 $(LDFLAGS) %.o: %.c Makefile @#printf " CC $(subst $(shell pwd)/,,$(@))\n" @@ -96,7 +92,6 @@ clean: $(Q)rm -f *.srec $(Q)rm -f *.list -ifeq ($(BMP_PORT),) ifeq ($(OOCD_SERIAL),) %.flash: %.hex @printf " FLASH $<\n" @@ -121,14 +116,6 @@ else -c "reset" \ -c "shutdown" $(NULL) endif -else -%.flash: %.elf - @echo " GDB $(*).elf (flash)" - $(Q)$(GDB) --batch \ - -ex 'target extended-remote $(BMP_PORT)' \ - -x $(TOOLCHAIN_DIR)/scripts/black_magic_probe_flash.scr \ - $(*).elf -endif .PHONY: images clean diff --git a/examples/stm32/lisa-m/fancyblink/Makefile b/examples/stm32f1/lisa-m/fancyblink/Makefile similarity index 100% rename from examples/stm32/lisa-m/fancyblink/Makefile rename to examples/stm32f1/lisa-m/fancyblink/Makefile diff --git a/examples/stm32/lisa-m/fancyblink/fancyblink.c b/examples/stm32f1/lisa-m/fancyblink/fancyblink.c similarity index 96% rename from examples/stm32/lisa-m/fancyblink/fancyblink.c rename to examples/stm32f1/lisa-m/fancyblink/fancyblink.c index 5987bdf2..6d5fbe3a 100644 --- a/examples/stm32/lisa-m/fancyblink/fancyblink.c +++ b/examples/stm32f1/lisa-m/fancyblink/fancyblink.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set STM32 to 72 MHz. */ void clock_setup(void) diff --git a/examples/stm32/stm32-h103/fancyblink/fancyblink.ld b/examples/stm32f1/lisa-m/fancyblink/fancyblink.ld similarity index 97% rename from examples/stm32/stm32-h103/fancyblink/fancyblink.ld rename to examples/stm32f1/lisa-m/fancyblink/fancyblink.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/fancyblink/fancyblink.ld +++ b/examples/stm32f1/lisa-m/fancyblink/fancyblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/lisa-m/usb_dfu/Makefile b/examples/stm32f1/lisa-m/usb_dfu/Makefile similarity index 100% rename from examples/stm32/lisa-m/usb_dfu/Makefile rename to examples/stm32f1/lisa-m/usb_dfu/Makefile diff --git a/examples/stm32/lisa-m/usb_dfu/README b/examples/stm32f1/lisa-m/usb_dfu/README similarity index 100% rename from examples/stm32/lisa-m/usb_dfu/README rename to examples/stm32f1/lisa-m/usb_dfu/README diff --git a/examples/stm32/stm32-h103/usb_dfu/usbdfu.c b/examples/stm32f1/lisa-m/usb_dfu/usbdfu.c similarity index 97% rename from examples/stm32/stm32-h103/usb_dfu/usbdfu.c rename to examples/stm32f1/lisa-m/usb_dfu/usbdfu.c index 7ffbc745..9d184f16 100644 --- a/examples/stm32/stm32-h103/usb_dfu/usbdfu.c +++ b/examples/stm32f1/lisa-m/usb_dfu/usbdfu.c @@ -18,10 +18,10 @@ */ #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include diff --git a/examples/stm32/lisa-m/usb_dfu/usbdfu.ld b/examples/stm32f1/lisa-m/usb_dfu/usbdfu.ld similarity index 96% rename from examples/stm32/lisa-m/usb_dfu/usbdfu.ld rename to examples/stm32f1/lisa-m/usb_dfu/usbdfu.ld index 54e5dac7..6a01797d 100644 --- a/examples/stm32/lisa-m/usb_dfu/usbdfu.ld +++ b/examples/stm32f1/lisa-m/usb_dfu/usbdfu.ld @@ -25,5 +25,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/lisa-m/usb_hid/Makefile b/examples/stm32f1/lisa-m/usb_hid/Makefile similarity index 100% rename from examples/stm32/lisa-m/usb_hid/Makefile rename to examples/stm32f1/lisa-m/usb_hid/Makefile diff --git a/examples/stm32/lisa-m/usb_hid/README b/examples/stm32f1/lisa-m/usb_hid/README similarity index 100% rename from examples/stm32/lisa-m/usb_hid/README rename to examples/stm32f1/lisa-m/usb_hid/README diff --git a/examples/stm32/lisa-m/usb_hid/usbhid.c b/examples/stm32f1/lisa-m/usb_hid/usbhid.c similarity index 98% rename from examples/stm32/lisa-m/usb_hid/usbhid.c rename to examples/stm32f1/lisa-m/usb_hid/usbhid.c index f42454bf..cd9d97dc 100644 --- a/examples/stm32/lisa-m/usb_hid/usbhid.c +++ b/examples/stm32f1/lisa-m/usb_hid/usbhid.c @@ -19,8 +19,8 @@ */ #include -#include -#include +#include +#include #include #include #include @@ -30,7 +30,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/stm32-h103/usb_hid/usbhid.ld b/examples/stm32f1/lisa-m/usb_hid/usbhid.ld similarity index 97% rename from examples/stm32/stm32-h103/usb_hid/usbhid.ld rename to examples/stm32f1/lisa-m/usb_hid/usbhid.ld index 928c898a..d0df9e64 100644 --- a/examples/stm32/stm32-h103/usb_hid/usbhid.ld +++ b/examples/stm32f1/lisa-m/usb_hid/usbhid.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/mb525/fancyblink/Makefile b/examples/stm32f1/mb525/fancyblink/Makefile similarity index 100% rename from examples/stm32/mb525/fancyblink/Makefile rename to examples/stm32f1/mb525/fancyblink/Makefile diff --git a/examples/stm32/mb525/fancyblink/README b/examples/stm32f1/mb525/fancyblink/README similarity index 100% rename from examples/stm32/mb525/fancyblink/README rename to examples/stm32f1/mb525/fancyblink/README diff --git a/examples/stm32/mb525/fancyblink/fancyblink.c b/examples/stm32f1/mb525/fancyblink/fancyblink.c similarity index 96% rename from examples/stm32/mb525/fancyblink/fancyblink.c rename to examples/stm32f1/mb525/fancyblink/fancyblink.c index e9a35646..54ef47c3 100644 --- a/examples/stm32/mb525/fancyblink/fancyblink.c +++ b/examples/stm32f1/mb525/fancyblink/fancyblink.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include void clock_setup(void) { diff --git a/examples/stm32/mb525/fancyblink/fancyblink.ld b/examples/stm32f1/mb525/fancyblink/fancyblink.ld similarity index 97% rename from examples/stm32/mb525/fancyblink/fancyblink.ld rename to examples/stm32f1/mb525/fancyblink/fancyblink.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/mb525/fancyblink/fancyblink.ld +++ b/examples/stm32f1/mb525/fancyblink/fancyblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/mb525/pwmleds/Makefile b/examples/stm32f1/mb525/pwmleds/Makefile similarity index 100% rename from examples/stm32/mb525/pwmleds/Makefile rename to examples/stm32f1/mb525/pwmleds/Makefile diff --git a/examples/stm32/mb525/pwmleds/README b/examples/stm32f1/mb525/pwmleds/README similarity index 100% rename from examples/stm32/mb525/pwmleds/README rename to examples/stm32f1/mb525/pwmleds/README diff --git a/examples/stm32/mb525/pwmleds/pwmleds.c b/examples/stm32f1/mb525/pwmleds/pwmleds.c similarity index 99% rename from examples/stm32/mb525/pwmleds/pwmleds.c rename to examples/stm32f1/mb525/pwmleds/pwmleds.c index 393928f3..55052312 100644 --- a/examples/stm32/mb525/pwmleds/pwmleds.c +++ b/examples/stm32f1/mb525/pwmleds/pwmleds.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include // #define COMPARE diff --git a/examples/stm32/mb525/pwmleds/pwmleds.ld b/examples/stm32f1/mb525/pwmleds/pwmleds.ld similarity index 97% rename from examples/stm32/mb525/pwmleds/pwmleds.ld rename to examples/stm32f1/mb525/pwmleds/pwmleds.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/mb525/pwmleds/pwmleds.ld +++ b/examples/stm32f1/mb525/pwmleds/pwmleds.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/can/Makefile b/examples/stm32f1/obldc/can/Makefile similarity index 100% rename from examples/stm32/obldc/can/Makefile rename to examples/stm32f1/obldc/can/Makefile diff --git a/examples/stm32/obldc/can/can.c b/examples/stm32f1/obldc/can/can.c similarity index 97% rename from examples/stm32/obldc/can/can.c rename to examples/stm32f1/obldc/can/can.c index 6c63c484..00a05dca 100644 --- a/examples/stm32/obldc/can/can.c +++ b/examples/stm32f1/obldc/can/can.c @@ -18,9 +18,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include #include diff --git a/examples/stm32/obldc/can/can.ld b/examples/stm32f1/obldc/can/can.ld similarity index 97% rename from examples/stm32/obldc/can/can.ld rename to examples/stm32f1/obldc/can/can.ld index c0765211..4f609a88 100644 --- a/examples/stm32/obldc/can/can.ld +++ b/examples/stm32f1/obldc/can/can.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/led/Makefile b/examples/stm32f1/obldc/led/Makefile similarity index 100% rename from examples/stm32/obldc/led/Makefile rename to examples/stm32f1/obldc/led/Makefile diff --git a/examples/stm32/obldc/led/led.c b/examples/stm32f1/obldc/led/led.c similarity index 96% rename from examples/stm32/obldc/led/led.c rename to examples/stm32f1/obldc/led/led.c index 09ae89de..db479b22 100644 --- a/examples/stm32/obldc/led/led.c +++ b/examples/stm32f1/obldc/led/led.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set STM32 to 72 MHz. */ void clock_setup(void) diff --git a/examples/stm32/obldc/led/led.ld b/examples/stm32f1/obldc/led/led.ld similarity index 97% rename from examples/stm32/obldc/led/led.ld rename to examples/stm32f1/obldc/led/led.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/obldc/led/led.ld +++ b/examples/stm32f1/obldc/led/led.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/pwmleds/Makefile b/examples/stm32f1/obldc/pwmleds/Makefile similarity index 100% rename from examples/stm32/obldc/pwmleds/Makefile rename to examples/stm32f1/obldc/pwmleds/Makefile diff --git a/examples/stm32/obldc/pwmleds/pwmleds.c b/examples/stm32f1/obldc/pwmleds/pwmleds.c similarity index 99% rename from examples/stm32/obldc/pwmleds/pwmleds.c rename to examples/stm32f1/obldc/pwmleds/pwmleds.c index 146bb568..faa9aa07 100644 --- a/examples/stm32/obldc/pwmleds/pwmleds.c +++ b/examples/stm32f1/obldc/pwmleds/pwmleds.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include // #define COMPARE diff --git a/examples/stm32/obldc/pwmleds/pwmleds.ld b/examples/stm32f1/obldc/pwmleds/pwmleds.ld similarity index 97% rename from examples/stm32/obldc/pwmleds/pwmleds.ld rename to examples/stm32f1/obldc/pwmleds/pwmleds.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/obldc/pwmleds/pwmleds.ld +++ b/examples/stm32f1/obldc/pwmleds/pwmleds.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/systick/Makefile b/examples/stm32f1/obldc/systick/Makefile similarity index 100% rename from examples/stm32/obldc/systick/Makefile rename to examples/stm32f1/obldc/systick/Makefile diff --git a/examples/stm32/obldc/systick/systick.c b/examples/stm32f1/obldc/systick/systick.c similarity index 95% rename from examples/stm32/obldc/systick/systick.c rename to examples/stm32f1/obldc/systick/systick.c index 3d75c4aa..263230f8 100644 --- a/examples/stm32/obldc/systick/systick.c +++ b/examples/stm32f1/obldc/systick/systick.c @@ -18,9 +18,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include diff --git a/examples/stm32/obldc/systick/systick.ld b/examples/stm32f1/obldc/systick/systick.ld similarity index 97% rename from examples/stm32/obldc/systick/systick.ld rename to examples/stm32f1/obldc/systick/systick.ld index da4f2b37..a3195d22 100644 --- a/examples/stm32/obldc/systick/systick.ld +++ b/examples/stm32f1/obldc/systick/systick.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/usart/Makefile b/examples/stm32f1/obldc/usart/Makefile similarity index 100% rename from examples/stm32/obldc/usart/Makefile rename to examples/stm32f1/obldc/usart/Makefile diff --git a/examples/stm32/obldc/usart/usart.c b/examples/stm32f1/obldc/usart/usart.c similarity index 95% rename from examples/stm32/obldc/usart/usart.c rename to examples/stm32f1/obldc/usart/usart.c index ea5ec0e6..b2efe71d 100644 --- a/examples/stm32/obldc/usart/usart.c +++ b/examples/stm32f1/obldc/usart/usart.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include void clock_setup(void) @@ -47,7 +47,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_RE_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 230400); + usart_set_baudrate(USART1, 230400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX); diff --git a/examples/stm32/obldc/usart/usart.ld b/examples/stm32f1/obldc/usart/usart.ld similarity index 97% rename from examples/stm32/obldc/usart/usart.ld rename to examples/stm32f1/obldc/usart/usart.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/obldc/usart/usart.ld +++ b/examples/stm32f1/obldc/usart/usart.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/obldc/usart_irq/Makefile b/examples/stm32f1/obldc/usart_irq/Makefile similarity index 100% rename from examples/stm32/obldc/usart_irq/Makefile rename to examples/stm32f1/obldc/usart_irq/Makefile diff --git a/examples/stm32/obldc/usart_irq/usart_irq.c b/examples/stm32f1/obldc/usart_irq/usart_irq.c similarity index 96% rename from examples/stm32/obldc/usart_irq/usart_irq.c rename to examples/stm32f1/obldc/usart_irq/usart_irq.c index 82320c1a..20ff0a14 100644 --- a/examples/stm32/obldc/usart_irq/usart_irq.c +++ b/examples/stm32f1/obldc/usart_irq/usart_irq.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include #include @@ -52,7 +52,7 @@ void usart_setup(void) GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RE_RX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 230400); + usart_set_baudrate(USART1, 230400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_parity(USART1, USART_PARITY_NONE); diff --git a/examples/stm32/obldc/usart_irq/usart_irq.ld b/examples/stm32f1/obldc/usart_irq/usart_irq.ld similarity index 97% rename from examples/stm32/obldc/usart_irq/usart_irq.ld rename to examples/stm32f1/obldc/usart_irq/usart_irq.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/obldc/usart_irq/usart_irq.ld +++ b/examples/stm32f1/obldc/usart_irq/usart_irq.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/adc_temperature_sensor/Makefile b/examples/stm32f1/other/adc_temperature_sensor/Makefile similarity index 100% rename from examples/stm32/other/adc_temperature_sensor/Makefile rename to examples/stm32f1/other/adc_temperature_sensor/Makefile diff --git a/examples/stm32/other/adc_temperature_sensor/README b/examples/stm32f1/other/adc_temperature_sensor/README similarity index 100% rename from examples/stm32/other/adc_temperature_sensor/README rename to examples/stm32f1/other/adc_temperature_sensor/README diff --git a/examples/stm32/other/adc_temperature_sensor/adc.c b/examples/stm32f1/other/adc_temperature_sensor/adc.c similarity index 95% rename from examples/stm32/other/adc_temperature_sensor/adc.c rename to examples/stm32f1/other/adc_temperature_sensor/adc.c index 6c0e828e..a87909cd 100644 --- a/examples/stm32/other/adc_temperature_sensor/adc.c +++ b/examples/stm32f1/other/adc_temperature_sensor/adc.c @@ -17,11 +17,11 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include +#include #include -#include void usart_setup(void) { @@ -34,7 +34,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 115200); + usart_set_baudrate(USART1, 115200, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX_RX); diff --git a/examples/stm32/other/adc_temperature_sensor/adc.ld b/examples/stm32f1/other/adc_temperature_sensor/adc.ld similarity index 97% rename from examples/stm32/other/adc_temperature_sensor/adc.ld rename to examples/stm32f1/other/adc_temperature_sensor/adc.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/adc_temperature_sensor/adc.ld +++ b/examples/stm32f1/other/adc_temperature_sensor/adc.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/dma_mem2mem/Makefile b/examples/stm32f1/other/dma_mem2mem/Makefile similarity index 100% rename from examples/stm32/other/dma_mem2mem/Makefile rename to examples/stm32f1/other/dma_mem2mem/Makefile diff --git a/examples/stm32/other/dma_mem2mem/README b/examples/stm32f1/other/dma_mem2mem/README similarity index 100% rename from examples/stm32/other/dma_mem2mem/README rename to examples/stm32f1/other/dma_mem2mem/README diff --git a/examples/stm32/other/dma_mem2mem/dma.c b/examples/stm32f1/other/dma_mem2mem/dma.c similarity index 94% rename from examples/stm32/other/dma_mem2mem/dma.c rename to examples/stm32f1/other/dma_mem2mem/dma.c index e43fe0df..03894120 100644 --- a/examples/stm32/other/dma_mem2mem/dma.c +++ b/examples/stm32f1/other/dma_mem2mem/dma.c @@ -17,11 +17,11 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include +#include #include -#include void usart_setup(void) { @@ -34,7 +34,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 115200); + usart_set_baudrate(USART1, 115200, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX_RX); diff --git a/examples/stm32/other/dma_mem2mem/dma.ld b/examples/stm32f1/other/dma_mem2mem/dma.ld similarity index 97% rename from examples/stm32/other/dma_mem2mem/dma.ld rename to examples/stm32f1/other/dma_mem2mem/dma.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/dma_mem2mem/dma.ld +++ b/examples/stm32f1/other/dma_mem2mem/dma.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/dogm128/Makefile b/examples/stm32f1/other/dogm128/Makefile similarity index 100% rename from examples/stm32/other/dogm128/Makefile rename to examples/stm32f1/other/dogm128/Makefile diff --git a/examples/stm32/other/dogm128/README b/examples/stm32f1/other/dogm128/README similarity index 100% rename from examples/stm32/other/dogm128/README rename to examples/stm32f1/other/dogm128/README diff --git a/examples/stm32/other/dogm128/dogm128.c b/examples/stm32f1/other/dogm128/dogm128.c similarity index 100% rename from examples/stm32/other/dogm128/dogm128.c rename to examples/stm32f1/other/dogm128/dogm128.c diff --git a/examples/stm32/other/dogm128/dogm128.h b/examples/stm32f1/other/dogm128/dogm128.h similarity index 98% rename from examples/stm32/other/dogm128/dogm128.h rename to examples/stm32f1/other/dogm128/dogm128.h index ed514abf..de432255 100644 --- a/examples/stm32/other/dogm128/dogm128.h +++ b/examples/stm32f1/other/dogm128/dogm128.h @@ -21,7 +21,7 @@ #define DOGM128_H #include -#include +#include #include /* PB10 GPIO - ~RESET diff --git a/examples/stm32/other/dogm128/main.c b/examples/stm32f1/other/dogm128/main.c similarity index 97% rename from examples/stm32/other/dogm128/main.c rename to examples/stm32f1/other/dogm128/main.c index b12a36d8..508971ed 100644 --- a/examples/stm32/other/dogm128/main.c +++ b/examples/stm32f1/other/dogm128/main.c @@ -17,9 +17,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include #include diff --git a/examples/stm32/other/dogm128/main.ld b/examples/stm32f1/other/dogm128/main.ld similarity index 97% rename from examples/stm32/other/dogm128/main.ld rename to examples/stm32f1/other/dogm128/main.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/dogm128/main.ld +++ b/examples/stm32f1/other/dogm128/main.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/i2c_stts75_sensor/Makefile b/examples/stm32f1/other/i2c_stts75_sensor/Makefile similarity index 100% rename from examples/stm32/other/i2c_stts75_sensor/Makefile rename to examples/stm32f1/other/i2c_stts75_sensor/Makefile diff --git a/examples/stm32/other/i2c_stts75_sensor/README b/examples/stm32f1/other/i2c_stts75_sensor/README similarity index 100% rename from examples/stm32/other/i2c_stts75_sensor/README rename to examples/stm32f1/other/i2c_stts75_sensor/README diff --git a/examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.c b/examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.c similarity index 96% rename from examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.c rename to examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.c index f70c80d5..d8f24040 100644 --- a/examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.c +++ b/examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.c @@ -17,9 +17,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include #include "stts75.h" @@ -35,7 +35,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 115200); + usart_set_baudrate(USART1, 115200, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX_RX); diff --git a/examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.ld b/examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.ld similarity index 97% rename from examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.ld rename to examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/i2c_stts75_sensor/i2c_stts75_sensor.ld +++ b/examples/stm32f1/other/i2c_stts75_sensor/i2c_stts75_sensor.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/i2c_stts75_sensor/stts75.c b/examples/stm32f1/other/i2c_stts75_sensor/stts75.c similarity index 100% rename from examples/stm32/other/i2c_stts75_sensor/stts75.c rename to examples/stm32f1/other/i2c_stts75_sensor/stts75.c diff --git a/examples/stm32/other/i2c_stts75_sensor/stts75.h b/examples/stm32f1/other/i2c_stts75_sensor/stts75.h similarity index 100% rename from examples/stm32/other/i2c_stts75_sensor/stts75.h rename to examples/stm32f1/other/i2c_stts75_sensor/stts75.h diff --git a/examples/stm32/other/rtc/Makefile b/examples/stm32f1/other/rtc/Makefile similarity index 100% rename from examples/stm32/other/rtc/Makefile rename to examples/stm32f1/other/rtc/Makefile diff --git a/examples/stm32/other/rtc/README b/examples/stm32f1/other/rtc/README similarity index 100% rename from examples/stm32/other/rtc/README rename to examples/stm32f1/other/rtc/README diff --git a/examples/stm32/other/rtc/rtc.c b/examples/stm32f1/other/rtc/rtc.c similarity index 94% rename from examples/stm32/other/rtc/rtc.c rename to examples/stm32f1/other/rtc/rtc.c index c447534a..28ae24ca 100644 --- a/examples/stm32/other/rtc/rtc.c +++ b/examples/stm32f1/other/rtc/rtc.c @@ -17,10 +17,10 @@ * along with this program. If not, see . */ -#include -#include +#include +#include +#include #include -#include #include #include @@ -43,7 +43,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 38400); + usart_set_baudrate(USART1, 38400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX); diff --git a/examples/stm32/other/rtc/rtc.ld b/examples/stm32f1/other/rtc/rtc.ld similarity index 97% rename from examples/stm32/other/rtc/rtc.ld rename to examples/stm32f1/other/rtc/rtc.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/other/rtc/rtc.ld +++ b/examples/stm32f1/other/rtc/rtc.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/systick/Makefile b/examples/stm32f1/other/systick/Makefile similarity index 100% rename from examples/stm32/other/systick/Makefile rename to examples/stm32f1/other/systick/Makefile diff --git a/examples/stm32/other/systick/README b/examples/stm32f1/other/systick/README similarity index 100% rename from examples/stm32/other/systick/README rename to examples/stm32f1/other/systick/README diff --git a/examples/stm32/other/systick/systick.c b/examples/stm32f1/other/systick/systick.c similarity index 94% rename from examples/stm32/other/systick/systick.c rename to examples/stm32f1/other/systick/systick.c index c05aff74..173ff2af 100644 --- a/examples/stm32/other/systick/systick.c +++ b/examples/stm32f1/other/systick/systick.c @@ -17,9 +17,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include diff --git a/examples/stm32/other/systick/systick.ld b/examples/stm32f1/other/systick/systick.ld similarity index 97% rename from examples/stm32/other/systick/systick.ld rename to examples/stm32f1/other/systick/systick.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/systick/systick.ld +++ b/examples/stm32f1/other/systick/systick.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/timer_interrupt/Makefile b/examples/stm32f1/other/timer_interrupt/Makefile similarity index 100% rename from examples/stm32/other/timer_interrupt/Makefile rename to examples/stm32f1/other/timer_interrupt/Makefile diff --git a/examples/stm32/other/timer_interrupt/README b/examples/stm32f1/other/timer_interrupt/README similarity index 100% rename from examples/stm32/other/timer_interrupt/README rename to examples/stm32f1/other/timer_interrupt/README diff --git a/examples/stm32/other/timer_interrupt/timer.c b/examples/stm32f1/other/timer_interrupt/timer.c similarity index 95% rename from examples/stm32/other/timer_interrupt/timer.c rename to examples/stm32f1/other/timer_interrupt/timer.c index aa2cdb67..422df885 100644 --- a/examples/stm32/other/timer_interrupt/timer.c +++ b/examples/stm32f1/other/timer_interrupt/timer.c @@ -17,9 +17,9 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include +#include #include #include diff --git a/examples/stm32/other/timer_interrupt/timer.ld b/examples/stm32f1/other/timer_interrupt/timer.ld similarity index 97% rename from examples/stm32/other/timer_interrupt/timer.ld rename to examples/stm32f1/other/timer_interrupt/timer.ld index c0765211..4f609a88 100644 --- a/examples/stm32/other/timer_interrupt/timer.ld +++ b/examples/stm32f1/other/timer_interrupt/timer.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/usb_cdcacm/Makefile b/examples/stm32f1/other/usb_cdcacm/Makefile similarity index 100% rename from examples/stm32/other/usb_cdcacm/Makefile rename to examples/stm32f1/other/usb_cdcacm/Makefile diff --git a/examples/stm32/other/usb_cdcacm/README b/examples/stm32f1/other/usb_cdcacm/README similarity index 100% rename from examples/stm32/other/usb_cdcacm/README rename to examples/stm32f1/other/usb_cdcacm/README diff --git a/examples/stm32/other/usb_cdcacm/cdcacm.c b/examples/stm32f1/other/usb_cdcacm/cdcacm.c similarity index 98% rename from examples/stm32/other/usb_cdcacm/cdcacm.c rename to examples/stm32f1/other/usb_cdcacm/cdcacm.c index fdc92e24..d26b898e 100644 --- a/examples/stm32/other/usb_cdcacm/cdcacm.c +++ b/examples/stm32f1/other/usb_cdcacm/cdcacm.c @@ -18,8 +18,8 @@ */ #include -#include -#include +#include +#include #include #include diff --git a/examples/stm32/other/usb_cdcacm/cdcacm.ld b/examples/stm32f1/other/usb_cdcacm/cdcacm.ld similarity index 96% rename from examples/stm32/other/usb_cdcacm/cdcacm.ld rename to examples/stm32f1/other/usb_cdcacm/cdcacm.ld index 1c20282d..3cd63164 100644 --- a/examples/stm32/other/usb_cdcacm/cdcacm.ld +++ b/examples/stm32f1/other/usb_cdcacm/cdcacm.ld @@ -25,5 +25,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/usb_dfu/Makefile b/examples/stm32f1/other/usb_dfu/Makefile similarity index 100% rename from examples/stm32/other/usb_dfu/Makefile rename to examples/stm32f1/other/usb_dfu/Makefile diff --git a/examples/stm32/other/usb_dfu/README b/examples/stm32f1/other/usb_dfu/README similarity index 100% rename from examples/stm32/other/usb_dfu/README rename to examples/stm32f1/other/usb_dfu/README diff --git a/examples/stm32/lisa-m/usb_dfu/usbdfu.c b/examples/stm32f1/other/usb_dfu/usbdfu.c similarity index 97% rename from examples/stm32/lisa-m/usb_dfu/usbdfu.c rename to examples/stm32f1/other/usb_dfu/usbdfu.c index 0b7bf866..02d919f6 100644 --- a/examples/stm32/lisa-m/usb_dfu/usbdfu.c +++ b/examples/stm32f1/other/usb_dfu/usbdfu.c @@ -18,10 +18,10 @@ */ #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include diff --git a/examples/stm32/stm32-h103/usb_dfu/usbdfu.ld b/examples/stm32f1/other/usb_dfu/usbdfu.ld similarity index 96% rename from examples/stm32/stm32-h103/usb_dfu/usbdfu.ld rename to examples/stm32f1/other/usb_dfu/usbdfu.ld index 54e5dac7..6a01797d 100644 --- a/examples/stm32/stm32-h103/usb_dfu/usbdfu.ld +++ b/examples/stm32f1/other/usb_dfu/usbdfu.ld @@ -25,5 +25,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/other/usb_hid/Makefile b/examples/stm32f1/other/usb_hid/Makefile similarity index 100% rename from examples/stm32/other/usb_hid/Makefile rename to examples/stm32f1/other/usb_hid/Makefile diff --git a/examples/stm32/other/usb_hid/README b/examples/stm32f1/other/usb_hid/README similarity index 100% rename from examples/stm32/other/usb_hid/README rename to examples/stm32f1/other/usb_hid/README diff --git a/examples/stm32/other/usb_hid/usbhid.c b/examples/stm32f1/other/usb_hid/usbhid.c similarity index 98% rename from examples/stm32/other/usb_hid/usbhid.c rename to examples/stm32f1/other/usb_hid/usbhid.c index 8f08aac9..7c0186e9 100644 --- a/examples/stm32/other/usb_hid/usbhid.c +++ b/examples/stm32f1/other/usb_hid/usbhid.c @@ -18,8 +18,8 @@ */ #include -#include -#include +#include +#include #include #include #include @@ -28,7 +28,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/other/usb_hid/usbhid.ld b/examples/stm32f1/other/usb_hid/usbhid.ld similarity index 96% rename from examples/stm32/other/usb_hid/usbhid.ld rename to examples/stm32f1/other/usb_hid/usbhid.ld index 1c20282d..3cd63164 100644 --- a/examples/stm32/other/usb_hid/usbhid.ld +++ b/examples/stm32f1/other/usb_hid/usbhid.ld @@ -25,5 +25,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-discovery/button/Makefile b/examples/stm32f1/stm32-discovery/button/Makefile similarity index 100% rename from examples/stm32/stm32-discovery/button/Makefile rename to examples/stm32f1/stm32-discovery/button/Makefile diff --git a/examples/stm32/stm32-discovery/button/README b/examples/stm32f1/stm32-discovery/button/README similarity index 100% rename from examples/stm32/stm32-discovery/button/README rename to examples/stm32f1/stm32-discovery/button/README diff --git a/examples/stm32/stm32-discovery/button/button.c b/examples/stm32f1/stm32-discovery/button/button.c similarity index 96% rename from examples/stm32/stm32-discovery/button/button.c rename to examples/stm32f1/stm32-discovery/button/button.c index b84f0746..87ce5cc9 100644 --- a/examples/stm32/stm32-discovery/button/button.c +++ b/examples/stm32f1/stm32-discovery/button/button.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include u16 exti_line_state; diff --git a/examples/stm32/stm32-discovery/button/button.ld b/examples/stm32f1/stm32-discovery/button/button.ld similarity index 97% rename from examples/stm32/stm32-discovery/button/button.ld rename to examples/stm32f1/stm32-discovery/button/button.ld index b03f90f7..157204a7 100644 --- a/examples/stm32/stm32-discovery/button/button.ld +++ b/examples/stm32f1/stm32-discovery/button/button.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-discovery/fancyblink/Makefile b/examples/stm32f1/stm32-discovery/fancyblink/Makefile similarity index 100% rename from examples/stm32/stm32-discovery/fancyblink/Makefile rename to examples/stm32f1/stm32-discovery/fancyblink/Makefile diff --git a/examples/stm32/stm32-discovery/fancyblink/README b/examples/stm32f1/stm32-discovery/fancyblink/README similarity index 100% rename from examples/stm32/stm32-discovery/fancyblink/README rename to examples/stm32f1/stm32-discovery/fancyblink/README diff --git a/examples/stm32/stm32-discovery/fancyblink/fancyblink.c b/examples/stm32f1/stm32-discovery/fancyblink/fancyblink.c similarity index 95% rename from examples/stm32/stm32-discovery/fancyblink/fancyblink.c rename to examples/stm32f1/stm32-discovery/fancyblink/fancyblink.c index d40fb7b3..38a4c4b5 100644 --- a/examples/stm32/stm32-discovery/fancyblink/fancyblink.c +++ b/examples/stm32f1/stm32-discovery/fancyblink/fancyblink.c @@ -19,8 +19,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set STM32 to 24 MHz. */ void clock_setup(void) diff --git a/examples/stm32/stm32-discovery/fancyblink/fancyblink.ld b/examples/stm32f1/stm32-discovery/fancyblink/fancyblink.ld similarity index 97% rename from examples/stm32/stm32-discovery/fancyblink/fancyblink.ld rename to examples/stm32f1/stm32-discovery/fancyblink/fancyblink.ld index b03f90f7..157204a7 100644 --- a/examples/stm32/stm32-discovery/fancyblink/fancyblink.ld +++ b/examples/stm32f1/stm32-discovery/fancyblink/fancyblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-discovery/miniblink/Makefile b/examples/stm32f1/stm32-discovery/miniblink/Makefile similarity index 100% rename from examples/stm32/stm32-discovery/miniblink/Makefile rename to examples/stm32f1/stm32-discovery/miniblink/Makefile diff --git a/examples/stm32/stm32-discovery/miniblink/README b/examples/stm32f1/stm32-discovery/miniblink/README similarity index 100% rename from examples/stm32/stm32-discovery/miniblink/README rename to examples/stm32f1/stm32-discovery/miniblink/README diff --git a/examples/stm32/stm32-discovery/miniblink/miniblink.c b/examples/stm32f1/stm32-discovery/miniblink/miniblink.c similarity index 96% rename from examples/stm32/stm32-discovery/miniblink/miniblink.c rename to examples/stm32f1/stm32-discovery/miniblink/miniblink.c index a05f9576..973fab5d 100644 --- a/examples/stm32/stm32-discovery/miniblink/miniblink.c +++ b/examples/stm32f1/stm32-discovery/miniblink/miniblink.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include void gpio_setup(void) { diff --git a/examples/stm32/stm32-discovery/miniblink/miniblink.ld b/examples/stm32f1/stm32-discovery/miniblink/miniblink.ld similarity index 97% rename from examples/stm32/stm32-discovery/miniblink/miniblink.ld rename to examples/stm32f1/stm32-discovery/miniblink/miniblink.ld index b03f90f7..157204a7 100644 --- a/examples/stm32/stm32-discovery/miniblink/miniblink.ld +++ b/examples/stm32f1/stm32-discovery/miniblink/miniblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-discovery/rtc/Makefile b/examples/stm32f1/stm32-discovery/rtc/Makefile similarity index 100% rename from examples/stm32/stm32-discovery/rtc/Makefile rename to examples/stm32f1/stm32-discovery/rtc/Makefile diff --git a/examples/stm32/stm32-discovery/rtc/README b/examples/stm32f1/stm32-discovery/rtc/README similarity index 100% rename from examples/stm32/stm32-discovery/rtc/README rename to examples/stm32f1/stm32-discovery/rtc/README diff --git a/examples/stm32/stm32-discovery/rtc/rtc.c b/examples/stm32f1/stm32-discovery/rtc/rtc.c similarity index 97% rename from examples/stm32/stm32-discovery/rtc/rtc.c rename to examples/stm32f1/stm32-discovery/rtc/rtc.c index c99920f8..fa8a9664 100644 --- a/examples/stm32/stm32-discovery/rtc/rtc.c +++ b/examples/stm32f1/stm32-discovery/rtc/rtc.c @@ -18,10 +18,10 @@ * along with this program. If not, see . */ -#include -#include +#include +#include +#include #include -#include #include #include diff --git a/examples/stm32/stm32-discovery/rtc/rtc.ld b/examples/stm32f1/stm32-discovery/rtc/rtc.ld similarity index 97% rename from examples/stm32/stm32-discovery/rtc/rtc.ld rename to examples/stm32f1/stm32-discovery/rtc/rtc.ld index b03f90f7..157204a7 100644 --- a/examples/stm32/stm32-discovery/rtc/rtc.ld +++ b/examples/stm32f1/stm32-discovery/rtc/rtc.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-discovery/usart/Makefile b/examples/stm32f1/stm32-discovery/usart/Makefile similarity index 100% rename from examples/stm32/stm32-discovery/usart/Makefile rename to examples/stm32f1/stm32-discovery/usart/Makefile diff --git a/examples/stm32/stm32-discovery/usart/README b/examples/stm32f1/stm32-discovery/usart/README similarity index 100% rename from examples/stm32/stm32-discovery/usart/README rename to examples/stm32f1/stm32-discovery/usart/README diff --git a/examples/stm32/stm32-discovery/usart/usart.c b/examples/stm32f1/stm32-discovery/usart/usart.c similarity index 97% rename from examples/stm32/stm32-discovery/usart/usart.c rename to examples/stm32f1/stm32-discovery/usart/usart.c index 05d03124..942805b5 100644 --- a/examples/stm32/stm32-discovery/usart/usart.c +++ b/examples/stm32f1/stm32-discovery/usart/usart.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include void clock_setup(void) diff --git a/examples/stm32/stm32-discovery/usart/usart.ld b/examples/stm32f1/stm32-discovery/usart/usart.ld similarity index 97% rename from examples/stm32/stm32-discovery/usart/usart.ld rename to examples/stm32f1/stm32-discovery/usart/usart.ld index b03f90f7..157204a7 100644 --- a/examples/stm32/stm32-discovery/usart/usart.ld +++ b/examples/stm32f1/stm32-discovery/usart/usart.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/button/Makefile b/examples/stm32f1/stm32-h103/button/Makefile similarity index 100% rename from examples/stm32/stm32-h103/button/Makefile rename to examples/stm32f1/stm32-h103/button/Makefile diff --git a/examples/stm32/stm32-h103/button/button.c b/examples/stm32f1/stm32-h103/button/button.c similarity index 96% rename from examples/stm32/stm32-h103/button/button.c rename to examples/stm32f1/stm32-h103/button/button.c index 63f32744..2f3378c5 100644 --- a/examples/stm32/stm32-h103/button/button.c +++ b/examples/stm32f1/stm32-h103/button/button.c @@ -18,9 +18,9 @@ * along with this program. If not, see . */ +#include +#include #include -#include -#include #include u16 exti_line_state; diff --git a/examples/stm32/stm32-h103/button/button.ld b/examples/stm32f1/stm32-h103/button/button.ld similarity index 97% rename from examples/stm32/stm32-h103/button/button.ld rename to examples/stm32f1/stm32-h103/button/button.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/button/button.ld +++ b/examples/stm32f1/stm32-h103/button/button.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/exti_both/Makefile b/examples/stm32f1/stm32-h103/exti_both/Makefile similarity index 100% rename from examples/stm32/stm32-h103/exti_both/Makefile rename to examples/stm32f1/stm32-h103/exti_both/Makefile diff --git a/examples/stm32/stm32-h103/exti_both/exti_both.c b/examples/stm32f1/stm32-h103/exti_both/exti_both.c similarity index 96% rename from examples/stm32/stm32-h103/exti_both/exti_both.c rename to examples/stm32f1/stm32-h103/exti_both/exti_both.c index edfc676d..7c6f9c7a 100644 --- a/examples/stm32/stm32-h103/exti_both/exti_both.c +++ b/examples/stm32f1/stm32-h103/exti_both/exti_both.c @@ -18,9 +18,9 @@ * along with this program. If not, see . */ +#include +#include #include -#include -#include #include u16 exti_line_state; diff --git a/examples/stm32/stm32-h103/exti_both/exti_both.ld b/examples/stm32f1/stm32-h103/exti_both/exti_both.ld similarity index 97% rename from examples/stm32/stm32-h103/exti_both/exti_both.ld rename to examples/stm32f1/stm32-h103/exti_both/exti_both.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/exti_both/exti_both.ld +++ b/examples/stm32f1/stm32-h103/exti_both/exti_both.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/exti_rising_falling/Makefile b/examples/stm32f1/stm32-h103/exti_rising_falling/Makefile similarity index 100% rename from examples/stm32/stm32-h103/exti_rising_falling/Makefile rename to examples/stm32f1/stm32-h103/exti_rising_falling/Makefile diff --git a/examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.c b/examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.c similarity index 96% rename from examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.c rename to examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.c index af1268d6..b3c47ee9 100644 --- a/examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.c +++ b/examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.c @@ -18,9 +18,9 @@ * along with this program. If not, see . */ +#include +#include #include -#include -#include #include #define FALLING 0 diff --git a/examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.ld b/examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.ld similarity index 97% rename from examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.ld rename to examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/exti_rising_falling/exti_rising_falling.ld +++ b/examples/stm32f1/stm32-h103/exti_rising_falling/exti_rising_falling.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/fancyblink/Makefile b/examples/stm32f1/stm32-h103/fancyblink/Makefile similarity index 100% rename from examples/stm32/stm32-h103/fancyblink/Makefile rename to examples/stm32f1/stm32-h103/fancyblink/Makefile diff --git a/examples/stm32/stm32-h103/fancyblink/README b/examples/stm32f1/stm32-h103/fancyblink/README similarity index 100% rename from examples/stm32/stm32-h103/fancyblink/README rename to examples/stm32f1/stm32-h103/fancyblink/README diff --git a/examples/stm32/stm32-h103/fancyblink/fancyblink.c b/examples/stm32f1/stm32-h103/fancyblink/fancyblink.c similarity index 94% rename from examples/stm32/stm32-h103/fancyblink/fancyblink.c rename to examples/stm32f1/stm32-h103/fancyblink/fancyblink.c index eeb3f348..1b2ad863 100644 --- a/examples/stm32/stm32-h103/fancyblink/fancyblink.c +++ b/examples/stm32f1/stm32-h103/fancyblink/fancyblink.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set STM32 to 72 MHz. */ void clock_setup(void) diff --git a/examples/stm32/lisa-m/fancyblink/fancyblink.ld b/examples/stm32f1/stm32-h103/fancyblink/fancyblink.ld similarity index 97% rename from examples/stm32/lisa-m/fancyblink/fancyblink.ld rename to examples/stm32f1/stm32-h103/fancyblink/fancyblink.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/lisa-m/fancyblink/fancyblink.ld +++ b/examples/stm32f1/stm32-h103/fancyblink/fancyblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/led_stripe/Makefile b/examples/stm32f1/stm32-h103/led_stripe/Makefile similarity index 100% rename from examples/stm32/stm32-h103/led_stripe/Makefile rename to examples/stm32f1/stm32-h103/led_stripe/Makefile diff --git a/examples/stm32/stm32-h103/led_stripe/led_stripe.c b/examples/stm32f1/stm32-h103/led_stripe/led_stripe.c similarity index 98% rename from examples/stm32/stm32-h103/led_stripe/led_stripe.c rename to examples/stm32f1/stm32-h103/led_stripe/led_stripe.c index 9cf9d4f1..15768662 100644 --- a/examples/stm32/stm32-h103/led_stripe/led_stripe.c +++ b/examples/stm32f1/stm32-h103/led_stripe/led_stripe.c @@ -26,8 +26,8 @@ #include -#include -#include +#include +#include #define SPI_BANK GPIOB #define SCLK_PIN GPIO13 diff --git a/examples/stm32/stm32-h103/led_stripe/led_stripe.ld b/examples/stm32f1/stm32-h103/led_stripe/led_stripe.ld similarity index 97% rename from examples/stm32/stm32-h103/led_stripe/led_stripe.ld rename to examples/stm32f1/stm32-h103/led_stripe/led_stripe.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/led_stripe/led_stripe.ld +++ b/examples/stm32f1/stm32-h103/led_stripe/led_stripe.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/miniblink/Makefile b/examples/stm32f1/stm32-h103/miniblink/Makefile similarity index 100% rename from examples/stm32/stm32-h103/miniblink/Makefile rename to examples/stm32f1/stm32-h103/miniblink/Makefile diff --git a/examples/stm32/stm32-h103/miniblink/README b/examples/stm32f1/stm32-h103/miniblink/README similarity index 100% rename from examples/stm32/stm32-h103/miniblink/README rename to examples/stm32f1/stm32-h103/miniblink/README diff --git a/examples/stm32/stm32-h103/miniblink/miniblink.c b/examples/stm32f1/stm32-h103/miniblink/miniblink.c similarity index 96% rename from examples/stm32/stm32-h103/miniblink/miniblink.c rename to examples/stm32f1/stm32-h103/miniblink/miniblink.c index 6f8bc2cd..b003f9a2 100644 --- a/examples/stm32/stm32-h103/miniblink/miniblink.c +++ b/examples/stm32f1/stm32-h103/miniblink/miniblink.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include void gpio_setup(void) { diff --git a/examples/stm32/stm32-h103/miniblink/miniblink.ld b/examples/stm32f1/stm32-h103/miniblink/miniblink.ld similarity index 97% rename from examples/stm32/stm32-h103/miniblink/miniblink.ld rename to examples/stm32f1/stm32-h103/miniblink/miniblink.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/miniblink/miniblink.ld +++ b/examples/stm32f1/stm32-h103/miniblink/miniblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/pwm_6step/Makefile b/examples/stm32f1/stm32-h103/pwm_6step/Makefile similarity index 100% rename from examples/stm32/stm32-h103/pwm_6step/Makefile rename to examples/stm32f1/stm32-h103/pwm_6step/Makefile diff --git a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c b/examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.c similarity index 99% rename from examples/stm32/stm32-h103/pwm_6step/pwm_6step.c rename to examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.c index bda8ff79..9f9390ac 100644 --- a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c +++ b/examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.c @@ -17,10 +17,10 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include #include +#include #include #define FALLING 0 diff --git a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.ld b/examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.ld similarity index 97% rename from examples/stm32/stm32-h103/pwm_6step/pwm_6step.ld rename to examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.ld +++ b/examples/stm32f1/stm32-h103/pwm_6step/pwm_6step.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/spi/Makefile b/examples/stm32f1/stm32-h103/spi/Makefile similarity index 100% rename from examples/stm32/stm32-h103/spi/Makefile rename to examples/stm32f1/stm32-h103/spi/Makefile diff --git a/examples/stm32/stm32-h103/spi/README b/examples/stm32f1/stm32-h103/spi/README similarity index 100% rename from examples/stm32/stm32-h103/spi/README rename to examples/stm32f1/stm32-h103/spi/README diff --git a/examples/stm32/stm32-h103/spi/spi.c b/examples/stm32f1/stm32-h103/spi/spi.c similarity index 96% rename from examples/stm32/stm32-h103/spi/spi.c rename to examples/stm32f1/stm32-h103/spi/spi.c index 5a36bb8b..89b8a686 100644 --- a/examples/stm32/stm32-h103/spi/spi.c +++ b/examples/stm32f1/stm32-h103/spi/spi.c @@ -17,7 +17,7 @@ * along with this program. If not, see . */ -#include +#include #include void clock_setup(void) diff --git a/examples/stm32/stm32-h103/spi/spi.ld b/examples/stm32f1/stm32-h103/spi/spi.ld similarity index 97% rename from examples/stm32/stm32-h103/spi/spi.ld rename to examples/stm32f1/stm32-h103/spi/spi.ld index 25806f8d..e2fb5b63 100644 --- a/examples/stm32/stm32-h103/spi/spi.ld +++ b/examples/stm32f1/stm32-h103/spi/spi.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/timer/Makefile b/examples/stm32f1/stm32-h103/timer/Makefile similarity index 100% rename from examples/stm32/stm32-h103/timer/Makefile rename to examples/stm32f1/stm32-h103/timer/Makefile diff --git a/examples/stm32/stm32-h103/timer/timer.c b/examples/stm32f1/stm32-h103/timer/timer.c similarity index 97% rename from examples/stm32/stm32-h103/timer/timer.c rename to examples/stm32f1/stm32-h103/timer/timer.c index ea64c860..48cae129 100644 --- a/examples/stm32/stm32-h103/timer/timer.c +++ b/examples/stm32f1/stm32-h103/timer/timer.c @@ -17,10 +17,10 @@ * along with this program. If not, see . */ -#include -#include -#include +#include +#include #include +#include #include u16 frequency_sequence[18] = { diff --git a/examples/stm32/stm32-h103/timer/timer.ld b/examples/stm32f1/stm32-h103/timer/timer.ld similarity index 97% rename from examples/stm32/stm32-h103/timer/timer.ld rename to examples/stm32f1/stm32-h103/timer/timer.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/timer/timer.ld +++ b/examples/stm32f1/stm32-h103/timer/timer.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/traceswo/Makefile b/examples/stm32f1/stm32-h103/traceswo/Makefile similarity index 100% rename from examples/stm32/stm32-h103/traceswo/Makefile rename to examples/stm32f1/stm32-h103/traceswo/Makefile diff --git a/examples/stm32/stm32-h103/traceswo/README b/examples/stm32f1/stm32-h103/traceswo/README similarity index 100% rename from examples/stm32/stm32-h103/traceswo/README rename to examples/stm32f1/stm32-h103/traceswo/README diff --git a/examples/stm32/stm32-h103/traceswo/traceswo.c b/examples/stm32f1/stm32-h103/traceswo/traceswo.c similarity index 97% rename from examples/stm32/stm32-h103/traceswo/traceswo.c rename to examples/stm32f1/stm32-h103/traceswo/traceswo.c index ac461bb4..88814479 100644 --- a/examples/stm32/stm32-h103/traceswo/traceswo.c +++ b/examples/stm32f1/stm32-h103/traceswo/traceswo.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include #include diff --git a/examples/stm32/stm32-h103/traceswo/traceswo.ld b/examples/stm32f1/stm32-h103/traceswo/traceswo.ld similarity index 97% rename from examples/stm32/stm32-h103/traceswo/traceswo.ld rename to examples/stm32f1/stm32-h103/traceswo/traceswo.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/traceswo/traceswo.ld +++ b/examples/stm32f1/stm32-h103/traceswo/traceswo.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usart/Makefile b/examples/stm32f1/stm32-h103/usart/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usart/Makefile rename to examples/stm32f1/stm32-h103/usart/Makefile diff --git a/examples/stm32/stm32-h103/usart/README b/examples/stm32f1/stm32-h103/usart/README similarity index 100% rename from examples/stm32/stm32-h103/usart/README rename to examples/stm32f1/stm32-h103/usart/README diff --git a/examples/stm32/stm32-h103/usart/usart.c b/examples/stm32f1/stm32-h103/usart/usart.c similarity index 93% rename from examples/stm32/stm32-h103/usart/usart.c rename to examples/stm32f1/stm32-h103/usart/usart.c index 9692d612..a221acb5 100644 --- a/examples/stm32/stm32-h103/usart/usart.c +++ b/examples/stm32f1/stm32-h103/usart/usart.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include void clock_setup(void) @@ -40,7 +40,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 38400); + usart_set_baudrate(USART1, 38400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_mode(USART1, USART_MODE_TX); @@ -55,7 +55,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART2, 38400); + usart_set_baudrate(USART2, 38400, rcc_ppre1_frequency); usart_set_databits(USART2, 8); usart_set_stopbits(USART2, USART_STOPBITS_1); usart_set_mode(USART2, USART_MODE_TX); @@ -70,7 +70,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART3_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART3, 38400); + usart_set_baudrate(USART3, 38400, rcc_ppre1_frequency); usart_set_databits(USART3, 8); usart_set_stopbits(USART3, USART_STOPBITS_1); usart_set_mode(USART3, USART_MODE_TX); diff --git a/examples/stm32/stm32-h103/usart/usart.ld b/examples/stm32f1/stm32-h103/usart/usart.ld similarity index 97% rename from examples/stm32/stm32-h103/usart/usart.ld rename to examples/stm32f1/stm32-h103/usart/usart.ld index 7ea2b92c..3409b98d 100644 --- a/examples/stm32/stm32-h103/usart/usart.ld +++ b/examples/stm32f1/stm32-h103/usart/usart.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usart_irq/Makefile b/examples/stm32f1/stm32-h103/usart_irq/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usart_irq/Makefile rename to examples/stm32f1/stm32-h103/usart_irq/Makefile diff --git a/examples/stm32/stm32-h103/usart_irq/usart_irq.c b/examples/stm32f1/stm32-h103/usart_irq/usart_irq.c similarity index 96% rename from examples/stm32/stm32-h103/usart_irq/usart_irq.c rename to examples/stm32f1/stm32-h103/usart_irq/usart_irq.c index 9b957dcc..a2d8eef5 100644 --- a/examples/stm32/stm32-h103/usart_irq/usart_irq.c +++ b/examples/stm32f1/stm32-h103/usart_irq/usart_irq.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include #include @@ -49,7 +49,7 @@ void usart_setup(void) GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 230400); + usart_set_baudrate(USART1, 230400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_parity(USART1, USART_PARITY_NONE); diff --git a/examples/stm32/stm32-h103/usart_irq/usart_irq.ld b/examples/stm32f1/stm32-h103/usart_irq/usart_irq.ld similarity index 97% rename from examples/stm32/stm32-h103/usart_irq/usart_irq.ld rename to examples/stm32f1/stm32-h103/usart_irq/usart_irq.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/stm32-h103/usart_irq/usart_irq.ld +++ b/examples/stm32f1/stm32-h103/usart_irq/usart_irq.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usart_irq_printf/Makefile b/examples/stm32f1/stm32-h103/usart_irq_printf/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usart_irq_printf/Makefile rename to examples/stm32f1/stm32-h103/usart_irq_printf/Makefile diff --git a/examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.c b/examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.c similarity index 98% rename from examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.c rename to examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.c index 42a74729..deee527f 100644 --- a/examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.c +++ b/examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include #include #include @@ -145,7 +145,7 @@ void usart_setup(void) GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 230400); + usart_set_baudrate(USART1, 230400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_parity(USART1, USART_PARITY_NONE); diff --git a/examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.ld b/examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.ld similarity index 97% rename from examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.ld rename to examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/stm32-h103/usart_irq_printf/usart_irq_printf.ld +++ b/examples/stm32f1/stm32-h103/usart_irq_printf/usart_irq_printf.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usart_printf/Makefile b/examples/stm32f1/stm32-h103/usart_printf/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usart_printf/Makefile rename to examples/stm32f1/stm32-h103/usart_printf/Makefile diff --git a/examples/stm32/stm32-h103/usart_printf/usart_printf.c b/examples/stm32f1/stm32-h103/usart_printf/usart_printf.c similarity index 95% rename from examples/stm32/stm32-h103/usart_printf/usart_printf.c rename to examples/stm32f1/stm32-h103/usart_printf/usart_printf.c index 26fcee60..1eb067f9 100644 --- a/examples/stm32/stm32-h103/usart_printf/usart_printf.c +++ b/examples/stm32f1/stm32-h103/usart_printf/usart_printf.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include #include @@ -46,7 +46,7 @@ void usart_setup(void) GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); /* Setup UART parameters. */ - usart_set_baudrate(USART1, 230400); + usart_set_baudrate(USART1, 230400, rcc_ppre2_frequency); usart_set_databits(USART1, 8); usart_set_stopbits(USART1, USART_STOPBITS_1); usart_set_parity(USART1, USART_PARITY_NONE); diff --git a/examples/stm32/stm32-h103/usart_printf/usart_printf.ld b/examples/stm32f1/stm32-h103/usart_printf/usart_printf.ld similarity index 97% rename from examples/stm32/stm32-h103/usart_printf/usart_printf.ld rename to examples/stm32f1/stm32-h103/usart_printf/usart_printf.ld index 78997732..edb52c5a 100644 --- a/examples/stm32/stm32-h103/usart_printf/usart_printf.ld +++ b/examples/stm32f1/stm32-h103/usart_printf/usart_printf.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usb_cdcacm/Makefile b/examples/stm32f1/stm32-h103/usb_cdcacm/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usb_cdcacm/Makefile rename to examples/stm32f1/stm32-h103/usb_cdcacm/Makefile diff --git a/examples/stm32/stm32-h103/usb_cdcacm/README b/examples/stm32f1/stm32-h103/usb_cdcacm/README similarity index 100% rename from examples/stm32/stm32-h103/usb_cdcacm/README rename to examples/stm32f1/stm32-h103/usb_cdcacm/README diff --git a/examples/stm32/stm32-h103/usb_cdcacm/cdcacm.c b/examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.c similarity index 98% rename from examples/stm32/stm32-h103/usb_cdcacm/cdcacm.c rename to examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.c index 4b906408..f9e25273 100644 --- a/examples/stm32/stm32-h103/usb_cdcacm/cdcacm.c +++ b/examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.c @@ -18,8 +18,8 @@ */ #include -#include -#include +#include +#include #include #include diff --git a/examples/stm32/stm32-h103/usb_cdcacm/cdcacm.ld b/examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.ld similarity index 97% rename from examples/stm32/stm32-h103/usb_cdcacm/cdcacm.ld rename to examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.ld index 928c898a..d0df9e64 100644 --- a/examples/stm32/stm32-h103/usb_cdcacm/cdcacm.ld +++ b/examples/stm32f1/stm32-h103/usb_cdcacm/cdcacm.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usb_dfu/Makefile b/examples/stm32f1/stm32-h103/usb_dfu/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usb_dfu/Makefile rename to examples/stm32f1/stm32-h103/usb_dfu/Makefile diff --git a/examples/stm32/stm32-h103/usb_dfu/README b/examples/stm32f1/stm32-h103/usb_dfu/README similarity index 100% rename from examples/stm32/stm32-h103/usb_dfu/README rename to examples/stm32f1/stm32-h103/usb_dfu/README diff --git a/examples/stm32/other/usb_dfu/usbdfu.c b/examples/stm32f1/stm32-h103/usb_dfu/usbdfu.c similarity index 97% rename from examples/stm32/other/usb_dfu/usbdfu.c rename to examples/stm32f1/stm32-h103/usb_dfu/usbdfu.c index 7ffbc745..9d184f16 100644 --- a/examples/stm32/other/usb_dfu/usbdfu.c +++ b/examples/stm32f1/stm32-h103/usb_dfu/usbdfu.c @@ -18,10 +18,10 @@ */ #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include diff --git a/examples/stm32/other/usb_dfu/usbdfu.ld b/examples/stm32f1/stm32-h103/usb_dfu/usbdfu.ld similarity index 96% rename from examples/stm32/other/usb_dfu/usbdfu.ld rename to examples/stm32f1/stm32-h103/usb_dfu/usbdfu.ld index 54e5dac7..6a01797d 100644 --- a/examples/stm32/other/usb_dfu/usbdfu.ld +++ b/examples/stm32f1/stm32-h103/usb_dfu/usbdfu.ld @@ -25,5 +25,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usb_hid/Makefile b/examples/stm32f1/stm32-h103/usb_hid/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usb_hid/Makefile rename to examples/stm32f1/stm32-h103/usb_hid/Makefile diff --git a/examples/stm32/stm32-h103/usb_hid/README b/examples/stm32f1/stm32-h103/usb_hid/README similarity index 100% rename from examples/stm32/stm32-h103/usb_hid/README rename to examples/stm32f1/stm32-h103/usb_hid/README diff --git a/examples/stm32/stm32-h103/usb_hid/usbhid.c b/examples/stm32f1/stm32-h103/usb_hid/usbhid.c similarity index 98% rename from examples/stm32/stm32-h103/usb_hid/usbhid.c rename to examples/stm32f1/stm32-h103/usb_hid/usbhid.c index a21fce60..a815573a 100644 --- a/examples/stm32/stm32-h103/usb_hid/usbhid.c +++ b/examples/stm32f1/stm32-h103/usb_hid/usbhid.c @@ -18,8 +18,8 @@ */ #include -#include -#include +#include +#include #include #include #include @@ -28,7 +28,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/lisa-m/usb_hid/usbhid.ld b/examples/stm32f1/stm32-h103/usb_hid/usbhid.ld similarity index 97% rename from examples/stm32/lisa-m/usb_hid/usbhid.ld rename to examples/stm32f1/stm32-h103/usb_hid/usbhid.ld index 928c898a..d0df9e64 100644 --- a/examples/stm32/lisa-m/usb_hid/usbhid.ld +++ b/examples/stm32f1/stm32-h103/usb_hid/usbhid.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h103/usb_iap/Makefile b/examples/stm32f1/stm32-h103/usb_iap/Makefile similarity index 100% rename from examples/stm32/stm32-h103/usb_iap/Makefile rename to examples/stm32f1/stm32-h103/usb_iap/Makefile diff --git a/examples/stm32/stm32-h103/usb_iap/README b/examples/stm32f1/stm32-h103/usb_iap/README similarity index 100% rename from examples/stm32/stm32-h103/usb_iap/README rename to examples/stm32f1/stm32-h103/usb_iap/README diff --git a/examples/stm32/stm32-h103/usb_iap/usbiap.c b/examples/stm32f1/stm32-h103/usb_iap/usbiap.c similarity index 97% rename from examples/stm32/stm32-h103/usb_iap/usbiap.c rename to examples/stm32f1/stm32-h103/usb_iap/usbiap.c index 7ffbc745..9d184f16 100644 --- a/examples/stm32/stm32-h103/usb_iap/usbiap.c +++ b/examples/stm32f1/stm32-h103/usb_iap/usbiap.c @@ -18,10 +18,10 @@ */ #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include diff --git a/examples/stm32/stm32-h103/usb_iap/usbiap.ld b/examples/stm32f1/stm32-h103/usb_iap/usbiap.ld similarity index 97% rename from examples/stm32/stm32-h103/usb_iap/usbiap.ld rename to examples/stm32f1/stm32-h103/usb_iap/usbiap.ld index 928c898a..d0df9e64 100644 --- a/examples/stm32/stm32-h103/usb_iap/usbiap.ld +++ b/examples/stm32f1/stm32-h103/usb_iap/usbiap.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h107/fancyblink/Makefile b/examples/stm32f1/stm32-h107/fancyblink/Makefile similarity index 100% rename from examples/stm32/stm32-h107/fancyblink/Makefile rename to examples/stm32f1/stm32-h107/fancyblink/Makefile diff --git a/examples/stm32/stm32-h107/fancyblink/README b/examples/stm32f1/stm32-h107/fancyblink/README similarity index 100% rename from examples/stm32/stm32-h107/fancyblink/README rename to examples/stm32f1/stm32-h107/fancyblink/README diff --git a/examples/stm32/stm32-h107/fancyblink/fancyblink.c b/examples/stm32f1/stm32-h107/fancyblink/fancyblink.c similarity index 95% rename from examples/stm32/stm32-h107/fancyblink/fancyblink.c rename to examples/stm32f1/stm32-h107/fancyblink/fancyblink.c index c73d3d40..4d458291 100644 --- a/examples/stm32/stm32-h107/fancyblink/fancyblink.c +++ b/examples/stm32f1/stm32-h107/fancyblink/fancyblink.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set STM32 to 72 MHz. */ void clock_setup(void) diff --git a/examples/stm32/stm32-h107/fancyblink/fancyblink.ld b/examples/stm32f1/stm32-h107/fancyblink/fancyblink.ld similarity index 97% rename from examples/stm32/stm32-h107/fancyblink/fancyblink.ld rename to examples/stm32f1/stm32-h107/fancyblink/fancyblink.ld index 6c9c7660..d35c1417 100644 --- a/examples/stm32/stm32-h107/fancyblink/fancyblink.ld +++ b/examples/stm32f1/stm32-h107/fancyblink/fancyblink.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32/stm32-h107/usb_simple/Makefile b/examples/stm32f1/stm32-h107/usb_simple/Makefile similarity index 100% rename from examples/stm32/stm32-h107/usb_simple/Makefile rename to examples/stm32f1/stm32-h107/usb_simple/Makefile diff --git a/examples/stm32/stm32-h107/usb_simple/README b/examples/stm32f1/stm32-h107/usb_simple/README similarity index 100% rename from examples/stm32/stm32-h107/usb_simple/README rename to examples/stm32f1/stm32-h107/usb_simple/README diff --git a/examples/stm32/stm32-h107/usb_simple/usb_simple.c b/examples/stm32f1/stm32-h107/usb_simple/usb_simple.c similarity index 97% rename from examples/stm32/stm32-h107/usb_simple/usb_simple.c rename to examples/stm32f1/stm32-h107/usb_simple/usb_simple.c index 85f67df7..c30803c3 100644 --- a/examples/stm32/stm32-h107/usb_simple/usb_simple.c +++ b/examples/stm32f1/stm32-h107/usb_simple/usb_simple.c @@ -17,8 +17,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include diff --git a/examples/stm32/stm32-h107/usb_simple/usb_simple.ld b/examples/stm32f1/stm32-h107/usb_simple/usb_simple.ld similarity index 97% rename from examples/stm32/stm32-h107/usb_simple/usb_simple.ld rename to examples/stm32f1/stm32-h107/usb_simple/usb_simple.ld index 6c9c7660..d35c1417 100644 --- a/examples/stm32/stm32-h107/usb_simple/usb_simple.ld +++ b/examples/stm32f1/stm32-h107/usb_simple/usb_simple.ld @@ -27,5 +27,5 @@ MEMORY } /* Include the common ld script. */ -INCLUDE libopencm3_stm32.ld +INCLUDE libopencm3_stm32f1.ld diff --git a/examples/stm32f2/Makefile.include b/examples/stm32f2/Makefile.include new file mode 100644 index 00000000..3539cddc --- /dev/null +++ b/examples/stm32f2/Makefile.include @@ -0,0 +1,125 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## Copyright (C) 2010 Piotr Esden-Tempski +## Copyright (C) 2011 Fergus Noble +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see . +## + +PREFIX ?= arm-none-eabi +# PREFIX ?= arm-elf +CC = $(PREFIX)-gcc +LD = $(PREFIX)-gcc +OBJCOPY = $(PREFIX)-objcopy +OBJDUMP = $(PREFIX)-objdump +# Uncomment this line if you want to use the installed (not local) library. +#TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) +TOOLCHAIN_DIR = ../../../.. +CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \ + -fno-common -mcpu=cortex-m3 -mthumb -msoft-float -MD -DSTM32F2 +LDSCRIPT = $(BINARY).ld +LDFLAGS += -lc -lnosys -L$(TOOLCHAIN_DIR)/lib \ + -L$(TOOLCHAIN_DIR)/lib/stm32f2 \ + -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \ + -mthumb -march=armv7 -mfix-cortex-m3-ldrd -msoft-float +OBJS += $(BINARY).o + +OOCD ?= openocd +OOCD_INTERFACE ?= flossjtag +OOCD_BOARD ?= olimex_stm32_h103 + +# Be silent per default, but 'make V=1' will show all compiler calls. +ifneq ($(V),1) +Q := @ +NULL := 2>/dev/null +else +LDFLAGS += -Wl,--print-gc-sections +endif + +.SUFFIXES: .elf .bin .hex .srec .list .images +.SECONDEXPANSION: +.SECONDARY: + +all: images + +images: $(BINARY).images +flash: $(BINARY).flash + +%.images: %.bin %.hex %.srec %.list + @#echo "*** $* images generated ***" + +%.bin: %.elf + @#printf " OBJCOPY $(*).bin\n" + $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin + +%.hex: %.elf + @#printf " OBJCOPY $(*).hex\n" + $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex + +%.srec: %.elf + @#printf " OBJCOPY $(*).srec\n" + $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec + +%.list: %.elf + @#printf " OBJDUMP $(*).list\n" + $(Q)$(OBJDUMP) -S $(*).elf > $(*).list + +%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f2/libopencm3_stm32f2.a + @#printf " LD $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32f2 $(LDFLAGS) + +%.o: %.c Makefile + @#printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(CFLAGS) -o $@ -c $< + +clean: + $(Q)rm -f *.o + $(Q)rm -f *.d + $(Q)rm -f *.elf + $(Q)rm -f *.bin + $(Q)rm -f *.hex + $(Q)rm -f *.srec + $(Q)rm -f *.list + +ifeq ($(OOCD_SERIAL),) +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "init" -c "reset init" \ + -c "stm32x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +else +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "ft2232_serial $(OOCD_SERIAL)" \ + -c "init" -c "reset init" \ + -c "stm32x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +endif + +.PHONY: images clean + +-include $(OBJS:.o=.d) + diff --git a/examples/stm32f2/jobygps/jobygps.cfg b/examples/stm32f2/jobygps/jobygps.cfg new file mode 100644 index 00000000..7ca449e2 --- /dev/null +++ b/examples/stm32f2/jobygps/jobygps.cfg @@ -0,0 +1,3 @@ +reset_config srst_only srst_push_pull +source [find target/stm32f2x.cfg] + diff --git a/examples/stm32f2/jobygps/miniblink/Makefile b/examples/stm32f2/jobygps/miniblink/Makefile new file mode 100644 index 00000000..24a478b4 --- /dev/null +++ b/examples/stm32f2/jobygps/miniblink/Makefile @@ -0,0 +1,23 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see . +## + +BINARY = miniblink + +include ../../Makefile.include + diff --git a/examples/stm32f2/jobygps/miniblink/README b/examples/stm32f2/jobygps/miniblink/README new file mode 100644 index 00000000..01301125 --- /dev/null +++ b/examples/stm32f2/jobygps/miniblink/README @@ -0,0 +1,6 @@ +------------------------------------------------------------------------------ +README +------------------------------------------------------------------------------ + +This is the smallest-possible example program using libopencm3. + diff --git a/examples/stm32f2/jobygps/miniblink/miniblink.c b/examples/stm32f2/jobygps/miniblink/miniblink.c new file mode 100644 index 00000000..2927df5e --- /dev/null +++ b/examples/stm32f2/jobygps/miniblink/miniblink.c @@ -0,0 +1,77 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +//#include +#include + +void gpio_setup(void) +{ + /* Enable GPIOC clock. */ + /* Manually: */ + // RCC_APB2ENR |= RCC_APB2ENR_IOPCEN; + /* Using API functions: */ + //rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + + /* Set GPIO12 (in GPIO port C) to 'output push-pull'. */ + /* Manually: */ + // GPIOC_CRH = (GPIO_CNF_OUTPUT_PUSHPULL << (((12 - 8) * 4) + 2)); + // GPIOC_CRH |= (GPIO_MODE_OUTPUT_2_MHZ << ((12 - 8) * 4)); + /* Using API functions: */ + MMIO32(RCC_BASE+0x30) |= (1<<2); + gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO3|GPIO4); +} + +int main(void) +{ + int i; + + gpio_setup(); + + /* Blink the LED (PC12) on the board. */ + while (1) { + /* Manually: */ + // GPIOC_BSRR = GPIO12; /* LED off */ + // for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + // GPIOC_BRR = GPIO12; /* LED on */ + // for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + + /* Using API functions gpio_set()/gpio_clear(): */ + // gpio_set(GPIOC, GPIO12); /* LED off */ + // for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + // gpio_clear(GPIOC, GPIO12); /* LED on */ + // for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + + /* Using API function gpio_toggle(): */ + //gpio_toggle(GPIOC, GPIO3); /* LED on/off */ + gpio_set(GPIOC, GPIO3); + gpio_clear(GPIOC, GPIO4); + for (i = 0; i < 800000; i++) /* Wait a bit. */ + __asm__("nop"); + gpio_clear(GPIOC, GPIO3); + gpio_set(GPIOC, GPIO4); + for (i = 0; i < 800000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} diff --git a/examples/stm32f2/jobygps/miniblink/miniblink.ld b/examples/stm32f2/jobygps/miniblink/miniblink.ld new file mode 100644 index 00000000..cfe9ab7b --- /dev/null +++ b/examples/stm32f2/jobygps/miniblink/miniblink.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* Linker script for Olimex STM32-H103 (STM32F103RBT6, 128K flash, 20K RAM). */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32f2.ld + diff --git a/examples/stm32f2/jobygps/spi_test/Makefile b/examples/stm32f2/jobygps/spi_test/Makefile new file mode 100644 index 00000000..de4c338c --- /dev/null +++ b/examples/stm32f2/jobygps/spi_test/Makefile @@ -0,0 +1,23 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see . +## + +BINARY = spi_test + +include ../../Makefile.include + diff --git a/examples/stm32f2/jobygps/spi_test/spi_test.c b/examples/stm32f2/jobygps/spi_test/spi_test.c new file mode 100644 index 00000000..b45789ca --- /dev/null +++ b/examples/stm32f2/jobygps/spi_test/spi_test.c @@ -0,0 +1,113 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * Copyright (C) 2011 Henry Hallam + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include + +#include +#include + +void clock_setup(void) +{ + RCC_APB1ENR |= RCC_APB1ENR_SPI2EN; + RCC_APB2ENR |= RCC_APB2ENR_USART1EN; + RCC_AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN; + +} + +void spi_setup(void) +{ + gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13 | GPIO14 | GPIO15); + gpio_set_af(GPIOB, GPIO_AF5, GPIO13 | GPIO14 | GPIO15); + + /* Setup SPI parameters. */ + spi_init_master(SPI2, SPI_CR1_BAUDRATE_FPCLK_DIV_256, SPI_CR1_CPOL, \ + SPI_CR1_CPHA, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST); + spi_enable_ss_output(SPI2); /* Required, see 25.3.1 section about NSS */ + + /* Finally enable the SPI. */ + spi_enable(SPI2); +} + +void usart_setup(void) +{ + gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9); + gpio_set_af(GPIOA, GPIO_AF7, GPIO9|GPIO10); + + /* Setup UART parameters. */ + usart_set_baudrate(USART1, 9600, 16000000); + usart_set_databits(USART1, 8); + usart_set_stopbits(USART1, USART_STOPBITS_1); + usart_set_parity(USART1, USART_PARITY_NONE); + usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE); + usart_set_mode(USART1, USART_MODE_TX); + + /* Finally enable the USART. */ + usart_enable(USART1); +} + +void gpio_setup(void) +{ + gpio_set(GPIOC, GPIO3); + + /* Setup GPIO3 (in GPIO port C) for led use. */ + gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT, + GPIO_MODE_OUTPUT, GPIO3); +} + +int _write (int file, char *ptr, int len) +{ + int i; + + if (file == 1) { + for (i = 0; i < len; i++){ + usart_send_blocking(USART1, ptr[i]); + } + return i; + } + errno = EIO; + return -1; +} + +int main(void) +{ + int counter = 0; + volatile u16 dummy; + + clock_setup(); + gpio_setup(); + usart_setup(); + spi_setup(); + + while (1) + { + counter++; + printf("Hello, world! %i\r\n", counter); + dummy = spi_read(SPI2); /* Stops RX buff overflow, but probably not needed */ + spi_send(SPI2,(u8)counter); + gpio_toggle(GPIOC, GPIO3); + } + + while(1); + return 0; +} diff --git a/examples/stm32f2/jobygps/spi_test/spi_test.ld b/examples/stm32f2/jobygps/spi_test/spi_test.ld new file mode 100644 index 00000000..cfe9ab7b --- /dev/null +++ b/examples/stm32f2/jobygps/spi_test/spi_test.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* Linker script for Olimex STM32-H103 (STM32F103RBT6, 128K flash, 20K RAM). */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32f2.ld + diff --git a/examples/stm32f2/jobygps/usart_printf/Makefile b/examples/stm32f2/jobygps/usart_printf/Makefile new file mode 100644 index 00000000..fb262087 --- /dev/null +++ b/examples/stm32f2/jobygps/usart_printf/Makefile @@ -0,0 +1,23 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see . +## + +BINARY = usart_printf + +include ../../Makefile.include + diff --git a/examples/stm32f2/jobygps/usart_printf/usart_printf.c b/examples/stm32f2/jobygps/usart_printf/usart_printf.c new file mode 100644 index 00000000..f5a4cf58 --- /dev/null +++ b/examples/stm32f2/jobygps/usart_printf/usart_printf.c @@ -0,0 +1,109 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann , + * 2011 Piotr Esden-Tempski + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include + +#include +#include + +void clock_setup(void) +{ + //rcc_clock_setup_in_hse_8mhz_out_72mhz(); + + /* Enable GPIOA clock (for LED GPIOs). */ + //rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + + /* Enable clocks for GPIO port A (for GPIO_USART1_TX) and USART1. */ + //rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | +// RCC_APB2ENR_AFIOEN | +// RCC_APB2ENR_USART1EN); + RCC_APB2ENR |= RCC_APB2ENR_USART1EN; + RCC_AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOAEN; +} + +void usart_setup(void) +{ + gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9); + gpio_set_af(GPIOA, GPIO_AF7, GPIO9|GPIO10); + + /* Setup UART parameters. */ + usart_set_baudrate(USART1, 9600, 16000000); + usart_set_databits(USART1, 8); + usart_set_stopbits(USART1, USART_STOPBITS_1); + usart_set_parity(USART1, USART_PARITY_NONE); + usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE); + usart_set_mode(USART1, USART_MODE_TX); + + /* Finally enable the USART. */ + usart_enable(USART1); +} + +void gpio_setup(void) +{ + gpio_set(GPIOC, GPIO3); + + /* Setup GPIO6 and 7 (in GPIO port A) for led use. */ + gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT, + GPIO_MODE_OUTPUT, GPIO3); +} + +int _write (int file, char *ptr, int len) +{ + int i; + + if (file == 1) { + for (i = 0; i < len; i++){ + usart_send_blocking(USART1, ptr[i]); + } + + return i; + } + + errno = EIO; + return -1; +} + +int main(void) +{ + int counter = 0; + float fcounter = 0.0; + double dcounter = 0.0; + + clock_setup(); + gpio_setup(); + usart_setup(); + + /* + * Write Hello World an integer, float and double all over + * again while incrementing the numbers. + */ + while (1) { + gpio_toggle(GPIOC, GPIO3); + printf("Hello World! %i %f %f\r\n", counter, fcounter, dcounter); + counter++; + fcounter+=0.01; + dcounter+=0.01; + } + + return 0; +} diff --git a/examples/stm32f2/jobygps/usart_printf/usart_printf.ld b/examples/stm32f2/jobygps/usart_printf/usart_printf.ld new file mode 100644 index 00000000..e80bdbda --- /dev/null +++ b/examples/stm32f2/jobygps/usart_printf/usart_printf.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* Linker script for Open-BLDC (STM32F103CBT6, 128K flash, 20K RAM). */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32f2.ld + diff --git a/include/libopencm3/cm3/common.h b/include/libopencm3/cm3/common.h index bbd04cba..08f553ff 100644 --- a/include/libopencm3/cm3/common.h +++ b/include/libopencm3/cm3/common.h @@ -30,10 +30,12 @@ typedef int32_t s32; typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; +typedef uint64_t u64; /* Generic memory-mapped I/O accessor functions */ #define MMIO8(addr) (*(volatile u8 *)(addr)) #define MMIO16(addr) (*(volatile u16 *)(addr)) #define MMIO32(addr) (*(volatile u32 *)(addr)) +#define MMIO64(addr) (*(volatile u64 *)(addr)) #endif diff --git a/include/libopencm3/stm32/adc.h b/include/libopencm3/stm32/f1/adc.h similarity index 100% rename from include/libopencm3/stm32/adc.h rename to include/libopencm3/stm32/f1/adc.h diff --git a/include/libopencm3/stm32/bkp.h b/include/libopencm3/stm32/f1/bkp.h similarity index 100% rename from include/libopencm3/stm32/bkp.h rename to include/libopencm3/stm32/f1/bkp.h diff --git a/include/libopencm3/stm32/dma.h b/include/libopencm3/stm32/f1/dma.h similarity index 100% rename from include/libopencm3/stm32/dma.h rename to include/libopencm3/stm32/f1/dma.h diff --git a/include/libopencm3/stm32/ethernet.h b/include/libopencm3/stm32/f1/ethernet.h similarity index 100% rename from include/libopencm3/stm32/ethernet.h rename to include/libopencm3/stm32/f1/ethernet.h diff --git a/include/libopencm3/stm32/flash.h b/include/libopencm3/stm32/f1/flash.h similarity index 100% rename from include/libopencm3/stm32/flash.h rename to include/libopencm3/stm32/f1/flash.h diff --git a/include/libopencm3/stm32/gpio.h b/include/libopencm3/stm32/f1/gpio.h similarity index 100% rename from include/libopencm3/stm32/gpio.h rename to include/libopencm3/stm32/f1/gpio.h diff --git a/include/libopencm3/stm32/f1/memorymap.h b/include/libopencm3/stm32/f1/memorymap.h new file mode 100644 index 00000000..e3c57c83 --- /dev/null +++ b/include/libopencm3/stm32/f1/memorymap.h @@ -0,0 +1,113 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_MEMORYMAP_H +#define LIBOPENCM3_MEMORYMAP_H + +#include + +/* --- STM32 specific peripheral definitions ------------------------------- */ + +/* Memory map for all busses */ +#define PERIPH_BASE 0x40000000 +#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000) +#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000) +#define PERIPH_BASE_AHB (PERIPH_BASE + 0x18000) + +/* Register boundary addresses */ + +/* APB1 */ +#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000) +#define TIM3_BASE (PERIPH_BASE_APB1 + 0x0400) +#define TIM4_BASE (PERIPH_BASE_APB1 + 0x0800) +#define TIM5_BASE (PERIPH_BASE_APB1 + 0x0c00) +#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000) +#define TIM7_BASE (PERIPH_BASE_APB1 + 0x1400) +#define TIM12_BASE (PERIPH_BASE_APB1 + 0x1800) +#define TIM13_BASE (PERIPH_BASE_APB1 + 0x1c00) +#define TIM14_BASE (PERIPH_BASE_APB1 + 0x2000) +/* PERIPH_BASE_APB1 + 0x2400 (0x4000 2400 - 0x4000 27FF): Reserved */ +#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800) +#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00) +#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000) +/* PERIPH_BASE_APB1 + 0x3400 (0x4000 3400 - 0x4000 37FF): Reserved */ +#define SPI2_I2S_BASE (PERIPH_BASE_APB1 + 0x3800) +#define SPI3_I2S_BASE (PERIPH_BASE_APB1 + 0x3c00) +/* PERIPH_BASE_APB1 + 0x4000 (0x4000 4000 - 0x4000 3FFF): Reserved */ +#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400) +#define USART3_BASE (PERIPH_BASE_APB1 + 0x4800) +#define UART4_BASE (PERIPH_BASE_APB1 + 0x4c00) +#define UART5_BASE (PERIPH_BASE_APB1 + 0x5000) +#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400) +#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800) +#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00) +#define USB_CAN_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000) +#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400) +#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800) +/* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved? Typo? */ +#define BACKUP_REGS_BASE (PERIPH_BASE_APB1 + 0x6c00) +#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) +#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400) +/* PERIPH_BASE_APB1 + 0x7800 (0x4000 7800 - 0x4000 FFFF): Reserved */ + +/* APB2 */ +#define AFIO_BASE (PERIPH_BASE_APB2 + 0x0000) +#define EXTI_BASE (PERIPH_BASE_APB2 + 0x0400) +#define GPIO_PORT_A_BASE (PERIPH_BASE_APB2 + 0x0800) +#define GPIO_PORT_B_BASE (PERIPH_BASE_APB2 + 0x0c00) +#define GPIO_PORT_C_BASE (PERIPH_BASE_APB2 + 0x1000) +#define GPIO_PORT_D_BASE (PERIPH_BASE_APB2 + 0x1400) +#define GPIO_PORT_E_BASE (PERIPH_BASE_APB2 + 0x1800) +#define GPIO_PORT_F_BASE (PERIPH_BASE_APB2 + 0x1c00) +#define GPIO_PORT_G_BASE (PERIPH_BASE_APB2 + 0x2000) +#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2400) +#define ADC2_BASE (PERIPH_BASE_APB2 + 0x2800) +#define TIM1_BASE (PERIPH_BASE_APB2 + 0x2c00) +#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) +#define TIM8_BASE (PERIPH_BASE_APB2 + 0x3400) +#define USART1_BASE (PERIPH_BASE_APB2 + 0x3800) +#define ADC3_BASE (PERIPH_BASE_APB2 + 0x3c00) +/* PERIPH_BASE_APB2 + 0x4000 (0x4001 4000 - 0x4001 4FFF): Reserved */ +#define TIM9_BASE (PERIPH_BASE_APB2 + 0x4c00) +#define TIM10_BASE (PERIPH_BASE_APB2 + 0x5000) +#define TIM11_BASE (PERIPH_BASE_APB2 + 0x5400) +/* PERIPH_BASE_APB2 + 0x5800 (0x4001 5800 - 0x4001 7FFF): Reserved */ + +/* AHB */ +#define SDIO_BASE (PERIPH_BASE_AHB + 0x00000) +/* PERIPH_BASE_AHB + 0x0400 (0x4001 8400 - 0x4001 7FFF): Reserved */ +#define DMA1_BASE (PERIPH_BASE_AHB + 0x08000) +#define DMA2_BASE (PERIPH_BASE_AHB + 0x08400) +/* PERIPH_BASE_AHB + 0x8800 (0x4002 0800 - 0x4002 0FFF): Reserved */ +#define RCC_BASE (PERIPH_BASE_AHB + 0x09000) +/* PERIPH_BASE_AHB + 0x9400 (0x4002 1400 - 0x4002 1FFF): Reserved */ +#define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB + 0x0a000) +#define CRC_BASE (PERIPH_BASE_AHB + 0x0b000) +/* PERIPH_BASE_AHB + 0xb400 (0x4002 3400 - 0x4002 7FFF): Reserved */ +#define ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000) +/* PERIPH_BASE_AHB + 0x18000 (0x4003 0000 - 0x4FFF FFFF): Reserved */ +#define USB_OTG_FS_BASE (PERIPH_BASE_AHB + 0xffe8000) + +/* PPIB */ +#define DBGMCU_BASE (PPBI_BASE + 0x00042000) + +/* FSMC */ +#define FSMC_BASE (PERIPH_BASE + 0x60000000) + +#endif diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h new file mode 100644 index 00000000..b0b32a0f --- /dev/null +++ b/include/libopencm3/stm32/f1/nvic_f1.h @@ -0,0 +1,99 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Piotr Esden-Tempski + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_NVIC_F1_H +#define LIBOPENCM3_NVIC_F1_H + +/* --- IRQ channel numbers-------------------------------------------------- */ + +/* Note: These F1 specific user interrupt definitions supplement the + * general NVIC definitions in ../nvic.h + */ + +/* User Interrupts */ +#define NVIC_WWDG_IRQ 0 +#define NVIC_PVD_IRQ 1 +#define NVIC_TAMPER_IRQ 2 +#define NVIC_RTC_IRQ 3 +#define NVIC_FLASH_IRQ 4 +#define NVIC_RCC_IRQ 5 +#define NVIC_EXTI0_IRQ 6 +#define NVIC_EXTI1_IRQ 7 +#define NVIC_EXTI2_IRQ 8 +#define NVIC_EXTI3_IRQ 9 +#define NVIC_EXTI4_IRQ 10 +#define NVIC_DMA1_CHANNEL1_IRQ 11 +#define NVIC_DMA1_CHANNEL2_IRQ 12 +#define NVIC_DMA1_CHANNEL3_IRQ 13 +#define NVIC_DMA1_CHANNEL4_IRQ 14 +#define NVIC_DMA1_CHANNEL5_IRQ 15 +#define NVIC_DMA1_CHANNEL6_IRQ 16 +#define NVIC_DMA1_CHANNEL7_IRQ 17 +#define NVIC_ADC1_2_IRQ 18 +#define NVIC_USB_HP_CAN_TX_IRQ 19 +#define NVIC_USB_LP_CAN_RX0_IRQ 20 +#define NVIC_CAN_RX1_IRQ 21 +#define NVIC_CAN_SCE_IRQ 22 +#define NVIC_EXTI9_5_IRQ 23 +#define NVIC_TIM1_BRK_IRQ 24 +#define NVIC_TIM1_UP_IRQ 25 +#define NVIC_TIM1_TRG_COM_IRQ 26 +#define NVIC_TIM1_CC_IRQ 27 +#define NVIC_TIM2_IRQ 28 +#define NVIC_TIM3_IRQ 29 +#define NVIC_TIM4_IRQ 30 +#define NVIC_I2C1_EV_IRQ 31 +#define NVIC_I2C1_ER_IRQ 32 +#define NVIC_I2C2_EV_IRQ 33 +#define NVIC_I2C2_ER_IRQ 34 +#define NVIC_SPI1_IRQ 35 +#define NVIC_SPI2_IRQ 36 +#define NVIC_USART1_IRQ 37 +#define NVIC_USART2_IRQ 38 +#define NVIC_USART3_IRQ 39 +#define NVIC_EXTI15_10_IRQ 40 +#define NVIC_RTC_ALARM_IRQ 41 +#define NVIC_USB_WAKEUP_IRQ 42 +#define NVIC_TIM8_BRK_IRQ 43 +#define NVIC_TIM8_UP_IRQ 44 +#define NVIC_TIM8_TRG_COM_IRQ 45 +#define NVIC_TIM8_CC_IRQ 46 +#define NVIC_ADC3_IRQ 47 +#define NVIC_FSMC_IRQ 48 +#define NVIC_SDIO_IRQ 49 +#define NVIC_TIM5_IRQ 50 +#define NVIC_SPI3_IRQ 51 +#define NVIC_USART4_IRQ 52 +#define NVIC_USART5_IRQ 53 +#define NVIC_TIM6_IRQ 54 +#define NVIC_TIM7_IRQ 55 +#define NVIC_DMA2_CHANNEL1_IRQ 56 +#define NVIC_DMA2_CHANNEL2_IRQ 57 +#define NVIC_DMA2_CHANNEL3_IRQ 58 +#define NVIC_DMA2_CHANNEL4_5_IRQ 59 +#define NVIC_DMA2_CHANNEL5_IRQ 60 +#define NVIC_ETH_IRQ 61 +#define NVIC_ETH_WKUP_IRQ 62 +#define NVIC_CAN2_TX_IRQ 63 +#define NVIC_CAN2_RX0_IRQ 64 +#define NVIC_CAN2_RX1_IRQ 65 +#define NVIC_CAN2_SCE_IRQ 66 +#define NVIC_OTG_FS_IRQ 67 + +#endif diff --git a/include/libopencm3/stm32/rcc.h b/include/libopencm3/stm32/f1/rcc.h similarity index 100% rename from include/libopencm3/stm32/rcc.h rename to include/libopencm3/stm32/f1/rcc.h diff --git a/include/libopencm3/stm32/rtc.h b/include/libopencm3/stm32/f1/rtc.h similarity index 100% rename from include/libopencm3/stm32/rtc.h rename to include/libopencm3/stm32/f1/rtc.h diff --git a/include/libopencm3/stm32/scb.h b/include/libopencm3/stm32/f1/scb.h similarity index 100% rename from include/libopencm3/stm32/scb.h rename to include/libopencm3/stm32/f1/scb.h diff --git a/include/libopencm3/stm32/usb.h b/include/libopencm3/stm32/f1/usb.h similarity index 100% rename from include/libopencm3/stm32/usb.h rename to include/libopencm3/stm32/f1/usb.h diff --git a/include/libopencm3/stm32/usb_desc.h b/include/libopencm3/stm32/f1/usb_desc.h similarity index 100% rename from include/libopencm3/stm32/usb_desc.h rename to include/libopencm3/stm32/f1/usb_desc.h diff --git a/include/libopencm3/stm32/f2/flash.h b/include/libopencm3/stm32/f2/flash.h new file mode 100644 index 00000000..15529ea8 --- /dev/null +++ b/include/libopencm3/stm32/f2/flash.h @@ -0,0 +1,153 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2010 Mark Butler + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * For details see: + * PM0042 Programming manual: STM32F10xxx Flash programming + * October 2009, Doc ID 13259 Rev 7 + * http://www.st.com/stonline/products/literature/pm/13259.pdf + */ + +#ifndef LIBOPENCM3_FLASH_H +#define LIBOPENCM3_FLASH_H + +#include +#include + +/* --- FLASH registers ----------------------------------------------------- */ + +#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00) +#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04) +#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08) +#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C) +#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10) +#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14) + +/* --- FLASH_ACR values ---------------------------------------------------- */ + +#define FLASH_DCRST (1 << 12) +#define FLASH_ICRST (1 << 11) +#define FLASH_DCE (1 << 10) +#define FLASH_ICE (1 << 9) +#define FLASH_PRFTEN (1 << 8) +#define FLASH_LATENCY_0WS 0x00 +#define FLASH_LATENCY_1WS 0x01 +#define FLASH_LATENCY_2WS 0x02 +#define FLASH_LATENCY_3WS 0x03 +#define FLASH_LATENCY_4WS 0x04 +#define FLASH_LATENCY_5WS 0x05 +#define FLASH_LATENCY_6WS 0x06 +#define FLASH_LATENCY_7WS 0x07 + +/* --- FLASH_SR values ----------------------------------------------------- */ + +#define FLASH_BSY (1 << 16) +#define FLASH_PGSERR (1 << 7) +#define FLASH_PGPERR (1 << 6) +#define FLASH_PGAERR (1 << 5) +#define FLASH_WRPERR (1 << 4) +#define FLASH_OPERR (1 << 1) +#define FLASH_EOP (1 << 0) + +/* --- FLASH_CR values ----------------------------------------------------- */ + +#define FLASH_LOCK (1 << 31) +#define FLASH_ERRIE (1 << 25) +#define FLASH_EOPIE (1 << 24) +#define FLASH_STRT (1 << 16) +#define FLASH_MER (1 << 2) +#define FLASH_SER (1 << 1) +#define FLASH_PG (1 << 0) +#define FLASH_SECTOR_0 (0x00 << 3) +#define FLASH_SECTOR_1 (0x01 << 3) +#define FLASH_SECTOR_2 (0x02 << 3) +#define FLASH_SECTOR_3 (0x03 << 3) +#define FLASH_SECTOR_4 (0x04 << 3) +#define FLASH_SECTOR_5 (0x05 << 3) +#define FLASH_SECTOR_6 (0x06 << 3) +#define FLASH_SECTOR_7 (0x07 << 3) +#define FLASH_SECTOR_8 (0x08 << 3) +#define FLASH_SECTOR_9 (0x09 << 3) +#define FLASH_SECTOR_10 (0x0a << 3) +#define FLASH_SECTOR_11 (0x0b << 3) +#define FLASH_PROGRAM_X8 (0x00 << 8) +#define FLASH_PROGRAM_X16 (0x01 << 8) +#define FLASH_PROGRAM_X32 (0x02 << 8) +#define FLASH_PROGRAM_X64 (0x03 << 8) + +/* --- FLASH_OPTCR values -------------------------------------------------- */ + +/* FLASH_OPTCR[27:16]: nWRP */ +/* FLASH_OBR[15:8]: RDP */ +#define FLASH_NRST_STDBY (1 << 7) +#define FLASH_NRST_STOP (1 << 6) +#define FLASH_WDG_SW (1 << 5) +#define FLASH_OPTSTRT (1 << 1) +#define FLASH_OPTLOCK (1 << 0) +#define FLASH_BOR_LEVEL_3 (0x00 << 2) +#define FLASH_BOR_LEVEL_2 (0x01 << 2) +#define FLASH_BOR_LEVEL_1 (0x02 << 2) +#define FLASH_BOR_OFF (0x03 << 2) + +/* --- FLASH Keys -----------------------------------------------------------*/ + +#define FLASH_KEY1 ((u32)0x45670123) +#define FLASH_KEY2 ((u32)0xcdef89ab) +#define FLASH_OPTKEY1 ((u32)0x08192a3b) +#define FLASH_OPTKEY2 ((u32)0x4c5d6e7f) + +/* --- Function prototypes ------------------------------------------------- */ + +void flash_dcache_enable(void); +void flash_dcache_disable(void); +void flash_icache_enable(void); +void flash_icache_disable(void); +void flash_prefetch_enable(void); +void flash_prefetch_disable(void); +void flash_dcache_reset(void); +void flash_icache_reset(void); +void flash_set_ws(u32 ws); +void flash_unlock(void); +void flash_lock(void); +void flash_clear_pgserr_flag(void); +void flash_clear_pgperr_flag(void); +void flash_clear_pgaerr_flag(void); +void flash_clear_eop_flag(void); +void flash_clear_wrperr_flag(void); +void flash_clear_bsy_flag(void); +void flash_clear_status_flags(void); +void flash_unlock_option_bytes(void); +void flash_lock_option_bytes(void); +void flash_erase_all_sectors(u32 program_size); +void flash_erase_sector(u32 sector, u32 program_size); +void flash_program_double_word(u32 address, u64 data, u32 program_size); +void flash_program_word(u32 address, u32 data, u32 program_size); +void flash_program_half_word(u32 address, u16 data, u32 program_size); +void flash_program_byte(u32 address, u8 data, u32 program_size); +void flash_wait_for_last_operation(void); +void flash_program_option_bytes(u32 data); + +#if 0 +// TODO: Implement support for option bytes +void flash_erase_option_bytes(void); +void flash_program_option_bytes(u32 address, u16 data); +#endif + +#endif diff --git a/include/libopencm3/stm32/f2/gpio.h b/include/libopencm3/stm32/f2/gpio.h new file mode 100644 index 00000000..b4fb4f34 --- /dev/null +++ b/include/libopencm3/stm32/f2/gpio.h @@ -0,0 +1,278 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_GPIO_H +#define LIBOPENCM3_GPIO_H + +#include +#include + +/* --- Convenience macros -------------------------------------------------- */ + +/* GPIO port base addresses (for convenience) */ +#define GPIOA GPIO_PORT_A_BASE +#define GPIOB GPIO_PORT_B_BASE +#define GPIOC GPIO_PORT_C_BASE +#define GPIOD GPIO_PORT_D_BASE +#define GPIOE GPIO_PORT_E_BASE +#define GPIOF GPIO_PORT_F_BASE +#define GPIOG GPIO_PORT_G_BASE +#define GPIOH GPIO_PORT_H_BASE +#define GPIOI GPIO_PORT_I_BASE + +/* GPIO number definitions (for convenience) */ +#define GPIO0 (1 << 0) +#define GPIO1 (1 << 1) +#define GPIO2 (1 << 2) +#define GPIO3 (1 << 3) +#define GPIO4 (1 << 4) +#define GPIO5 (1 << 5) +#define GPIO6 (1 << 6) +#define GPIO7 (1 << 7) +#define GPIO8 (1 << 8) +#define GPIO9 (1 << 9) +#define GPIO10 (1 << 10) +#define GPIO11 (1 << 11) +#define GPIO12 (1 << 12) +#define GPIO13 (1 << 13) +#define GPIO14 (1 << 14) +#define GPIO15 (1 << 15) +#define GPIO_ALL 0xffff + +/* --- GPIO registers ------------------------------------------------------ */ + +/* Port mode register (GPIOx_MODER) */ +#define GPIO_MODER(port) MMIO32(port + 0x00) +#define GPIOA_MODER GPIO_MODER(GPIOA) +#define GPIOB_MODER GPIO_MODER(GPIOB) +#define GPIOC_MODER GPIO_MODER(GPIOC) +#define GPIOD_MODER GPIO_MODER(GPIOD) +#define GPIOE_MODER GPIO_MODER(GPIOE) +#define GPIOF_MODER GPIO_MODER(GPIOF) +#define GPIOG_MODER GPIO_MODER(GPIOG) +#define GPIOH_MODER GPIO_MODER(GPIOH) +#define GPIOI_MODER GPIO_MODER(GPIOI) + +/* Port output type register (GPIOx_OTYPER) */ +#define GPIO_OTYPER(port) MMIO32(port + 0x04) +#define GPIOA_OTYPER GPIO_OTYPER(GPIOA) +#define GPIOB_OTYPER GPIO_OTYPER(GPIOB) +#define GPIOC_OTYPER GPIO_OTYPER(GPIOC) +#define GPIOD_OTYPER GPIO_OTYPER(GPIOD) +#define GPIOE_OTYPER GPIO_OTYPER(GPIOE) +#define GPIOF_OTYPER GPIO_OTYPER(GPIOF) +#define GPIOG_OTYPER GPIO_OTYPER(GPIOG) +#define GPIOH_OTYPER GPIO_OTYPER(GPIOH) +#define GPIOI_OTYPER GPIO_OTYPER(GPIOI) + +/* Port output speed register (GPIOx_OSPEEDR) */ +#define GPIO_OSPEEDR(port) MMIO32(port + 0x08) +#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA) +#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB) +#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC) +#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD) +#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE) +#define GPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF) +#define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG) +#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH) +#define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI) + +/* Port pull-up/pull-down register (GPIOx_PUPDR) */ +#define GPIO_PUPDR(port) MMIO32(port + 0x0C) +#define GPIOA_PUPDR GPIO_PUPDR(GPIOA) +#define GPIOB_PUPDR GPIO_PUPDR(GPIOB) +#define GPIOC_PUPDR GPIO_PUPDR(GPIOC) +#define GPIOD_PUPDR GPIO_PUPDR(GPIOD) +#define GPIOE_PUPDR GPIO_PUPDR(GPIOE) +#define GPIOF_PUPDR GPIO_PUPDR(GPIOF) +#define GPIOG_PUPDR GPIO_PUPDR(GPIOG) +#define GPIOH_PUPDR GPIO_PUPDR(GPIOH) +#define GPIOI_PUPDR GPIO_PUPDR(GPIOI) + +/* Port input data register (GPIOx_IDR) */ +#define GPIO_IDR(port) MMIO32(port + 0x10) +#define GPIOA_IDR GPIO_IDR(GPIOA) +#define GPIOB_IDR GPIO_IDR(GPIOB) +#define GPIOC_IDR GPIO_IDR(GPIOC) +#define GPIOD_IDR GPIO_IDR(GPIOD) +#define GPIOE_IDR GPIO_IDR(GPIOE) +#define GPIOF_IDR GPIO_IDR(GPIOF) +#define GPIOG_IDR GPIO_IDR(GPIOG) +#define GPIOH_IDR GPIO_IDR(GPIOH) +#define GPIOI_IDR GPIO_IDR(GPIOI) + +/* Port output data register (GPIOx_ODR) */ +#define GPIO_ODR(port) MMIO32(port + 0x14) +#define GPIOA_ODR GPIO_ODR(GPIOA) +#define GPIOB_ODR GPIO_ODR(GPIOB) +#define GPIOC_ODR GPIO_ODR(GPIOC) +#define GPIOD_ODR GPIO_ODR(GPIOD) +#define GPIOE_ODR GPIO_ODR(GPIOE) +#define GPIOF_ODR GPIO_ODR(GPIOF) +#define GPIOG_ODR GPIO_ODR(GPIOG) +#define GPIOH_ODR GPIO_ODR(GPIOH) +#define GPIOI_ODR GPIO_ODR(GPIOI) + +/* Port bit set/reset register (GPIOx_BSRR) */ +#define GPIO_BSRR(port) MMIO32(port + 0x18) +#define GPIOA_BSRR GPIO_BSRR(GPIOA) +#define GPIOB_BSRR GPIO_BSRR(GPIOB) +#define GPIOC_BSRR GPIO_BSRR(GPIOC) +#define GPIOD_BSRR GPIO_BSRR(GPIOD) +#define GPIOE_BSRR GPIO_BSRR(GPIOE) +#define GPIOF_BSRR GPIO_BSRR(GPIOF) +#define GPIOG_BSRR GPIO_BSRR(GPIOG) +#define GPIOH_BSRR GPIO_BSRR(GPIOH) +#define GPIOI_BSRR GPIO_BSRR(GPIOI) + +/* Port configuration lock register (GPIOx_LCKR) */ +#define GPIO_LCKR(port) MMIO32(port + 0x1C) +#define GPIOA_LCKR GPIO_LCKR(GPIOA) +#define GPIOB_LCKR GPIO_LCKR(GPIOB) +#define GPIOC_LCKR GPIO_LCKR(GPIOC) +#define GPIOD_LCKR GPIO_LCKR(GPIOD) +#define GPIOE_LCKR GPIO_LCKR(GPIOE) +#define GPIOF_LCKR GPIO_LCKR(GPIOF) +#define GPIOG_LCKR GPIO_LCKR(GPIOG) +#define GPIOH_LCKR GPIO_LCKR(GPIOH) +#define GPIOI_LCKR GPIO_LCKR(GPIOI) + +/* Alternate function low register (GPIOx_AFRL) */ +#define GPIO_AFRL(port) MMIO32(port + 0x20) +#define GPIOA_AFRL GPIO_AFRL(GPIOA) +#define GPIOB_AFRL GPIO_AFRL(GPIOB) +#define GPIOC_AFRL GPIO_AFRL(GPIOC) +#define GPIOD_AFRL GPIO_AFRL(GPIOD) +#define GPIOE_AFRL GPIO_AFRL(GPIOE) +#define GPIOF_AFRL GPIO_AFRL(GPIOF) +#define GPIOG_AFRL GPIO_AFRL(GPIOG) +#define GPIOH_AFRL GPIO_AFRL(GPIOH) +#define GPIOI_AFRL GPIO_AFRL(GPIOI) + +/* Alternate function high register (GPIOx_AFRH) */ +#define GPIO_AFRH(port) MMIO32(port + 0x24) +#define GPIOA_AFRH GPIO_AFRH(GPIOA) +#define GPIOB_AFRH GPIO_AFRH(GPIOB) +#define GPIOC_AFRH GPIO_AFRH(GPIOC) +#define GPIOD_AFRH GPIO_AFRH(GPIOD) +#define GPIOE_AFRH GPIO_AFRH(GPIOE) +#define GPIOF_AFRH GPIO_AFRH(GPIOF) +#define GPIOG_AFRH GPIO_AFRH(GPIOG) +#define GPIOH_AFRH GPIO_AFRH(GPIOH) +#define GPIOI_AFRH GPIO_AFRH(GPIOI) + +/* --- GPIOx_MODER values -------------------------------------------------- */ + +#define GPIO_MODE(n, mode) (mode << (2*(n))) +#define GPIO_MODE_MASK(n) (0x3 << (2*(n))) +#define GPIO_MODE_INPUT 0x0 +#define GPIO_MODE_OUTPUT 0x1 +#define GPIO_MODE_AF 0x2 +#define GPIO_MODE_ANALOG 0x3 + +/* --- GPIOx_OTYPER values ------------------------------------------------- */ + +#define GPIO_OTYPE_PP 0x0 +#define GPIO_OTYPE_OD 0x1 + +/* --- GPIOx_OSPEEDR values ------------------------------------------------ */ + +#define GPIO_OSPEED(n, speed) (speed << (2*(n))) +#define GPIO_OSPEED_MASK(n) (0x3 << (2*(n))) +#define GPIO_OSPEED_2MHZ 0x0 +#define GPIO_OSPEED_25MHZ 0x1 +#define GPIO_OSPEED_50MHZ 0x2 +#define GPIO_OSPEED_100MHZ 0x3 + +/* --- GPIOx_PUPDR values -------------------------------------------------- */ + +#define GPIO_PUPD(n, pupd) (pupd << (2*(n))) +#define GPIO_PUPD_MASK(n) (0x3 << (2*(n))) +#define GPIO_PUPD_NONE 0x0 +#define GPIO_PUPD_PULLUP 0x1 +#define GPIO_PUPD_PULLDOWN 0x2 + +/* --- GPIOx_IDR values ---------------------------------------------------- */ + +/* GPIOx_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */ + +/* --- GPIOx_ODR values ---------------------------------------------------- */ + +/* GPIOx_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */ + +/* --- GPIOx_BSRR values --------------------------------------------------- */ + +/* GPIOx_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */ +/* GPIOx_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */ + +/* --- GPIOx_LCKR values --------------------------------------------------- */ + +#define GPIO_LCKK (1 << 16) +/* GPIOx_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */ + +/* --- GPIOx_AFRL/H values ------------------------------------------------- */ + +/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */ +/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */ + +#define GPIO_AFR(n, af) (af << ((n)*4)) +#define GPIO_AFR_MASK(n) (0xF << ((n)*4)) +#define GPIO_AF0 0x0 +#define GPIO_AF1 0x1 +#define GPIO_AF2 0x2 +#define GPIO_AF3 0x3 +#define GPIO_AF4 0x4 +#define GPIO_AF5 0x5 +#define GPIO_AF6 0x6 +#define GPIO_AF7 0x7 +#define GPIO_AF8 0x8 +#define GPIO_AF9 0x9 +#define GPIO_AF10 0xA +#define GPIO_AF11 0xB +#define GPIO_AF12 0xC +#define GPIO_AF13 0xD +#define GPIO_AF14 0xE +#define GPIO_AF15 0xF + +/* Note: EXTI source selection is now in the SYSCFG peripheral. */ + +/* --- Function prototypes ------------------------------------------------- */ + +/* + * Note: The F2 series has a completely new GPIO peripheral with different + * configuration options. Here we implement a different API partly to more + * closely match the peripheral capabilities and also to deliberately break + * compatibility with old F1 code so there is no confusion with similar + * sounding functions that have very different functionality. + */ + +void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios); +void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios); +void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios); + +/* This part of the API is compatible with the F1 series ------------------- */ +void gpio_set(u32 gpioport, u16 gpios); +void gpio_clear(u32 gpioport, u16 gpios); +u16 gpio_get(u32 gpioport, u16 gpios); +void gpio_toggle(u32 gpioport, u16 gpios); +u16 gpio_port_read(u32 gpioport); +void gpio_port_write(u32 gpioport, u16 data); +void gpio_port_config_lock(u32 gpioport, u16 gpios); + +#endif diff --git a/include/libopencm3/stm32/f2/memorymap.h b/include/libopencm3/stm32/f2/memorymap.h new file mode 100644 index 00000000..9fe77fab --- /dev/null +++ b/include/libopencm3/stm32/f2/memorymap.h @@ -0,0 +1,131 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_MEMORYMAP_H +#define LIBOPENCM3_MEMORYMAP_H + +#include + +/* --- STM32F20x specific peripheral definitions ------------------------------- */ + +/* Memory map for all busses */ +#define PERIPH_BASE 0x40000000 +#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000) +#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000) +#define PERIPH_BASE_AHB1 (PERIPH_BASE + 0x20000) +#define PERIPH_BASE_AHB2 0x50000000 +#define PERIPH_BASE_AHB3 0x60000000 + +/* Register boundary addresses */ + +/* APB1 */ +#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000) +#define TIM3_BASE (PERIPH_BASE_APB1 + 0x0400) +#define TIM4_BASE (PERIPH_BASE_APB1 + 0x0800) +#define TIM5_BASE (PERIPH_BASE_APB1 + 0x0c00) +#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000) +#define TIM7_BASE (PERIPH_BASE_APB1 + 0x1400) +#define TIM12_BASE (PERIPH_BASE_APB1 + 0x1800) +#define TIM13_BASE (PERIPH_BASE_APB1 + 0x1c00) +#define TIM14_BASE (PERIPH_BASE_APB1 + 0x2000) +/* PERIPH_BASE_APB1 + 0x2400 (0x4000 2400 - 0x4000 27FF): Reserved */ +#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800) +#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00) +#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000) +/* PERIPH_BASE_APB1 + 0x3400 (0x4000 3400 - 0x4000 37FF): Reserved */ +#define SPI2_I2S_BASE (PERIPH_BASE_APB1 + 0x3800) +#define SPI3_I2S_BASE (PERIPH_BASE_APB1 + 0x3c00) +/* PERIPH_BASE_APB1 + 0x4000 (0x4000 4000 - 0x4000 3FFF): Reserved */ +#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400) +#define USART3_BASE (PERIPH_BASE_APB1 + 0x4800) +#define UART4_BASE (PERIPH_BASE_APB1 + 0x4c00) +#define UART5_BASE (PERIPH_BASE_APB1 + 0x5000) +#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400) +#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800) +#define I2C3_BASE (PERIPH_BASE_APB1 + 0x5C00) +/* PERIPH_BASE_APB1 + 0x6000 (0x4000 6000 - 0x4000 63FF): Reserved */ +#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400) +#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800) +/* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */ +#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) +#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400) +/* PERIPH_BASE_APB1 + 0x7800 (0x4000 7800 - 0x4000 FFFF): Reserved */ + +/* APB2 */ +#define TIM1_BASE (PERIPH_BASE_APB2 + 0x0000) +#define TIM8_BASE (PERIPH_BASE_APB2 + 0x0400) +/* PERIPH_BASE_APB2 + 0x0800 (0x4001 0800 - 0x4001 0FFF): Reserved */ +#define USART1_BASE (PERIPH_BASE_APB2 + 0x1000) +#define USART6_BASE (PERIPH_BASE_APB2 + 0x1400) +/* PERIPH_BASE_APB2 + 0x1800 (0x4001 1800 - 0x4001 1FFF): Reserved */ +#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2000) +#define ADC2_BASE (PERIPH_BASE_APB2 + 0x2000) +#define ADC3_BASE (PERIPH_BASE_APB2 + 0x2000) +/* PERIPH_BASE_APB2 + 0x2400 (0x4001 2400 - 0x4001 27FF): Reserved */ +#define SDIO_BASE (PERIPH_BASE_APB2 + 0x2800) +/* PERIPH_BASE_APB2 + 0x2C00 (0x4001 2C00 - 0x4001 2FFF): Reserved */ +#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) +/* PERIPH_BASE_APB2 + 0x3400 (0x4001 3400 - 0x4001 37FF): Reserved */ +#define SYSCFG_BASE (PERIPH_BASE_APB2 + 0x3800) +#define EXTI_BASE (PERIPH_BASE_APB2 + 0x3C00) +#define TIM9_BASE (PERIPH_BASE_APB2 + 0x4000) +#define TIM10_BASE (PERIPH_BASE_APB2 + 0x4400) +#define TIM11_BASE (PERIPH_BASE_APB2 + 0x4800) +/* PERIPH_BASE_APB2 + 0x4C00 (0x4001 4C00 - 0x4001 FFFF): Reserved */ + +/* AHB1 */ +#define GPIO_PORT_A_BASE (PERIPH_BASE_AHB1 + 0x0000) +#define GPIO_PORT_B_BASE (PERIPH_BASE_AHB1 + 0x0400) +#define GPIO_PORT_C_BASE (PERIPH_BASE_AHB1 + 0x0800) +#define GPIO_PORT_D_BASE (PERIPH_BASE_AHB1 + 0x0C00) +#define GPIO_PORT_E_BASE (PERIPH_BASE_AHB1 + 0x1000) +#define GPIO_PORT_F_BASE (PERIPH_BASE_AHB1 + 0x1400) +#define GPIO_PORT_G_BASE (PERIPH_BASE_AHB1 + 0x1800) +#define GPIO_PORT_H_BASE (PERIPH_BASE_AHB1 + 0x1C00) +#define GPIO_PORT_I_BASE (PERIPH_BASE_AHB1 + 0x2000) +/* PERIPH_BASE_AHB1 + 0x2400 (0x4002 2400 - 0x4002 2FFF): Reserved */ +#define CRC_BASE (PERIPH_BASE_AHB1 + 0x3000) +/* PERIPH_BASE_AHB1 + 0x3400 (0x4002 3400 - 0x4002 37FF): Reserved */ +#define RCC_BASE (PERIPH_BASE_AHB1 + 0x3800) +#define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x3C00) +#define BKPSRAM_BASE (PERIPH_BASE_AHB1 + 0x4000) +/* PERIPH_BASE_AHB1 + 0x5000 (0x4002 5000 - 0x4002 5FFF): Reserved */ +#define DMA1_BASE (PERIPH_BASE_AHB1 + 0x6000) +#define DMA2_BASE (PERIPH_BASE_AHB1 + 0x6400) +/* PERIPH_BASE_AHB1 + 0x6800 (0x4002 6800 - 0x4002 7FFF): Reserved */ +#define ETHERNET_BASE (PERIPH_BASE_AHB1 + 0x8000) +/* PERIPH_BASE_AHB1 + 0x9400 (0x4002 9400 - 0x4003 FFFF): Reserved */ +#define USB_OTG_HS_BASE (PERIPH_BASE_AHB1 + 0x20000) +/* PERIPH_BASE_AHB1 + 0x60000 (0x4008 0000 - 0x4FFF FFFF): Reserved */ + +/* AHB2 */ +#define USB_OTG_FS_BASE (PERIPH_BASE_AHB2 + 0x0000) +/* PERIPH_BASE_AHB2 + 0x40000 (0x5004 0000 - 0x5004 FFFF): Reserved */ +#define DCMI_BASE (PERIPH_BASE_AHB2 + 0x50000) +/* PERIPH_BASE_AHB2 + 0x50400 (0x5005 0400 - 0x5006 07FF): Reserved */ +#define RNG_BASE (PERIPH_BASE_AHB2 + 0x60800) +/* PERIPH_BASE_AHB2 + 0x61000 (0x5006 1000 - 0x5FFF FFFF): Reserved */ + +/* AHB3 */ +#define FSMC_BASE (PERIPH_BASE_AHB3 + 0x40000000) + +/* PPIB */ +#define DBGMCU_BASE (PPBI_BASE + 0x00042000) + +#endif diff --git a/include/libopencm3/stm32/f2/nvic_f2.h b/include/libopencm3/stm32/f2/nvic_f2.h new file mode 100644 index 00000000..99c64e38 --- /dev/null +++ b/include/libopencm3/stm32/f2/nvic_f2.h @@ -0,0 +1,112 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_NVIC_F2_H +#define LIBOPENCM3_NVIC_F2_H + +/* --- IRQ channel numbers-------------------------------------------------- */ + +/* Note: These F2 specific user interrupt definitions supplement the + * general NVIC definitions in ../nvic.h + */ + +/* User Interrupts */ +#define NVIC_NVIC_WWDG_IRQ 0 +#define NVIC_PVD_IRQ 1 +#define NVIC_TAMP_STAMP_IRQ 2 +#define NVIC_RTC_WKUP_IRQ 3 +#define NVIC_FLASH_IRQ 4 +#define NVIC_RCC_IRQ 5 +#define NVIC_EXTI0_IRQ 6 +#define NVIC_EXTI1_IRQ 7 +#define NVIC_EXTI2_IRQ 8 +#define NVIC_EXTI3_IRQ 9 +#define NVIC_EXTI4_IRQ 10 +#define NVIC_DMA1_STREAM0_IRQ 11 +#define NVIC_DMA1_STREAM1_IRQ 12 +#define NVIC_DMA1_STREAM2_IRQ 13 +#define NVIC_DMA1_STREAM3_IRQ 14 +#define NVIC_DMA1_STREAM4_IRQ 15 +#define NVIC_DMA1_STREAM5_IRQ 16 +#define NVIC_DMA1_STREAM6_IRQ 17 +#define NVIC_ADC_IRQ 18 +#define NVIC_CAN1_TX_IRQ 19 +#define NVIC_CAN1_RX0_IRQ 20 +#define NVIC_CAN1_RX1_IRQ 21 +#define NVIC_CAN1_SCE_IRQ 22 +#define NVIC_EXTI9_5_IRQ 23 +#define NVIC_TIM1_BRK_TIM9_IRQ 24 +#define NVIC_TIM1_UP_TIM10_IRQ 25 +#define NVIC_TIM1_TRG_COM_TIM11_IRQ 26 +#define NVIC_TIM1_CC_IRQ 27 +#define NVIC_TIM2_IRQ 28 +#define NVIC_TIM3_IRQ 29 +#define NVIC_TIM4_IRQ 30 +#define NVIC_I2C1_EV_IRQ 31 +#define NVIC_I2C1_ER_IRQ 32 +#define NVIC_I2C2_EV_IRQ 33 +#define NVIC_I2C2_ER_IRQ 34 +#define NVIC_SPI1_IRQ 35 +#define NVIC_SPI2_IRQ 36 +#define NVIC_USART1_IRQ 37 +#define NVIC_USART2_IRQ 38 +#define NVIC_USART3_IRQ 39 +#define NVIC_EXTI15_10_IRQ 40 +#define NVIC_RTC_ALARM_IRQ 41 +#define NVIC_USB_FS_WKUP_IRQ 42 +#define NVIC_TIM8_BRK_TIM12_IRQ 43 +#define NVIC_TIM8_UP_TIM13_IRQ 44 +#define NVIC_TIM8_TRG_COM_TIM14_IRQ 45 +#define NVIC_TIM8_CC_IRQ 46 +#define NVIC_DMA1_STREAM7_IRQ 47 +#define NVIC_FSMC_IRQ 48 +#define NVIC_SDIO_IRQ 49 +#define NVIC_TIM5_IRQ 50 +#define NVIC_SPI3_IRQ 51 +#define NVIC_USART4_IRQ 52 +#define NVIC_USART5_IRQ 53 +#define NVIC_TIM6_DAC_IRQ 54 +#define NVIC_TIM7_IRQ 55 +#define NVIC_DMA2_STREAM0_IRQ 56 +#define NVIC_DMA2_STREAM1_IRQ 57 +#define NVIC_DMA2_STREAM2_IRQ 58 +#define NVIC_DMA2_STREAM3_IRQ 59 +#define NVIC_DMA2_STREAM4_IRQ 60 +#define NVIC_ETH_IRQ 61 +#define NVIC_ETH_WKUP_IRQ 62 +#define NVIC_CAN2_TX_IRQ 63 +#define NVIC_CAN2_RX0_IRQ 64 +#define NVIC_CAN2_RX1_IRQ 65 +#define NVIC_CAN2_SCE_IRQ 66 +#define NVIC_OTG_FS_IRQ 67 +#define NVIC_DMA2_STREAM5_IRQ 68 +#define NVIC_DMA2_STREAM6_IRQ 69 +#define NVIC_DMA2_STREAM7_IRQ 70 +#define NVIC_USART6_IRQ 71 +#define NVIC_I2C3_EV_IRQ 72 +#define NVIC_I2C3_ER_IRQ 73 +#define NVIC_OTG_HS_EP1_OUT_IRQ 74 +#define NVIC_OTG_HS_EP1_IN_IRQ 75 +#define NVIC_OTG_HS_WKUP_IRQ 76 +#define NVIC_OTG_HS_IRQ 77 +#define NVIC_DCMI_IRQ 78 +#define NVIC_CRYP_IRQ 79 +#define NVIC_HASH_RNG_IRQ 80 + +#endif diff --git a/include/libopencm3/stm32/f2/pwr.h b/include/libopencm3/stm32/f2/pwr.h new file mode 100644 index 00000000..7cf8dabf --- /dev/null +++ b/include/libopencm3/stm32/f2/pwr.h @@ -0,0 +1,40 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_PWR_F2_H +#define LIBOPENCM3_PWR_F2_H + +#include + +/* + * This file extends the version in stm_common with definitions only + * applicable to the STM32F2 series of devices. + */ + +/* --- PWR_CR values ------------------------------------------------------- */ + +/* FPDS: Flash power down in stop mode, only available in F2 family devices. */ +#define PWR_CR_FPDS (1 << 9) + +/* --- PWR_CSR values ------------------------------------------------------ */ + +/* BRE: Backup regulator enable */ +#define PWR_CSR_BRE (1 << 9) + +#endif diff --git a/include/libopencm3/stm32/f2/rcc.h b/include/libopencm3/stm32/f2/rcc.h new file mode 100644 index 00000000..ba24c86b --- /dev/null +++ b/include/libopencm3/stm32/f2/rcc.h @@ -0,0 +1,492 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2009 Federico Ruiz-Ugalde + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_RCC_H +#define LIBOPENCM3_RCC_H + +#include +#include + +/* --- RCC registers ------------------------------------------------------- */ + +#define RCC_CR MMIO32(RCC_BASE + 0x00) +#define RCC_PLLCFGR MMIO32(RCC_BASE + 0x04) +#define RCC_CFGR MMIO32(RCC_BASE + 0x08) +#define RCC_CIR MMIO32(RCC_BASE + 0x0c) +#define RCC_AHB1RSTR MMIO32(RCC_BASE + 0x10) +#define RCC_AHB2RSTR MMIO32(RCC_BASE + 0x14) +#define RCC_AHB3RSTR MMIO32(RCC_BASE + 0x18) +/* RCC_BASE + 0x1C Reserved */ +#define RCC_APB1RSTR MMIO32(RCC_BASE + 0x20) +#define RCC_APB2RSTR MMIO32(RCC_BASE + 0x24) +/* RCC_BASE + 0x28 Reserved */ +/* RCC_BASE + 0x2C Reserved */ +#define RCC_AHB1ENR MMIO32(RCC_BASE + 0x30) +#define RCC_AHB2ENR MMIO32(RCC_BASE + 0x34) +#define RCC_AHB3ENR MMIO32(RCC_BASE + 0x38) +/* RCC_BASE + 0x3C Reserved */ +#define RCC_APB1ENR MMIO32(RCC_BASE + 0x40) +#define RCC_APB2ENR MMIO32(RCC_BASE + 0x44) +/* RCC_BASE + 0x48 Reserved */ +/* RCC_BASE + 0x4C Reserved */ +#define RCC_AHB1LPENR MMIO32(RCC_BASE + 0x50) +#define RCC_AHB2LPENR MMIO32(RCC_BASE + 0x54) +#define RCC_AHB3LPENR MMIO32(RCC_BASE + 0x58) +/* RCC_BASE + 0x5C Reserved */ +#define RCC_APB1LPENR MMIO32(RCC_BASE + 0x60) +#define RCC_APB2LPENR MMIO32(RCC_BASE + 0x64) +/* RCC_BASE + 0x68 Reserved */ +/* RCC_BASE + 0x6C Reserved */ +#define RCC_BDCR MMIO32(RCC_BASE + 0x70) +#define RCC_CSR MMIO32(RCC_BASE + 0x74) +/* RCC_BASE + 0x78 Reserved */ +/* RCC_BASE + 0x7C Reserved */ +#define RCC_SSCGR MMIO32(RCC_BASE + 0x80) +#define RCC_PLLI2SCFGR MMIO32(RCC_BASE + 0x84) + +/* --- RCC_CR values ------------------------------------------------------- */ + +#define RCC_CR_PLLI2SRDY (1 << 27) +#define RCC_CR_PLLI2SON (1 << 26) +#define RCC_CR_PLLRDY (1 << 25) +#define RCC_CR_PLLON (1 << 24) +#define RCC_CR_CSSON (1 << 19) +#define RCC_CR_HSEBYP (1 << 18) +#define RCC_CR_HSERDY (1 << 17) +#define RCC_CR_HSEON (1 << 16) +/* HSICAL: [15:8] */ +/* HSITRIM: [7:3] */ +#define RCC_CR_HSIRDY (1 << 1) +#define RCC_CR_HSION (1 << 0) + +/* --- RCC_PLLCFGR values ------------------------------------------------------- */ + +/* PLLQ: [27:24] */ +#define RCC_PLLCFGR_PLLQ_SHIFT 24 +#define RCC_PLLCFGR_PLLSRC (1 << 22) +/* PLLP: [17:16] */ +#define RCC_PLLCFGR_PLLP_SHIFT 16 +/* PLLN: [14:6] */ +#define RCC_PLLCFGR_PLLN_SHIFT 6 +/* PLLM: [5:0] */ +#define RCC_PLLCFGR_PLLM_SHIFT 0 + +/* --- RCC_CFGR values ----------------------------------------------------- */ + +/* MCO2: Microcontroller clock output 2 */ +#define RCC_CFGR_MCO2_SHIFT 30 +#define RCC_CFGR_MCO2_SYSCLK 0x0 +#define RCC_CFGR_MCO2_PLLI2S 0x1 +#define RCC_CFGR_MCO2_HSE 0x2 +#define RCC_CFGR_MCO2_PLL 0x3 + +/* MCO1/2PRE: MCO Prescalers */ +#define RCC_CFGR_MCO2PRE_SHIFT 27 +#define RCC_CFGR_MCO1PRE_SHIFT 24 +#define RCC_CFGR_MCOPRE_DIV_NONE 0x0 +#define RCC_CFGR_MCOPRE_DIV_2 0x4 +#define RCC_CFGR_MCOPRE_DIV_3 0x5 +#define RCC_CFGR_MCOPRE_DIV_4 0x6 +#define RCC_CFGR_MCOPRE_DIV_5 0x7 + +/* I2SSRC: I2S clock selection */ +#define RCC_CFGR_I2SSRC (1 << 23) + +/* MCO1: Microcontroller clock output 1 */ +#define RCC_CFGR_MCO1_SHIFT 21 +#define RCC_CFGR_MCO1_HSI 0x0 +#define RCC_CFGR_MCO1_LSE 0x1 +#define RCC_CFGR_MCO1_HSE 0x2 +#define RCC_CFGR_MCO1_PLL 0x3 + +/* RTCPRE: HSE division factor for RTC clock */ +#define RCC_CFGR_RTCPRE_SHIFT 21 + +/* PPRE1/2: APB high-speed prescalers */ +#define RCC_CFGR_PPRE2_SHIFT 13 +#define RCC_CFGR_PPRE1_SHIFT 10 +#define RCC_CFGR_PPRE_DIV_NONE 0x0 +#define RCC_CFGR_PPRE_DIV_2 0x4 +#define RCC_CFGR_PPRE_DIV_4 0x5 +#define RCC_CFGR_PPRE_DIV_8 0x6 +#define RCC_CFGR_PPRE_DIV_16 0x7 + +/* HPRE: AHB high-speed prescaler */ +#define RCC_CFGR_HPRE_SHIFT 4 +#define RCC_CFGR_HPRE_DIV_NONE 0x0 +#define RCC_CFGR_HPRE_DIV_2 (0x8+0) +#define RCC_CFGR_HPRE_DIV_4 (0x8+1) +#define RCC_CFGR_HPRE_DIV_8 (0x8+2) +#define RCC_CFGR_HPRE_DIV_16 (0x8+3) +#define RCC_CFGR_HPRE_DIV_64 (0x8+4) +#define RCC_CFGR_HPRE_DIV_128 (0x8+5) +#define RCC_CFGR_HPRE_DIV_256 (0x8+6) +#define RCC_CFGR_HPRE_DIV_512 (0x8+7) + +/* SWS: System clock switch status */ +#define RCC_CFGR_SWS_SHIFT 2 +#define RCC_CFGR_SWS_HSI 0x0 +#define RCC_CFGR_SWS_HSE 0x1 +#define RCC_CFGR_SWS_PLL 0x2 + +/* SW: System clock switch */ +#define RCC_CFGR_SW_SHIFT 0 +#define RCC_CFGR_SW_HSI 0x0 +#define RCC_CFGR_SW_HSE 0x1 +#define RCC_CFGR_SW_PLL 0x2 + +/* --- RCC_CIR values ------------------------------------------------------ */ + +/* Clock security system interrupt clear bit */ +#define RCC_CIR_CSSC (1 << 23) + +/* OSC ready interrupt clear bits */ +#define RCC_CIR_PLLI2SRDYC (1 << 21) +#define RCC_CIR_PLLRDYC (1 << 20) +#define RCC_CIR_HSERDYC (1 << 19) +#define RCC_CIR_HSIRDYC (1 << 18) +#define RCC_CIR_LSERDYC (1 << 17) +#define RCC_CIR_LSIRDYC (1 << 16) + +/* OSC ready interrupt enable bits */ +#define RCC_CIR_PLLI2SRDYIE (1 << 13) +#define RCC_CIR_PLLRDYIE (1 << 12) +#define RCC_CIR_HSERDYIE (1 << 11) +#define RCC_CIR_HSIRDYIE (1 << 10) +#define RCC_CIR_LSERDYIE (1 << 9) +#define RCC_CIR_LSIRDYIE (1 << 8) + +/* Clock security system interrupt flag bit */ +#define RCC_CIR_CSSF (1 << 7) + +/* OSC ready interrupt flag bits */ +#define RCC_CIR_PLLI2SRDYF (1 << 5) +#define RCC_CIR_PLLRDYF (1 << 4) +#define RCC_CIR_HSERDYF (1 << 3) +#define RCC_CIR_HSIRDYF (1 << 2) +#define RCC_CIR_LSERDYF (1 << 1) +#define RCC_CIR_LSIRDYF (1 << 0) + +/* --- RCC_AHB1RSTR values ------------------------------------------------- */ + +#define RCC_AHB1RSTR_OTGHSRST (1 << 29) +#define RCC_AHB1RSTR_ETHMACRST (1 << 25) +#define RCC_AHB1RSTR_DMA2RST (1 << 22) +#define RCC_AHB1RSTR_DMA1RST (1 << 21) +#define RCC_AHB1RSTR_CRCRST (1 << 12) +#define RCC_AHB1RSTR_GPIOIRST (1 << 8) +#define RCC_AHB1RSTR_GPIOHRST (1 << 7) +#define RCC_AHB1RSTR_GPIOGRST (1 << 6) +#define RCC_AHB1RSTR_GPIOFRST (1 << 5) +#define RCC_AHB1RSTR_GPIOERST (1 << 4) +#define RCC_AHB1RSTR_GPIODRST (1 << 3) +#define RCC_AHB1RSTR_GPIOCRST (1 << 2) +#define RCC_AHB1RSTR_GPIOBRST (1 << 1) +#define RCC_AHB1RSTR_GPIOARST (1 << 0) + +/* --- RCC_AHB2RSTR values ------------------------------------------------- */ + +#define RCC_AHB2RSTR_OTGFSRST (1 << 7) +#define RCC_AHB2RSTR_RNGRST (1 << 6) +#define RCC_AHB2RSTR_HASHRST (1 << 5) +#define RCC_AHB2RSTR_CRYPRST (1 << 4) +#define RCC_AHB2RSTR_DCMIRST (1 << 0) + +/* --- RCC_AHB3RSTR values ------------------------------------------------- */ + +#define RCC_AHB3RSTR_FSMCRST (1 << 0) + +/* --- RCC_APB1RSTR values ------------------------------------------------- */ + +#define RCC_APB1RSTR_DACRST (1 << 29) +#define RCC_APB1RSTR_PWRRST (1 << 28) +#define RCC_APB1RSTR_CAN2RST (1 << 26) +#define RCC_APB1RSTR_CAN1RST (1 << 25) +#define RCC_APB1RSTR_I2C3RST (1 << 23) +#define RCC_APB1RSTR_I2C2RST (1 << 22) +#define RCC_APB1RSTR_I2C1RST (1 << 21) +#define RCC_APB1RSTR_USART5RST (1 << 20) +#define RCC_APB1RSTR_USART4RST (1 << 19) +#define RCC_APB1RSTR_USART3RST (1 << 18) +#define RCC_APB1RSTR_USART2RST (1 << 17) +#define RCC_APB1RSTR_SPI3RST (1 << 15) +#define RCC_APB1RSTR_SPI2RST (1 << 14) +#define RCC_APB1RSTR_WWDGRST (1 << 11) +#define RCC_APB1RSTR_TIM14RST (1 << 8) +#define RCC_APB1RSTR_TIM13RST (1 << 7) +#define RCC_APB1RSTR_TIM12RST (1 << 6) +#define RCC_APB1RSTR_TIM7RST (1 << 5) +#define RCC_APB1RSTR_TIM6RST (1 << 4) +#define RCC_APB1RSTR_TIM5RST (1 << 3) +#define RCC_APB1RSTR_TIM4RST (1 << 2) +#define RCC_APB1RSTR_TIM3RST (1 << 1) +#define RCC_APB1RSTR_TIM2RST (1 << 0) + +/* --- RCC_APB2RSTR values ------------------------------------------------- */ + +#define RCC_APB2RSTR_TIM11RST (1 << 18) +#define RCC_APB2RSTR_TIM10RST (1 << 17) +#define RCC_APB2RSTR_TIM9RST (1 << 16) +#define RCC_APB2RSTR_SYSCFGRST (1 << 14) +#define RCC_APB2RSTR_SPI1RST (1 << 12) +#define RCC_APB2RSTR_SDIORST (1 << 11) +#define RCC_APB2RSTR_ADCRST (1 << 8) +#define RCC_APB2RSTR_USART6RST (1 << 5) +#define RCC_APB2RSTR_USART1RST (1 << 4) +#define RCC_APB2RSTR_TIM8RST (1 << 1) +#define RCC_APB2RSTR_TIM1RST (1 << 0) + +/* --- RCC_AHB1ENR values ------------------------------------------------- */ + +#define RCC_AHB1ENR_OTGHSULPIEN (1 << 30) +#define RCC_AHB1ENR_OTGHSEN (1 << 29) +#define RCC_AHB1ENR_ETHMACPTPEN (1 << 28) +#define RCC_AHB1ENR_ETHMACRXEN (1 << 27) +#define RCC_AHB1ENR_ETHMACTXEN (1 << 26) +#define RCC_AHB1ENR_ETHMACEN (1 << 25) +#define RCC_AHB1ENR_DMA2EN (1 << 22) +#define RCC_AHB1ENR_DMA1EN (1 << 21) +#define RCC_AHB1ENR_BKPSRAMEN (1 << 18) +#define RCC_AHB1ENR_CRCEN (1 << 12) +#define RCC_AHB1ENR_GPIOIEN (1 << 8) +#define RCC_AHB1ENR_GPIOHEN (1 << 7) +#define RCC_AHB1ENR_GPIOGEN (1 << 6) +#define RCC_AHB1ENR_GPIOFEN (1 << 5) +#define RCC_AHB1ENR_GPIOEEN (1 << 4) +#define RCC_AHB1ENR_GPIODEN (1 << 3) +#define RCC_AHB1ENR_GPIOCEN (1 << 2) +#define RCC_AHB1ENR_GPIOBEN (1 << 1) +#define RCC_AHB1ENR_GPIOAEN (1 << 0) + +/* --- RCC_AHB2ENR values ------------------------------------------------- */ + +#define RCC_AHB2ENR_OTGFSEN (1 << 7) +#define RCC_AHB2ENR_RNGEN (1 << 6) +#define RCC_AHB2ENR_HASHEN (1 << 5) +#define RCC_AHB2ENR_CRYPEN (1 << 4) +#define RCC_AHB2ENR_DCMIEN (1 << 0) + +/* --- RCC_AHB3ENR values ------------------------------------------------- */ + +#define RCC_AHB3ENR_FSMCEN (1 << 0) + +/* --- RCC_APB1ENR values ------------------------------------------------- */ + +#define RCC_APB1ENR_DACEN (1 << 29) +#define RCC_APB1ENR_PWREN (1 << 28) +#define RCC_APB1ENR_CAN2EN (1 << 26) +#define RCC_APB1ENR_CAN1EN (1 << 25) +#define RCC_APB1ENR_I2C3EN (1 << 23) +#define RCC_APB1ENR_I2C2EN (1 << 22) +#define RCC_APB1ENR_I2C1EN (1 << 21) +#define RCC_APB1ENR_USART5EN (1 << 20) +#define RCC_APB1ENR_USART4EN (1 << 19) +#define RCC_APB1ENR_USART3EN (1 << 18) +#define RCC_APB1ENR_USART2EN (1 << 17) +#define RCC_APB1ENR_SPI3EN (1 << 15) +#define RCC_APB1ENR_SPI2EN (1 << 14) +#define RCC_APB1ENR_WWDGEN (1 << 11) +#define RCC_APB1ENR_TIM14EN (1 << 8) +#define RCC_APB1ENR_TIM13EN (1 << 7) +#define RCC_APB1ENR_TIM12EN (1 << 6) +#define RCC_APB1ENR_TIM7EN (1 << 5) +#define RCC_APB1ENR_TIM6EN (1 << 4) +#define RCC_APB1ENR_TIM5EN (1 << 3) +#define RCC_APB1ENR_TIM4EN (1 << 2) +#define RCC_APB1ENR_TIM3EN (1 << 1) +#define RCC_APB1ENR_TIM2EN (1 << 0) + +/* --- RCC_APB2ENR values ------------------------------------------------- */ + +#define RCC_APB2ENR_TIM11EN (1 << 18) +#define RCC_APB2ENR_TIM10EN (1 << 17) +#define RCC_APB2ENR_TIM9EN (1 << 16) +#define RCC_APB2ENR_SYSCFGEN (1 << 14) +#define RCC_APB2ENR_SPI1EN (1 << 12) +#define RCC_APB2ENR_SDIOEN (1 << 11) +#define RCC_APB2ENR_ADC3EN (1 << 10) +#define RCC_APB2ENR_ADC2EN (1 << 9) +#define RCC_APB2ENR_ADC1EN (1 << 8) +#define RCC_APB2ENR_USART6EN (1 << 5) +#define RCC_APB2ENR_USART1EN (1 << 4) +#define RCC_APB2ENR_TIM8EN (1 << 1) +#define RCC_APB2ENR_TIM1EN (1 << 0) + +/* --- RCC_AHB1LPENR values ------------------------------------------------- */ + +#define RCC_AHB1LPENR_OTGHSULPILPEN (1 << 30) +#define RCC_AHB1LPENR_OTGHSLPEN (1 << 29) +#define RCC_AHB1LPENR_ETHMACPTPLPEN (1 << 28) +#define RCC_AHB1LPENR_ETHMACRXLPEN (1 << 27) +#define RCC_AHB1LPENR_ETHMACTXLPEN (1 << 26) +#define RCC_AHB1LPENR_ETHMACLPEN (1 << 25) +#define RCC_AHB1LPENR_DMA2LPEN (1 << 22) +#define RCC_AHB1LPENR_DMA1LPEN (1 << 21) +#define RCC_AHB1LPENR_BKPSRAMLPEN (1 << 18) +#define RCC_AHB1LPENR_SRAM2LPEN (1 << 17) +#define RCC_AHB1LPENR_SRAM1LPEN (1 << 16) +#define RCC_AHB1LPENR_FLITFLPEN (1 << 15) +#define RCC_AHB1LPENR_CRCLPEN (1 << 12) +#define RCC_AHB1LPENR_GPIOILPEN (1 << 8) +#define RCC_AHB1LPENR_GPIOHLPEN (1 << 7) +#define RCC_AHB1LPENR_GPIOGLPEN (1 << 6) +#define RCC_AHB1LPENR_GPIOFLPEN (1 << 5) +#define RCC_AHB1LPENR_GPIOELPEN (1 << 4) +#define RCC_AHB1LPENR_GPIODLPEN (1 << 3) +#define RCC_AHB1LPENR_GPIOCLPEN (1 << 2) +#define RCC_AHB1LPENR_GPIOBLPEN (1 << 1) +#define RCC_AHB1LPENR_GPIOALPEN (1 << 0) + +/* --- RCC_AHB2LPENR values ------------------------------------------------- */ + +#define RCC_AHB2LPENR_OTGFSLPEN (1 << 7) +#define RCC_AHB2LPENR_RNGLPEN (1 << 6) +#define RCC_AHB2LPENR_HASHLPEN (1 << 5) +#define RCC_AHB2LPENR_CRYPLPEN (1 << 4) +#define RCC_AHB2LPENR_DCMILPEN (1 << 0) + +/* --- RCC_AHB3LPENR values ------------------------------------------------- */ + +#define RCC_AHB3LPENR_FSMCLPEN (1 << 0) + +/* --- RCC_APB1LPENR values ------------------------------------------------- */ + +#define RCC_APB1LPENR_DACLPEN (1 << 29) +#define RCC_APB1LPENR_PWRLPEN (1 << 28) +#define RCC_APB1LPENR_CAN2LPEN (1 << 26) +#define RCC_APB1LPENR_CAN1LPEN (1 << 25) +#define RCC_APB1LPENR_I2C3LPEN (1 << 23) +#define RCC_APB1LPENR_I2C2LPEN (1 << 22) +#define RCC_APB1LPENR_I2C1LPEN (1 << 21) +#define RCC_APB1LPENR_USART5LPEN (1 << 20) +#define RCC_APB1LPENR_USART4LPEN (1 << 19) +#define RCC_APB1LPENR_USART3LPEN (1 << 18) +#define RCC_APB1LPENR_USART2LPEN (1 << 17) +#define RCC_APB1LPENR_SPI3LPEN (1 << 15) +#define RCC_APB1LPENR_SPI2LPEN (1 << 14) +#define RCC_APB1LPENR_WWDGLPEN (1 << 11) +#define RCC_APB1LPENR_TIM14LPEN (1 << 8) +#define RCC_APB1LPENR_TIM13LPEN (1 << 7) +#define RCC_APB1LPENR_TIM12LPEN (1 << 6) +#define RCC_APB1LPENR_TIM7LPEN (1 << 5) +#define RCC_APB1LPENR_TIM6LPEN (1 << 4) +#define RCC_APB1LPENR_TIM5LPEN (1 << 3) +#define RCC_APB1LPENR_TIM4LPEN (1 << 2) +#define RCC_APB1LPENR_TIM3LPEN (1 << 1) +#define RCC_APB1LPENR_TIM2LPEN (1 << 0) + +/* --- RCC_APB2LPENR values ------------------------------------------------- */ + +#define RCC_APB2LPENR_TIM11LPEN (1 << 18) +#define RCC_APB2LPENR_TIM10LPEN (1 << 17) +#define RCC_APB2LPENR_TIM9LPEN (1 << 16) +#define RCC_APB2LPENR_SYSCFGLPEN (1 << 14) +#define RCC_APB2LPENR_SPI1LPEN (1 << 12) +#define RCC_APB2LPENR_SDIOLPEN (1 << 11) +#define RCC_APB2LPENR_ADC3LPEN (1 << 10) +#define RCC_APB2LPENR_ADC2LPEN (1 << 9) +#define RCC_APB2LPENR_ADC1LPEN (1 << 8) +#define RCC_APB2LPENR_USART6LPEN (1 << 5) +#define RCC_APB2LPENR_USART1LPEN (1 << 4) +#define RCC_APB2LPENR_TIM8LPEN (1 << 1) +#define RCC_APB2LPENR_TIM1LPEN (1 << 0) + +/* --- RCC_BDCR values ----------------------------------------------------- */ + +#define RCC_BDCR_BDRST (1 << 16) +#define RCC_BDCR_RTCEN (1 << 15) +/* RCC_BDCR[9:8]: RTCSEL */ +#define RCC_BDCR_LSEBYP (1 << 2) +#define RCC_BDCR_LSERDY (1 << 1) +#define RCC_BDCR_LSEON (1 << 0) + +/* --- RCC_CSR values ------------------------------------------------------ */ + +#define RCC_CSR_LPWRRSTF (1 << 31) +#define RCC_CSR_WWDGRSTF (1 << 30) +#define RCC_CSR_IWDGRSTF (1 << 29) +#define RCC_CSR_SFTRSTF (1 << 28) +#define RCC_CSR_PORRSTF (1 << 27) +#define RCC_CSR_PINRSTF (1 << 26) +#define RCC_CSR_BORRSTF (1 << 26) +#define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_LSIRDY (1 << 1) +#define RCC_CSR_LSION (1 << 0) + +/* --- RCC_SSCGR values ---------------------------------------------------- */ + +/* PLL spread spectrum clock generation documented in Datasheet. */ + +#define RCC_SSCGR_SSCGEN (1 << 31) +#define RCC_SSCGR_SPREADSEL (1 << 30) +/* RCC_SSCGR[27:16]: INCSTEP */ +#define RCC_SSCGR_INCSTEP_SHIFT 16 +/* RCC_SSCGR[15:0]: MODPER */ +#define RCC_SSCGR_MODPER_SHIFT 15 + +/* --- RCC_PLLI2SCFGR values ----------------------------------------------- */ + +/* RCC_PLLI2SCFGR[30:28]: PLLI2SR */ +#define RCC_PLLI2SCFGR_PLLI2SR_SHIFT 28 +/* RCC_PLLI2SCFGR[14:6]: PLLI2SN */ +#define RCC_PLLI2SCFGR_PLLI2SN_SHIFT 6 + +/* --- Variable definitions ------------------------------------------------ */ +extern u32 rcc_ppre1_frequency; +extern u32 rcc_ppre2_frequency; + +/* --- Function prototypes ------------------------------------------------- */ + +typedef enum { + PLL, HSE, HSI, LSE, LSI +} osc_t; + +void rcc_osc_ready_int_clear(osc_t osc); +void rcc_osc_ready_int_enable(osc_t osc); +void rcc_osc_ready_int_disable(osc_t osc); +int rcc_osc_ready_int_flag(osc_t osc); +void rcc_css_int_clear(void); +int rcc_css_int_flag(void); +void rcc_wait_for_osc_ready(osc_t osc); +void rcc_wait_for_sysclk_status(osc_t osc); +void rcc_osc_on(osc_t osc); +void rcc_osc_off(osc_t osc); +void rcc_css_enable(void); +void rcc_css_disable(void); +void rcc_osc_bypass_enable(osc_t osc); +void rcc_osc_bypass_disable(osc_t osc); +void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en); +void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en); +void rcc_peripheral_reset(volatile u32 *reg, u32 reset); +void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset); +void rcc_set_sysclk_source(u32 clk); +void rcc_set_pll_source(u32 pllsrc); +void rcc_set_ppre2(u32 ppre2); +void rcc_set_ppre1(u32 ppre1); +void rcc_set_hpre(u32 hpre); +void rcc_set_rtcpre(u32 rtcpre); +void rcc_set_main_pll_hsi(u32 pllm, u32 plln, u32 pllp, u32 pllq); +void rcc_set_main_pll_hse(u32 pllm, u32 plln, u32 pllp, u32 pllq); +u32 rcc_get_system_clock_source(int i); +void rcc_clock_setup_in_hse_8mhz_out_120mhz(void); +void rcc_backupdomain_reset(void); + +#endif diff --git a/include/libopencm3/stm32/f2/spi.h b/include/libopencm3/stm32/f2/spi.h new file mode 100644 index 00000000..62550cf9 --- /dev/null +++ b/include/libopencm3/stm32/f2/spi.h @@ -0,0 +1,42 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_SPI_F2_H +#define LIBOPENCM3_SPI_F2_H + +#include + +/* + * This file extends the version in stm_common with definitions only + * applicable to the STM32F2 series of devices. + */ + +/* --- SPI_CR2 values ------------------------------------------------------ */ + +/* FRF: Frame format. */ +#define SPI_CR2_FRF (1 << 4) +#define SPI_CR2_FRF_TI (1 << 4) +#define SPI_CR2_FRF_MOTOROLA (1 << 4) + +/* --- SPI_SR values ------------------------------------------------------- */ + +/* TIFRFE: TI frame format error. */ +#define SPI_SR_RXNE (1 << 0) + +#endif diff --git a/include/libopencm3/stm32/f2/syscfg.h b/include/libopencm3/stm32/f2/syscfg.h new file mode 100644 index 00000000..b0d93f9c --- /dev/null +++ b/include/libopencm3/stm32/f2/syscfg.h @@ -0,0 +1,46 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_SYSCFG_H +#define LIBOPENCM3_SYSCFG_H + +#include + +/* --- SYSCFG registers ------------------------------------------------------ */ + +#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00) + +#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04) + +/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */ +#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08) + +/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */ +#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c) + +/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */ +#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10) + +/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */ +#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14) + +#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20) + +#endif + diff --git a/include/libopencm3/stm32/f2/timer.h b/include/libopencm3/stm32/f2/timer.h new file mode 100644 index 00000000..f7c82aef --- /dev/null +++ b/include/libopencm3/stm32/f2/timer.h @@ -0,0 +1,54 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_TIMER_F2_H +#define LIBOPENCM3_TIMER_F2_H + +#include + + +/* + * TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide: + * CNT, ARR, CCR1, CCR2, CCR3, CCR4 + */ + +/* Timer 2/5 option register (TIMx_OR) */ +#define TIM_OR(tim_base) MMIO32(tim_base + 0x50) +#define TIM2_OR TIM_OR(TIM2) +#define TIM5_OR TIM_OR(TIM5) + +/* --- TIM2_OR values ---------------------------------------------------- */ + +/* MOE: Main output enable */ +#define TIM2_OR_ITR1_RMP_TIM8_TRGOUT (0x0 << 10) +#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10) +#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10) +#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10) +#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10) + +/* --- TIM5_OR values ---------------------------------------------------- */ + +/* MOE: Main output enable */ +#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6) +#define TIM5_OR_TI4_RMP_LSI (0x1 << 6) +#define TIM5_OR_TI4_RMP_LSE (0x2 << 6) +#define TIM5_OR_TI4_RMP_RTC (0x3 << 6) +#define TIM5_OR_TI4_RMP_MASK (0x3 << 6) + +#endif diff --git a/include/libopencm3/stm32/f2/usart.h b/include/libopencm3/stm32/f2/usart.h new file mode 100644 index 00000000..1baf5a19 --- /dev/null +++ b/include/libopencm3/stm32/f2/usart.h @@ -0,0 +1,35 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_USART_F2_H +#define LIBOPENCM3_USART_F2_H + +#include + +/* --- USART_CR1 values ---------------------------------------------------- */ + +/* OVER8: Oversampling mode */ +#define USART_CR1_OVER8 (1 << 15) + +/* --- USART_CR3 values ---------------------------------------------------- */ + +/* ONEBIT: One sample bit method enable */ +#define USART_CR3_ONEBIT (1 << 11) + +#endif diff --git a/include/libopencm3/stm32/i2c.h b/include/libopencm3/stm32/i2c.h index 1b837b87..d182f4ed 100644 --- a/include/libopencm3/stm32/i2c.h +++ b/include/libopencm3/stm32/i2c.h @@ -195,7 +195,7 @@ /* ADD: Address bits: [7:1] in 7-bit mode, bits [9:0] in 10-bit mode */ -/* --- I2Cx_OAR1 values ---------------------------------------------------- */ +/* --- I2Cx_OAR2 values ---------------------------------------------------- */ /* Note: Bits [15:8] are reserved, and forced to 0 by hardware. */ diff --git a/include/libopencm3/stm32/memorymap.h b/include/libopencm3/stm32/memorymap.h index e3c57c83..63f2ef09 100644 --- a/include/libopencm3/stm32/memorymap.h +++ b/include/libopencm3/stm32/memorymap.h @@ -1,7 +1,7 @@ /* * This file is part of the libopencm3 project. * - * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2011 Fergus Noble * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,97 +17,17 @@ * along with this program. If not, see . */ -#ifndef LIBOPENCM3_MEMORYMAP_H -#define LIBOPENCM3_MEMORYMAP_H +#ifndef LIBOPENCM3_MEMORYMAP_COMMON_H +#define LIBOPENCM3_MEMORYMAP_COMMON_H -#include - -/* --- STM32 specific peripheral definitions ------------------------------- */ - -/* Memory map for all busses */ -#define PERIPH_BASE 0x40000000 -#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000) -#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000) -#define PERIPH_BASE_AHB (PERIPH_BASE + 0x18000) - -/* Register boundary addresses */ - -/* APB1 */ -#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000) -#define TIM3_BASE (PERIPH_BASE_APB1 + 0x0400) -#define TIM4_BASE (PERIPH_BASE_APB1 + 0x0800) -#define TIM5_BASE (PERIPH_BASE_APB1 + 0x0c00) -#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000) -#define TIM7_BASE (PERIPH_BASE_APB1 + 0x1400) -#define TIM12_BASE (PERIPH_BASE_APB1 + 0x1800) -#define TIM13_BASE (PERIPH_BASE_APB1 + 0x1c00) -#define TIM14_BASE (PERIPH_BASE_APB1 + 0x2000) -/* PERIPH_BASE_APB1 + 0x2400 (0x4000 2400 - 0x4000 27FF): Reserved */ -#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800) -#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00) -#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000) -/* PERIPH_BASE_APB1 + 0x3400 (0x4000 3400 - 0x4000 37FF): Reserved */ -#define SPI2_I2S_BASE (PERIPH_BASE_APB1 + 0x3800) -#define SPI3_I2S_BASE (PERIPH_BASE_APB1 + 0x3c00) -/* PERIPH_BASE_APB1 + 0x4000 (0x4000 4000 - 0x4000 3FFF): Reserved */ -#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400) -#define USART3_BASE (PERIPH_BASE_APB1 + 0x4800) -#define UART4_BASE (PERIPH_BASE_APB1 + 0x4c00) -#define UART5_BASE (PERIPH_BASE_APB1 + 0x5000) -#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400) -#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800) -#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00) -#define USB_CAN_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000) -#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400) -#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800) -/* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved? Typo? */ -#define BACKUP_REGS_BASE (PERIPH_BASE_APB1 + 0x6c00) -#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) -#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400) -/* PERIPH_BASE_APB1 + 0x7800 (0x4000 7800 - 0x4000 FFFF): Reserved */ - -/* APB2 */ -#define AFIO_BASE (PERIPH_BASE_APB2 + 0x0000) -#define EXTI_BASE (PERIPH_BASE_APB2 + 0x0400) -#define GPIO_PORT_A_BASE (PERIPH_BASE_APB2 + 0x0800) -#define GPIO_PORT_B_BASE (PERIPH_BASE_APB2 + 0x0c00) -#define GPIO_PORT_C_BASE (PERIPH_BASE_APB2 + 0x1000) -#define GPIO_PORT_D_BASE (PERIPH_BASE_APB2 + 0x1400) -#define GPIO_PORT_E_BASE (PERIPH_BASE_APB2 + 0x1800) -#define GPIO_PORT_F_BASE (PERIPH_BASE_APB2 + 0x1c00) -#define GPIO_PORT_G_BASE (PERIPH_BASE_APB2 + 0x2000) -#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2400) -#define ADC2_BASE (PERIPH_BASE_APB2 + 0x2800) -#define TIM1_BASE (PERIPH_BASE_APB2 + 0x2c00) -#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) -#define TIM8_BASE (PERIPH_BASE_APB2 + 0x3400) -#define USART1_BASE (PERIPH_BASE_APB2 + 0x3800) -#define ADC3_BASE (PERIPH_BASE_APB2 + 0x3c00) -/* PERIPH_BASE_APB2 + 0x4000 (0x4001 4000 - 0x4001 4FFF): Reserved */ -#define TIM9_BASE (PERIPH_BASE_APB2 + 0x4c00) -#define TIM10_BASE (PERIPH_BASE_APB2 + 0x5000) -#define TIM11_BASE (PERIPH_BASE_APB2 + 0x5400) -/* PERIPH_BASE_APB2 + 0x5800 (0x4001 5800 - 0x4001 7FFF): Reserved */ - -/* AHB */ -#define SDIO_BASE (PERIPH_BASE_AHB + 0x00000) -/* PERIPH_BASE_AHB + 0x0400 (0x4001 8400 - 0x4001 7FFF): Reserved */ -#define DMA1_BASE (PERIPH_BASE_AHB + 0x08000) -#define DMA2_BASE (PERIPH_BASE_AHB + 0x08400) -/* PERIPH_BASE_AHB + 0x8800 (0x4002 0800 - 0x4002 0FFF): Reserved */ -#define RCC_BASE (PERIPH_BASE_AHB + 0x09000) -/* PERIPH_BASE_AHB + 0x9400 (0x4002 1400 - 0x4002 1FFF): Reserved */ -#define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB + 0x0a000) -#define CRC_BASE (PERIPH_BASE_AHB + 0x0b000) -/* PERIPH_BASE_AHB + 0xb400 (0x4002 3400 - 0x4002 7FFF): Reserved */ -#define ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000) -/* PERIPH_BASE_AHB + 0x18000 (0x4003 0000 - 0x4FFF FFFF): Reserved */ -#define USB_OTG_FS_BASE (PERIPH_BASE_AHB + 0xffe8000) - -/* PPIB */ -#define DBGMCU_BASE (PPBI_BASE + 0x00042000) - -/* FSMC */ -#define FSMC_BASE (PERIPH_BASE + 0x60000000) +#ifdef STM32F1 +#include +#else +#ifdef STM32F2 +#include +#else +#error "stm32 family not defined." +#endif +#endif #endif diff --git a/include/libopencm3/stm32/nvic.h b/include/libopencm3/stm32/nvic.h index d29c425f..339a159c 100644 --- a/include/libopencm3/stm32/nvic.h +++ b/include/libopencm3/stm32/nvic.h @@ -77,75 +77,21 @@ #define NVIC_PENDSV_IRQ -2 #define NVIC_SYSTICK_IRQ -1 -/* User Interrupts */ -#define NVIC_WWDG_IRQ 0 -#define NVIC_PVD_IRQ 1 -#define NVIC_TAMPER_IRQ 2 -#define NVIC_RTC_IRQ 3 -#define NVIC_FLASH_IRQ 4 -#define NVIC_RCC_IRQ 5 -#define NVIC_EXTI0_IRQ 6 -#define NVIC_EXTI1_IRQ 7 -#define NVIC_EXTI2_IRQ 8 -#define NVIC_EXTI3_IRQ 9 -#define NVIC_EXTI4_IRQ 10 -#define NVIC_DMA1_CHANNEL1_IRQ 11 -#define NVIC_DMA1_CHANNEL2_IRQ 12 -#define NVIC_DMA1_CHANNEL3_IRQ 13 -#define NVIC_DMA1_CHANNEL4_IRQ 14 -#define NVIC_DMA1_CHANNEL5_IRQ 15 -#define NVIC_DMA1_CHANNEL6_IRQ 16 -#define NVIC_DMA1_CHANNEL7_IRQ 17 -#define NVIC_ADC1_2_IRQ 18 -#define NVIC_USB_HP_CAN_TX_IRQ 19 -#define NVIC_USB_LP_CAN_RX0_IRQ 20 -#define NVIC_CAN_RX1_IRQ 21 -#define NVIC_CAN_SCE_IRQ 22 -#define NVIC_EXTI9_5_IRQ 23 -#define NVIC_TIM1_BRK_IRQ 24 -#define NVIC_TIM1_UP_IRQ 25 -#define NVIC_TIM1_TRG_COM_IRQ 26 -#define NVIC_TIM1_CC_IRQ 27 -#define NVIC_TIM2_IRQ 28 -#define NVIC_TIM3_IRQ 29 -#define NVIC_TIM4_IRQ 30 -#define NVIC_I2C1_EV_IRQ 31 -#define NVIC_I2C1_ER_IRQ 32 -#define NVIC_I2C2_EV_IRQ 33 -#define NVIC_I2C2_ER_IRQ 34 -#define NVIC_SPI1_IRQ 35 -#define NVIC_SPI2_IRQ 36 -#define NVIC_USART1_IRQ 37 -#define NVIC_USART2_IRQ 38 -#define NVIC_USART3_IRQ 39 -#define NVIC_EXTI15_10_IRQ 40 -#define NVIC_RTC_ALARM_IRQ 41 -#define NVIC_USB_WAKEUP_IRQ 42 -#define NVIC_TIM8_BRK_IRQ 43 -#define NVIC_TIM8_UP_IRQ 44 -#define NVIC_TIM8_TRG_COM_IRQ 45 -#define NVIC_TIM8_CC_IRQ 46 -#define NVIC_ADC3_IRQ 47 -#define NVIC_FSMC_IRQ 48 -#define NVIC_SDIO_IRQ 49 -#define NVIC_TIM5_IRQ 50 -#define NVIC_SPI3_IRQ 51 -#define NVIC_USART4_IRQ 52 -#define NVIC_USART5_IRQ 53 -#define NVIC_TIM6_IRQ 54 -#define NVIC_TIM7_IRQ 55 -#define NVIC_DMA2_CHANNEL1_IRQ 56 -#define NVIC_DMA2_CHANNEL2_IRQ 57 -#define NVIC_DMA2_CHANNEL3_IRQ 58 -#define NVIC_DMA2_CHANNEL4_5_IRQ 59 -#define NVIC_DMA2_CHANNEL5_IRQ 60 -#define NVIC_ETH_IRQ 61 -#define NVIC_ETH_WKUP_IRQ 62 -#define NVIC_CAN2_TX_IRQ 63 -#define NVIC_CAN2_RX0_IRQ 64 -#define NVIC_CAN2_RX1_IRQ 65 -#define NVIC_CAN2_SCE_IRQ 66 -#define NVIC_OTG_FS_IRQ 67 + +/* Note: User interrupts are family specific and are defined in a familiy + * specific header file in the corresponding subfolder. + */ + +#ifdef STM32F1 +#include +#else +#ifdef STM32F2 +#include +#else +#error "stm32 family not defined." +#endif +#endif + /* --- NVIC functions ------------------------------------------------------ */ diff --git a/include/libopencm3/stm32/spi.h b/include/libopencm3/stm32/spi.h index 726310a1..30366579 100644 --- a/include/libopencm3/stm32/spi.h +++ b/include/libopencm3/stm32/spi.h @@ -160,7 +160,7 @@ #define SPI_CR1_CPHA_CLK_TRANSITION_2 (1 << 0) #define SPI_CR1_CPHA (1 << 0) -/* --- SPI_CR1 values ------------------------------------------------------ */ +/* --- SPI_CR2 values ------------------------------------------------------ */ /* Bits [15:8]: Reserved. Forced to 0 by hardware. */ @@ -212,7 +212,7 @@ /* RXNE: Receive buffer not empty */ #define SPI_SR_RXNE (1 << 0) -/* --- SPI_SR values ------------------------------------------------------- */ +/* --- SPI_DR values ------------------------------------------------------- */ /* SPI_DR[15:0]: Data Register. */ @@ -290,6 +290,7 @@ void spi_disable(u32 spi); void spi_write(u32 spi, u16 data); void spi_send(u32 spi, u16 data); u16 spi_read(u32 spi); +u16 spi_xfer(u32 spi, u16 data); void spi_set_bidirectional_mode(u32 spi); void spi_set_unidirectional_mode(u32 spi); void spi_set_bidirectional_receive_only_mode(u32 spi); diff --git a/include/libopencm3/stm32/usart.h b/include/libopencm3/stm32/usart.h index df6bc089..51b96f24 100644 --- a/include/libopencm3/stm32/usart.h +++ b/include/libopencm3/stm32/usart.h @@ -294,7 +294,7 @@ /* --- Function prototypes ------------------------------------------------- */ -void usart_set_baudrate(u32 usart, u32 baud); +void usart_set_baudrate(u32 usart, u32 baud, u32 clock); void usart_set_databits(u32 usart, u32 bits); void usart_set_stopbits(u32 usart, u32 stopbits); void usart_set_parity(u32 usart, u32 parity); diff --git a/lib/stm32/i2c.c b/lib/stm32_common/i2c.c similarity index 100% rename from lib/stm32/i2c.c rename to lib/stm32_common/i2c.c diff --git a/lib/stm32/nvic.c b/lib/stm32_common/nvic.c similarity index 100% rename from lib/stm32/nvic.c rename to lib/stm32_common/nvic.c diff --git a/lib/stm32/spi.c b/lib/stm32_common/spi.c similarity index 93% rename from lib/stm32/spi.c rename to lib/stm32_common/spi.c index 733a1bc4..71bb846c 100644 --- a/lib/stm32/spi.c +++ b/lib/stm32_common/spi.c @@ -54,11 +54,7 @@ int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst) /* TODO: Error handling? */ void spi_enable(u32 spi) { - u32 reg32; - - reg32 = SPI_CR1(spi); - reg32 |= SPI_CR1_SPE; /* Enable SPI. */ - SPI_CR1(spi) = reg32; + SPI_CR1(spi) |= SPI_CR1_SPE; /* Enable SPI. */ } /* TODO: Error handling? */ @@ -80,17 +76,29 @@ void spi_write(u32 spi, u16 data) void spi_send(u32 spi, u16 data) { + /* wait for transfer finished */ + while (!(SPI_SR(spi) & SPI_SR_TXE )); + /* Write data (8 or 16 bits, depending on DFF) into DR. */ SPI_DR(spi) = data; - - /* wait for transfer finished */ - while (SPI_SR(spi) & SPI_SR_BSY ) - { - } } u16 spi_read(u32 spi) { + /* wait for transfer finished */ + while (!(SPI_SR(spi) & SPI_SR_RXNE )); + + /* Read the data (8 or 16 bits, depending on DFF bit) from DR. */ + return SPI_DR(spi); +} + +u16 spi_xfer(u32 spi, u16 data) +{ + spi_write(spi, data); + + /* wait for transfer finished */ + while (!(SPI_SR(spi) & SPI_SR_RXNE )); + /* Read the data (8 or 16 bits, depending on DFF bit) from DR. */ return SPI_DR(spi); } diff --git a/lib/stm32/systick.c b/lib/stm32_common/systick.c similarity index 100% rename from lib/stm32/systick.c rename to lib/stm32_common/systick.c diff --git a/lib/stm32/usart.c b/lib/stm32_common/usart.c similarity index 94% rename from lib/stm32/usart.c rename to lib/stm32_common/usart.c index ead0ef7a..116b1596 100644 --- a/lib/stm32/usart.c +++ b/lib/stm32_common/usart.c @@ -17,17 +17,15 @@ * along with this program. If not, see . */ -#include - #include -void usart_set_baudrate(u32 usart, u32 baud) +void usart_set_baudrate(u32 usart, u32 baud, u32 clock) { - u32 clock = rcc_ppre1_frequency; + //u32 clock = rcc_ppre1_frequency; - if (usart == USART1) { - clock = rcc_ppre2_frequency; - } + //if (usart == USART1) { + // clock = rcc_ppre2_frequency; + //} /* yes it is as simple as that. The reference manual is * talking about factional calculation but it seems to be only @@ -118,9 +116,8 @@ void usart_wait_recv_ready(u32 usart) void usart_send_blocking(u32 usart, u16 data) { - usart_send(usart, data); - usart_wait_send_ready(usart); + usart_send(usart, data); } u16 usart_recv_blocking(u32 usart) diff --git a/lib/stm32/Makefile b/lib/stm32f1/Makefile similarity index 91% rename from lib/stm32/Makefile rename to lib/stm32f1/Makefile index 5f26c295..bd9fca2b 100644 --- a/lib/stm32/Makefile +++ b/lib/stm32f1/Makefile @@ -17,7 +17,7 @@ ## along with this program. If not, see . ## -LIBNAME = libopencm3_stm32 +LIBNAME = libopencm3_stm32f1 PREFIX ?= arm-none-eabi #PREFIX ?= arm-elf @@ -25,7 +25,7 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD + -ffunction-sections -fdata-sections -MD -DSTM32F1 # ARFLAGS = rcsv ARFLAGS = rcs OBJS = vector.o rcc.o gpio.o usart.o adc.o spi.o flash.o nvic.o \ @@ -33,7 +33,7 @@ OBJS = vector.o rcc.o gpio.o usart.o adc.o spi.o flash.o nvic.o \ usb_f103.o usb.o usb_control.o usb_standard.o can.o \ timer.o usb_f107.o -VPATH += ../usb +VPATH += ../usb:../stm32_common # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) @@ -51,7 +51,7 @@ $(LIBNAME).a: $(OBJS) $(Q)$(CC) $(CFLAGS) -o $@ -c $< clean: - @printf " CLEAN lib/stm32\n" + @printf " CLEAN lib/stm32f1\n" $(Q)rm -f *.o *.d $(Q)rm -f $(LIBNAME).a diff --git a/lib/stm32/adc.c b/lib/stm32f1/adc.c similarity index 99% rename from lib/stm32/adc.c rename to lib/stm32f1/adc.c index 058837c3..31e4cbfa 100644 --- a/lib/stm32/adc.c +++ b/lib/stm32f1/adc.c @@ -31,7 +31,7 @@ * reg16 = adc_read(ADC1, ADC_CH_0); */ -#include +#include void rcc_set_adc_clk(u32 prescaler) { diff --git a/lib/stm32/can.c b/lib/stm32f1/can.c similarity index 99% rename from lib/stm32/can.c rename to lib/stm32f1/can.c index e571f8a2..8c5d7ec5 100644 --- a/lib/stm32/can.c +++ b/lib/stm32f1/can.c @@ -18,7 +18,7 @@ */ #include -#include +#include void can_reset(u32 canport) { diff --git a/lib/stm32/dma.c b/lib/stm32f1/dma.c similarity index 99% rename from lib/stm32/dma.c rename to lib/stm32f1/dma.c index 8feb2c95..4f0af6ff 100644 --- a/lib/stm32/dma.c +++ b/lib/stm32f1/dma.c @@ -17,7 +17,7 @@ * along with this program. If not, see . */ -#include +#include void dma_enable_mem2mem_mode(u32 dma, u8 channel) { diff --git a/lib/stm32/ethernet.c b/lib/stm32f1/ethernet.c similarity index 97% rename from lib/stm32/ethernet.c rename to lib/stm32f1/ethernet.c index 4a4d080a..fc65ec2f 100644 --- a/lib/stm32/ethernet.c +++ b/lib/stm32f1/ethernet.c @@ -17,7 +17,7 @@ * along with this program. If not, see . */ -#include +#include void eth_smi_write(u8 phy, u8 reg, u16 data) { diff --git a/lib/stm32/exti.c b/lib/stm32f1/exti.c similarity index 96% rename from lib/stm32/exti.c rename to lib/stm32f1/exti.c index de037e7a..e4e97486 100644 --- a/lib/stm32/exti.c +++ b/lib/stm32f1/exti.c @@ -18,7 +18,7 @@ */ #include -#include +#include void exti_set_trigger(u32 extis, exti_trigger_type trig) { @@ -69,7 +69,7 @@ void exti_reset_request(u32 extis) * Remap an external interrupt line to the corresponding pin on the * specified GPIO port. * - * TODO: This could be rewritten in less lines of code. + * TODO: This could be rewritten in fewer lines of code. */ void exti_select_source(u32 exti, u32 gpioport) { diff --git a/lib/stm32/flash.c b/lib/stm32f1/flash.c similarity index 99% rename from lib/stm32/flash.c rename to lib/stm32f1/flash.c index 98f77776..b8b3d526 100644 --- a/lib/stm32/flash.c +++ b/lib/stm32f1/flash.c @@ -18,7 +18,7 @@ * along with this program. If not, see . */ -#include +#include void flash_prefetch_buffer_enable(void) { diff --git a/lib/stm32/gpio.c b/lib/stm32f1/gpio.c similarity index 97% rename from lib/stm32/gpio.c rename to lib/stm32f1/gpio.c index 52c0c66c..f1ea12c0 100644 --- a/lib/stm32/gpio.c +++ b/lib/stm32f1/gpio.c @@ -34,7 +34,7 @@ * - GPIO remapping support */ -#include +#include void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios) { @@ -90,7 +90,7 @@ u16 gpio_get(u32 gpioport, u16 gpios) void gpio_toggle(u32 gpioport, u16 gpios) { - GPIO_ODR(gpioport) = GPIO_IDR(gpioport) ^ gpios; + GPIO_ODR(gpioport) ^= gpios; } u16 gpio_port_read(u32 gpioport) diff --git a/lib/stm32/libopencm3_stm32.ld b/lib/stm32f1/libopencm3_stm32f1.ld similarity index 100% rename from lib/stm32/libopencm3_stm32.ld rename to lib/stm32f1/libopencm3_stm32f1.ld diff --git a/lib/stm32/rcc.c b/lib/stm32f1/rcc.c similarity index 99% rename from lib/stm32/rcc.c rename to lib/stm32f1/rcc.c index f646168d..689cabb9 100644 --- a/lib/stm32/rcc.c +++ b/lib/stm32f1/rcc.c @@ -19,8 +19,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include /* Set the default ppre1 and ppre2 peripheral clock frequencies after reset */ u32 rcc_ppre1_frequency = 8000000; diff --git a/lib/stm32/rtc.c b/lib/stm32f1/rtc.c similarity index 98% rename from lib/stm32/rtc.c rename to lib/stm32f1/rtc.c index 44956418..c187be97 100644 --- a/lib/stm32/rtc.c +++ b/lib/stm32f1/rtc.c @@ -18,8 +18,8 @@ * along with this program. If not, see . */ -#include -#include +#include +#include #include void rtc_awake_from_off(osc_t clock_source) diff --git a/lib/stm32/scb.c b/lib/stm32f1/scb.c similarity index 96% rename from lib/stm32/scb.c rename to lib/stm32f1/scb.c index dfee6c37..54c57764 100644 --- a/lib/stm32/scb.c +++ b/lib/stm32f1/scb.c @@ -17,7 +17,7 @@ * along with this program. If not, see . */ -#include +#include void scb_reset_core(void) { diff --git a/lib/stm32/timer.c b/lib/stm32f1/timer.c similarity index 99% rename from lib/stm32/timer.c rename to lib/stm32f1/timer.c index 32e240d1..a61f67fa 100644 --- a/lib/stm32/timer.c +++ b/lib/stm32f1/timer.c @@ -26,7 +26,7 @@ */ #include -#include +#include void timer_reset(u32 timer_peripheral) { diff --git a/lib/stm32/vector.c b/lib/stm32f1/vector.c similarity index 100% rename from lib/stm32/vector.c rename to lib/stm32f1/vector.c diff --git a/lib/stm32f2/Makefile b/lib/stm32f2/Makefile new file mode 100644 index 00000000..496f4a54 --- /dev/null +++ b/lib/stm32f2/Makefile @@ -0,0 +1,59 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This program is free software: you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program. If not, see . +## + +LIBNAME = libopencm3_stm32f2 + +PREFIX ?= arm-none-eabi +# PREFIX ?= arm-elf +CC = $(PREFIX)-gcc +AR = $(PREFIX)-ar +CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \ + -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ + -ffunction-sections -fdata-sections -MD -DSTM32F2 +# ARFLAGS = rcsv +ARFLAGS = rcs +OBJS = vector.o gpio.o systick.o i2c.o spi.o nvic.o usart.o exti.o rcc.o flash.o + +#VPATH += ../usb +VPATH += ../stm32_common + +# Be silent per default, but 'make V=1' will show all compiler calls. +ifneq ($(V),1) +Q := @ +endif + +all: $(LIBNAME).a + +$(LIBNAME).a: $(OBJS) + @printf " AR $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(AR) $(ARFLAGS) $@ $^ + +%.o: %.c + @printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(CFLAGS) -o $@ -c $< + +clean: + @printf " CLEAN lib/stm32f2\n" + $(Q)rm -f *.o *.d + $(Q)rm -f $(LIBNAME).a + +.PHONY: clean + +-include $(OBJS:.o=.d) + diff --git a/lib/stm32f2/exti.c b/lib/stm32f2/exti.c new file mode 100644 index 00000000..1db9ad78 --- /dev/null +++ b/lib/stm32f2/exti.c @@ -0,0 +1,146 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Mark Butler + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include + +void exti_set_trigger(u32 extis, exti_trigger_type trig) +{ + switch (trig) { + case EXTI_TRIGGER_RISING: + EXTI_RTSR |= extis; + EXTI_FTSR &= ~extis; + break; + case EXTI_TRIGGER_FALLING: + EXTI_RTSR &= ~extis; + EXTI_FTSR |= extis; + break; + case EXTI_TRIGGER_BOTH: + EXTI_RTSR |= extis; + EXTI_FTSR |= extis; + break; + } +} + +void exti_enable_request(u32 extis) +{ + /* Enable interrupts. */ + EXTI_IMR |= extis; + + /* Enable events. */ + EXTI_EMR |= extis; +} + +void exti_disable_request(u32 extis) +{ + /* Disable interrupts. */ + EXTI_IMR &= ~extis; + + /* Disable events. */ + EXTI_EMR &= ~extis; +} + +/* + * Reset the interrupt request by writing a 1 to the corresponding + * pending bit register. + */ +void exti_reset_request(u32 extis) +{ + EXTI_PR = extis; +} + +/* + * Remap an external interrupt line to the corresponding pin on the + * specified GPIO port. + * + * TODO: This could be rewritten in fewer lines of code. + */ +void exti_select_source(u32 exti, u32 gpioport) +{ + u8 shift, bits; + + shift = bits = 0; + + switch (exti) { + case EXTI0: + case EXTI4: + case EXTI8: + case EXTI12: + shift = 0; + break; + case EXTI1: + case EXTI5: + case EXTI9: + case EXTI13: + shift = 4; + break; + case EXTI2: + case EXTI6: + case EXTI10: + case EXTI14: + shift = 8; + break; + case EXTI3: + case EXTI7: + case EXTI11: + case EXTI15: + shift = 12; + break; + } + + switch (gpioport) { + case GPIOA: + bits = 0xf; + break; + case GPIOB: + bits = 0xe; + break; + case GPIOC: + bits = 0xd; + break; + case GPIOD: + bits = 0xc; + break; + case GPIOE: + bits = 0xb; + break; + case GPIOF: + bits = 0xa; + break; + case GPIOG: + bits = 0x9; + break; + } + + /* Ensure that only valid EXTI lines are used. */ + if (exti < EXTI4) { + SYSCFG_EXTICR1 &= ~(0x000F << shift); + SYSCFG_EXTICR1 |= (~bits << shift); + } else if (exti < EXTI8) { + SYSCFG_EXTICR2 &= ~(0x000F << shift); + SYSCFG_EXTICR2 |= (~bits << shift); + } else if (exti < EXTI12) { + SYSCFG_EXTICR3 &= ~(0x000F << shift); + SYSCFG_EXTICR3 |= (~bits << shift); + } else if (exti < EXTI16) { + SYSCFG_EXTICR4 &= ~(0x000F << shift); + SYSCFG_EXTICR4 |= (~bits << shift); + } +} diff --git a/lib/stm32f2/flash.c b/lib/stm32f2/flash.c new file mode 100644 index 00000000..e9bc73ea --- /dev/null +++ b/lib/stm32f2/flash.c @@ -0,0 +1,250 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2010 Mark Butler + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +static inline void flash_set_program_size(u32 psize) +{ + FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8); + FLASH_CR |= psize; +} + +void flash_data_cache_enable(void) +{ + FLASH_ACR |= FLASH_DCE; +} + +void flash_dcache_disable(void) +{ + FLASH_ACR &= ~FLASH_DCE; +} + +void flash_icache_enable(void) +{ + FLASH_ACR |= FLASH_ICE; +} + +void flash_icache_disable(void) +{ + FLASH_ACR &= ~FLASH_ICE; +} + +void flash_prefetch_enable(void) +{ + FLASH_ACR |= FLASH_PRFTEN; +} + +void flash_prefetch_disable(void) +{ + FLASH_ACR &= ~FLASH_PRFTEN; +} + +void flash_dcache_reset(void) +{ + FLASH_ACR |= FLASH_DCRST; +} + +void flash_icache_reset(void) +{ + FLASH_ACR |= FLASH_ICRST; +} + +void flash_set_ws(u32 ws) +{ + u32 reg32; + + reg32 = FLASH_ACR; + reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2)); + reg32 |= ws; + FLASH_ACR = reg32; +} + +void flash_unlock(void) +{ + /* Authorize the FPEC access. */ + FLASH_KEYR = FLASH_KEY1; + FLASH_KEYR = FLASH_KEY2; +} + +void flash_lock(void) +{ + FLASH_CR |= FLASH_LOCK; +} + +void flash_clear_pgserr_flag(void) +{ + FLASH_SR |= FLASH_PGSERR; +} + +void flash_clear_pgperr_flag(void) +{ + FLASH_SR |= FLASH_PGPERR; +} + +void flash_clear_pgaerr_flag(void) +{ + FLASH_SR |= FLASH_PGAERR; +} + +void flash_clear_eop_flag(void) +{ + FLASH_SR |= FLASH_EOP; +} + +void flash_clear_wrperr_flag(void) +{ + FLASH_SR |= FLASH_WRPERR; +} + +void flash_clear_bsy_flag(void) +{ + FLASH_SR &= ~FLASH_BSY; +} + +void flash_clear_status_flags(void) +{ + flash_clear_pgserr_flag(); + flash_clear_pgperr_flag(); + flash_clear_pgaerr_flag(); + flash_clear_eop_flag(); + flash_clear_wrperr_flag(); + flash_clear_bsy_flag(); +} + +void flash_unlock_option_bytes(void) +{ + FLASH_OPTKEYR = FLASH_OPTKEY1; + FLASH_OPTKEYR = FLASH_OPTKEY2; +} + +void flash_lock_option_bytes(void) +{ + FLASH_OPTCR |= FLASH_OPTLOCK; +} + +void flash_wait_for_last_operation(void) +{ + while ((FLASH_SR & FLASH_BSY) == FLASH_BSY) + ; +} + +void flash_program_double_word(u32 address, u64 data, u32 program_size) +{ + /* Ensure that all flash operations are complete. */ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + /* Enable writes to flash. */ + FLASH_CR |= FLASH_PG; + + /* Program the first half of the word. */ + MMIO64(address) = data; + + /* Wait for the write to complete. */ + flash_wait_for_last_operation(); + + /* Disable writes to flash. */ + FLASH_CR &= ~FLASH_PG; +} + +void flash_program_word(u32 address, u32 data, u32 program_size) +{ + /* Ensure that all flash operations are complete. */ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + /* Enable writes to flash. */ + FLASH_CR |= FLASH_PG; + + /* Program the first half of the word. */ + MMIO32(address) = data; + + /* Wait for the write to complete. */ + flash_wait_for_last_operation(); + + /* Disable writes to flash. */ + FLASH_CR &= ~FLASH_PG; +} + +void flash_program_half_word(u32 address, u16 data, u32 program_size) +{ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + FLASH_CR |= FLASH_PG; + + MMIO16(address) = data; + + flash_wait_for_last_operation(); + + FLASH_CR &= ~FLASH_PG; /* Disable the PG bit. */ +} + +void flash_program_byte(u32 address, u8 data, u32 program_size) +{ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + FLASH_CR |= FLASH_PG; + + MMIO8(address) = data; + + flash_wait_for_last_operation(); + + FLASH_CR &= ~FLASH_PG; /* Disable the PG bit. */ +} + +void flash_erase_sector(u32 sector, u32 program_size) +{ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); + FLASH_CR |= sector; + FLASH_CR |= FLASH_STRT; + + flash_wait_for_last_operation(); + FLASH_CR &= ~FLASH_SER; + FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); +} + +void flash_erase_all_sectors(u32 program_size) +{ + flash_wait_for_last_operation(); + flash_set_program_size(program_size); + + FLASH_CR |= FLASH_MER; /* Enable mass erase. */ + FLASH_CR |= FLASH_STRT; /* Trigger the erase. */ + + flash_wait_for_last_operation(); + FLASH_CR &= ~FLASH_MER; /* Disable mass erase. */ +} + +void flash_program_option_bytes(u32 data) +{ + flash_wait_for_last_operation(); + + if (FLASH_OPTCR & FLASH_OPTLOCK) + flash_unlock_option_bytes(); + + FLASH_OPTCR = data & ~0x3; + FLASH_OPTCR |= FLASH_OPTSTRT; /* Enable option byte programming. */ + flash_wait_for_last_operation(); +} diff --git a/lib/stm32f2/gpio.c b/lib/stm32f2/gpio.c new file mode 100644 index 00000000..6e1ef08a --- /dev/null +++ b/lib/stm32f2/gpio.c @@ -0,0 +1,139 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios) +{ + u16 i; + u32 moder, pupd; + + /* + * We want to set the config only for the pins mentioned in gpios, + * but keeping the others, so read out the actual config first. + */ + moder = GPIO_MODER(gpioport); + pupd = GPIO_PUPDR(gpioport); + + for (i = 0; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + + moder &= ~GPIO_MODE_MASK(i); + moder |= GPIO_MODE(i, mode); + pupd &= ~GPIO_PUPD_MASK(i); + pupd |= GPIO_PUPD(i, pull_up_down); + } + + /* Set mode and pull up/down control registers. */ + GPIO_MODER(gpioport) = moder; + GPIO_PUPDR(gpioport) = pupd; +} + +void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios) +{ + u16 i; + u32 ospeedr; + + if (otype == 0x1) + GPIO_OTYPER(gpioport) |= gpios; + else + GPIO_OTYPER(gpioport) &= ~gpios; + + ospeedr = GPIO_OSPEEDR(gpioport); + + for (i = 0; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + ospeedr &= ~GPIO_OSPEED_MASK(i); + ospeedr |= GPIO_OSPEED(i, speed); + } + + GPIO_OSPEEDR(gpioport) = ospeedr; +} + +void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios) +{ + u16 i; + u32 afrl, afrh; + + afrl = GPIO_AFRL(gpioport); + afrh = GPIO_AFRH(gpioport); + + for (i = 0; i < 8; i++) { + if (!((1 << i) & gpios)) + continue; + afrl &= GPIO_AFR_MASK(i); + afrl |= GPIO_AFR(i, alt_func_num); + } + + for (i = 8; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + afrl &= GPIO_AFR_MASK(i-8); + afrh |= GPIO_AFR(i-8, alt_func_num); + } + + GPIO_AFRL(gpioport) = afrl; + GPIO_AFRH(gpioport) = afrh; +} + +void gpio_set(u32 gpioport, u16 gpios) +{ + GPIO_BSRR(gpioport) = gpios; +} + +void gpio_clear(u32 gpioport, u16 gpios) +{ + GPIO_BSRR(gpioport) = gpios << 16; +} + +u16 gpio_get(u32 gpioport, u16 gpios) +{ + return gpio_port_read(gpioport) & gpios; +} + +void gpio_toggle(u32 gpioport, u16 gpios) +{ + GPIO_ODR(gpioport) = GPIO_IDR(gpioport) ^ gpios; +} + +u16 gpio_port_read(u32 gpioport) +{ + return (u16)GPIO_IDR(gpioport); +} + +void gpio_port_write(u32 gpioport, u16 data) +{ + GPIO_ODR(gpioport) = data; +} + +void gpio_port_config_lock(u32 gpioport, u16 gpios) +{ + u32 reg32; + + /* Special "Lock Key Writing Sequence", see datasheet. */ + GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */ + GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */ + GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */ + reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */ + reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */ + + /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */ +} diff --git a/lib/stm32f2/libopencm3_stm32f2.ld b/lib/stm32f2/libopencm3_stm32f2.ld new file mode 100644 index 00000000..fda7d023 --- /dev/null +++ b/lib/stm32f2/libopencm3_stm32f2.ld @@ -0,0 +1,63 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* Generic linker script for STM32 targets using libopencm3. */ + +/* Memory regions must be defined in the ld script which includes this one. */ + +/* Enforce emmition of the vector table. */ +EXTERN (vector_table) + +/* Define sections. */ +SECTIONS +{ + . = ORIGIN(rom); + + .text : { + *(.vectors) /* Vector table */ + *(.text*) /* Program code */ + *(.rodata*) /* Read-only data */ + _etext = .; + } >rom + + . = ORIGIN(ram); + + .data : { + _data = .; + *(.data*) /* Read-write initialized data */ + _edata = .; + } >ram AT >rom + + .bss : { + *(.bss*) /* Read-write zero initialized data */ + *(COMMON) + _ebss = .; + } >ram AT >rom + + /* + * The .eh_frame section appears to be used for C++ exception handling. + * You may need to fix this if you're using C++. + */ + /DISCARD/ : { *(.eh_frame) } + + end = .; +} + +PROVIDE(_stack = 0x20000800); + diff --git a/lib/stm32f2/rcc.c b/lib/stm32f2/rcc.c new file mode 100644 index 00000000..048f0ffd --- /dev/null +++ b/lib/stm32f2/rcc.c @@ -0,0 +1,412 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Federico Ruiz-Ugalde + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2010 Thomas Otto + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include + +/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset */ +u32 rcc_ppre1_frequency = 8000000; +u32 rcc_ppre2_frequency = 8000000; + +/* TODO: Create a table for these values */ +#define RCC_PLL_M 8 +#define RCC_PLL_N 336 +#define RCC_PLL_P 2 +#define RCC_PLL_Q 7 +#define RCC_PLLI2S_N 192 +#define RCC_PLLI2S_R 5 + +void rcc_osc_ready_int_clear(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR |= RCC_CIR_PLLRDYC; + break; + case HSE: + RCC_CIR |= RCC_CIR_HSERDYC; + break; + case HSI: + RCC_CIR |= RCC_CIR_HSIRDYC; + break; + case LSE: + RCC_CIR |= RCC_CIR_LSERDYC; + break; + case LSI: + RCC_CIR |= RCC_CIR_LSIRDYC; + break; + } +} + +void rcc_osc_ready_int_enable(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR |= RCC_CIR_PLLRDYIE; + break; + case HSE: + RCC_CIR |= RCC_CIR_HSERDYIE; + break; + case HSI: + RCC_CIR |= RCC_CIR_HSIRDYIE; + break; + case LSE: + RCC_CIR |= RCC_CIR_LSERDYIE; + break; + case LSI: + RCC_CIR |= RCC_CIR_LSIRDYIE; + break; + } +} + +void rcc_osc_ready_int_disable(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR &= ~RCC_CIR_PLLRDYIE; + break; + case HSE: + RCC_CIR &= ~RCC_CIR_HSERDYIE; + break; + case HSI: + RCC_CIR &= ~RCC_CIR_HSIRDYIE; + break; + case LSE: + RCC_CIR &= ~RCC_CIR_LSERDYIE; + break; + case LSI: + RCC_CIR &= ~RCC_CIR_LSIRDYIE; + break; + } +} + +int rcc_osc_ready_int_flag(osc_t osc) +{ + switch (osc) { + case PLL: + return ((RCC_CIR & RCC_CIR_PLLRDYF) != 0); + break; + case HSE: + return ((RCC_CIR & RCC_CIR_HSERDYF) != 0); + break; + case HSI: + return ((RCC_CIR & RCC_CIR_HSIRDYF) != 0); + break; + case LSE: + return ((RCC_CIR & RCC_CIR_LSERDYF) != 0); + break; + case LSI: + return ((RCC_CIR & RCC_CIR_LSIRDYF) != 0); + break; + } + + /* Shouldn't be reached. */ + return -1; +} + +void rcc_css_int_clear(void) +{ + RCC_CIR |= RCC_CIR_CSSC; +} + +int rcc_css_int_flag(void) +{ + return ((RCC_CIR & RCC_CIR_CSSF) != 0); +} + +void rcc_wait_for_osc_ready(osc_t osc) +{ + switch (osc) { + case PLL: + while ((RCC_CR & RCC_CR_PLLRDY) == 0); + break; + case HSE: + while ((RCC_CR & RCC_CR_HSERDY) == 0); + break; + case HSI: + while ((RCC_CR & RCC_CR_HSIRDY) == 0); + break; + case LSE: + while ((RCC_BDCR & RCC_BDCR_LSERDY) == 0); + break; + case LSI: + while ((RCC_CSR & RCC_CSR_LSIRDY) == 0); + break; + } +} + +void rcc_wait_for_sysclk_status(osc_t osc) +{ + switch (osc) { + case PLL: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_PLL); + break; + case HSE: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_HSE); + break; + case HSI: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_HSI); + break; + default: + /* Shouldn't be reached. */ + break; + } +} + +void rcc_osc_on(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CR |= RCC_CR_PLLON; + break; + case HSE: + RCC_CR |= RCC_CR_HSEON; + break; + case HSI: + RCC_CR |= RCC_CR_HSION; + break; + case LSE: + RCC_BDCR |= RCC_BDCR_LSEON; + break; + case LSI: + RCC_CSR |= RCC_CSR_LSION; + break; + } +} + +void rcc_osc_off(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CR &= ~RCC_CR_PLLON; + break; + case HSE: + RCC_CR &= ~RCC_CR_HSEON; + break; + case HSI: + RCC_CR &= ~RCC_CR_HSION; + break; + case LSE: + RCC_BDCR &= ~RCC_BDCR_LSEON; + break; + case LSI: + RCC_CSR &= ~RCC_CSR_LSION; + break; + } +} + +void rcc_css_enable(void) +{ + RCC_CR |= RCC_CR_CSSON; +} + +void rcc_css_disable(void) +{ + RCC_CR &= ~RCC_CR_CSSON; +} + +void rcc_osc_bypass_enable(osc_t osc) +{ + switch (osc) { + case HSE: + RCC_CR |= RCC_CR_HSEBYP; + break; + case LSE: + RCC_BDCR |= RCC_BDCR_LSEBYP; + break; + case PLL: + case HSI: + case LSI: + /* Do nothing, only HSE/LSE allowed here. */ + break; + } +} + +void rcc_osc_bypass_disable(osc_t osc) +{ + switch (osc) { + case HSE: + RCC_CR &= ~RCC_CR_HSEBYP; + break; + case LSE: + RCC_BDCR &= ~RCC_BDCR_LSEBYP; + break; + case PLL: + case HSI: + case LSI: + /* Do nothing, only HSE/LSE allowed here. */ + break; + } +} + +void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en) +{ + *reg |= en; +} + +void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en) +{ + *reg &= ~en; +} + +void rcc_peripheral_reset(volatile u32 *reg, u32 reset) +{ + *reg |= reset; +} + +void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset) +{ + *reg &= ~clear_reset; +} + +void rcc_set_sysclk_source(u32 clk) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 1) | (1 << 0)); + RCC_CFGR = (reg32 | clk); +} + +void rcc_set_pll_source(u32 pllsrc) +{ + u32 reg32; + + reg32 = RCC_PLLCFGR; + reg32 &= ~(1 << 22); + RCC_PLLCFGR = (reg32 | (pllsrc << 22)); +} + +void rcc_set_ppre2(u32 ppre2) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 11) | (1 << 12) | (1 << 13)); + RCC_CFGR = (reg32 | (ppre2 << 11)); +} + +void rcc_set_ppre1(u32 ppre1) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 8) | (1 << 9) | (1 << 10)); + RCC_CFGR = (reg32 | (ppre1 << 8)); +} + +void rcc_set_hpre(u32 hpre) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7)); + RCC_CFGR = (reg32 | (hpre << 4)); +} + +void rcc_set_rtcpre(u32 rtcpre) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 16) | (1 << 17) | (1 << 18) | (1 << 19) | (1 << 20)); + RCC_CFGR = (reg32 | (rtcpre << 16)); +} + +void rcc_set_main_pll_hsi(u32 pllm, u32 plln, u32 pllp, u32 pllq) +{ + RCC_PLLCFGR = pllm | + (plln << 6) | + (((pllp >> 1) - 1) << 16) | + (pllq << 24); +} + +void rcc_set_main_pll_hse(u32 pllm, u32 plln, u32 pllp, u32 pllq) +{ + RCC_PLLCFGR = pllm | + (plln << 6) | + (((pllp >> 1) - 1) << 16) | + RCC_PLLCFGR_PLLSRC | + (pllq << 24); +} + +u32 rcc_system_clock_source(void) +{ + /* Return the clock source which is used as system clock. */ + return ((RCC_CFGR & 0x000c) >> 2); +} + +void rcc_clock_setup_in_hse_8mhz_out_120mhz(void) +{ + /* Enable internal high-speed oscillator. */ + rcc_osc_on(HSI); + rcc_wait_for_osc_ready(HSI); + + /* Select HSI as SYSCLK source. */ + rcc_set_sysclk_source(RCC_CFGR_SW_HSI); + + /* Enable external high-speed oscillator 8MHz. */ + rcc_osc_on(HSE); + rcc_wait_for_osc_ready(HSE); + rcc_set_sysclk_source(RCC_CFGR_SW_HSE); + + /* + * Set prescalers for AHB, ADC, ABP1, ABP2. + * Do this before touching the PLL (TODO: why?). + */ + rcc_set_hpre(RCC_CFGR_HPRE_DIV_NONE); /* Set. 120MHz Max. 120MHz */ + rcc_set_ppre1(RCC_CFGR_PPRE_DIV_4); /* Set. 30MHz Max. 30MHz */ + rcc_set_ppre2(RCC_CFGR_PPRE_DIV_2); /* Set. 60MHz Max. 60MHz */ + + rcc_set_main_pll_hse(RCC_PLL_M, RCC_PLL_N, RCC_PLL_P, RCC_PLL_Q); + + /* Enable PLL oscillator and wait for it to stabilize. */ + rcc_osc_on(PLL); + rcc_wait_for_osc_ready(PLL); + + /* + * @3.3V + * Sysclk runs with 120MHz -> 3 waitstates. + * 0WS from 0-30MHz + * 1WS from 30-60MHz + * 2WS from 60-90MHz + * 3WS from 90-120MHz + */ + flash_set_ws(FLASH_PRFTEN | FLASH_ICE | FLASH_DCE | FLASH_LATENCY_3WS); + + /* Select PLL as SYSCLK source. */ + rcc_set_sysclk_source(RCC_CFGR_SW_PLL); + + /* Wait for PLL clock to be selected. */ + rcc_wait_for_sysclk_status(PLL); + + /* Set the peripheral clock frequencies used */ + rcc_ppre1_frequency = 30000000; + rcc_ppre2_frequency = 60000000; +} + +void rcc_backupdomain_reset(void) +{ + /* Set the backup domain software reset. */ + RCC_BDCR |= RCC_BDCR_BDRST; + + /* Clear the backup domain software reset. */ + RCC_BDCR &= ~RCC_BDCR_BDRST; +} diff --git a/lib/stm32f2/vector.c b/lib/stm32f2/vector.c new file mode 100644 index 00000000..d6f70f8e --- /dev/null +++ b/lib/stm32f2/vector.c @@ -0,0 +1,336 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Piotr Esden-Tempski + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#define WEAK __attribute__ ((weak)) + +/* Symbols exported by linker script */ +extern unsigned _etext, _data, _edata, _ebss, _stack; + +void main(void); +void reset_handler(void); +void blocking_handler(void); +void null_handler(void); + +void WEAK reset_handler(void); +void WEAK nmi_handler(void); +void WEAK hard_fault_handler(void); +void WEAK mem_manage_handler(void); +void WEAK bus_fault_handler(void); +void WEAK usage_fault_handler(void); +void WEAK sv_call_handler(void); +void WEAK debug_monitor_handler(void); +void WEAK pend_sv_handler(void); +void WEAK sys_tick_handler(void); +void WEAK wwdg_isr(void); +void WEAK pvd_isr(void); +void WEAK tamp_stamp_isr(void); +void WEAK rtc_wkup_isr(void); +void WEAK flash_isr(void); +void WEAK rcc_isr(void); +void WEAK exti0_isr(void); +void WEAK exti1_isr(void); +void WEAK exti2_isr(void); +void WEAK exti3_isr(void); +void WEAK exti4_isr(void); +void WEAK dma1_stream0_isr(void); +void WEAK dma1_stream1_isr(void); +void WEAK dma1_stream2_isr(void); +void WEAK dma1_stream3_isr(void); +void WEAK dma1_stream4_isr(void); +void WEAK dma1_stream5_isr(void); +void WEAK dma1_stream6_isr(void); +void WEAK adc_isr(void); +void WEAK can1_tx_isr(void); +void WEAK can1_rx0_isr(void); +void WEAK can1_rx1_isr(void); +void WEAK can1_sce_isr(void); +void WEAK exti9_5_isr(void); +void WEAK tim1_brk_tim9_isr(void); +void WEAK tim1_up_tim10_isr(void); +void WEAK tim1_trg_com_tim11_isr(void); +void WEAK tim1_cc_isr(void); +void WEAK tim2_isr(void); +void WEAK tim3_isr(void); +void WEAK tim4_isr(void); +void WEAK i2c1_ev_isr(void); +void WEAK i2c1_er_isr(void); +void WEAK i2c2_ev_isr(void); +void WEAK i2c2_er_isr(void); +void WEAK spi1_isr(void); +void WEAK spi2_isr(void); +void WEAK usart1_isr(void); +void WEAK usart2_isr(void); +void WEAK usart3_isr(void); +void WEAK exti15_10_isr(void); +void WEAK rtc_alarm_isr(void); +void WEAK usb_fs_wkup_isr(void); +void WEAK tim8_brk_tim12_isr(void); +void WEAK tim8_up_tim13_isr(void); +void WEAK tim8_trg_com_tim14_isr(void); +void WEAK tim8_cc_isr(void); +void WEAK dma1_stream7_isr(void); +void WEAK fsmc_isr(void); +void WEAK sdio_isr(void); +void WEAK tim5_isr(void); +void WEAK spi3_isr(void); +void WEAK usart4_isr(void); +void WEAK usart5_isr(void); +void WEAK tim6_dac_isr(void); +void WEAK tim7_isr(void); +void WEAK dma2_stream0_isr(void); +void WEAK dma2_stream1_isr(void); +void WEAK dma2_stream2_isr(void); +void WEAK dma2_stream3_isr(void); +void WEAK dma2_stream4_isr(void); +void WEAK eth_isr(void); +void WEAK eth_wkup_isr(void); +void WEAK can2_tx_isr(void); +void WEAK can2_rx0_isr(void); +void WEAK can2_rx1_isr(void); +void WEAK can2_sce_isr(void); +void WEAK otg_fs_isr(void); +void WEAK dma2_stream5_isr(void); +void WEAK dma2_stream6_isr(void); +void WEAK dma2_stream7_isr(void); +void WEAK usart6_isr(void); +void WEAK i2c3_ev_isr(void); +void WEAK i2c3_er_isr(void); +void WEAK otg_hs_ep1_out_isr(void); +void WEAK otg_hs_ep1_in_isr(void); +void WEAK otg_hs_wkup_isr(void); +void WEAK otg_hs_isr(void); +void WEAK dcmi_isr(void); +void WEAK cryp_isr(void); +void WEAK hash_rng_isr(void); + +__attribute__ ((section(".vectors"))) +void (*const vector_table[]) (void) = { + (void*)&_stack, + reset_handler, + nmi_handler, + hard_fault_handler, + mem_manage_handler, + bus_fault_handler, + usage_fault_handler, + 0, 0, 0, 0, /* Reserved */ + sv_call_handler, + debug_monitor_handler, + 0, /* Reserved */ + pend_sv_handler, + sys_tick_handler, + wwdg_isr, + pvd_isr, + tamp_stamp_isr, + rtc_wkup_isr, + flash_isr, + rcc_isr, + exti0_isr, + exti1_isr, + exti2_isr, + exti3_isr, + exti4_isr, + dma1_stream0_isr, + dma1_stream1_isr, + dma1_stream2_isr, + dma1_stream3_isr, + dma1_stream4_isr, + dma1_stream5_isr, + dma1_stream6_isr, + adc_isr, + can1_tx_isr, + can1_rx0_isr, + can1_rx1_isr, + can1_sce_isr, + exti9_5_isr, + tim1_brk_tim9_isr, + tim1_up_tim10_isr, + tim1_trg_com_tim11_isr, + tim1_cc_isr, + tim2_isr, + tim3_isr, + tim4_isr, + i2c1_ev_isr, + i2c1_er_isr, + i2c2_ev_isr, + i2c2_er_isr, + spi1_isr, + spi2_isr, + usart1_isr, + usart2_isr, + usart3_isr, + exti15_10_isr, + rtc_alarm_isr, + usb_fs_wkup_isr, + tim8_brk_tim12_isr, + tim8_up_tim13_isr, + tim8_trg_com_tim14_isr, + tim8_cc_isr, + dma1_stream7_isr, + fsmc_isr, + sdio_isr, + tim5_isr, + spi3_isr, + usart4_isr, + usart5_isr, + tim6_dac_isr, + tim7_isr, + dma2_stream0_isr, + dma2_stream1_isr, + dma2_stream2_isr, + dma2_stream3_isr, + dma2_stream4_isr, + eth_isr, + eth_wkup_isr, + can2_tx_isr, + can2_rx0_isr, + can2_rx1_isr, + can2_sce_isr, + otg_fs_isr, + dma2_stream5_isr, + dma2_stream6_isr, + dma2_stream7_isr, + usart6_isr, + i2c3_ev_isr, + i2c3_er_isr, + otg_hs_ep1_out_isr, + otg_hs_ep1_in_isr, + otg_hs_wkup_isr, + otg_hs_isr, + dcmi_isr, + cryp_isr, + hash_rng_isr, +}; + +void reset_handler(void) +{ + volatile unsigned *src, *dest; + asm("MSR msp, %0" : : "r"(&_stack)); + + for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++) + *dest = *src; + + while (dest < &_ebss) + *dest++ = 0; + + /* Call the application's entry point. */ + main(); +} + +void blocking_handler(void) +{ + while (1) ; +} + +void null_handler(void) +{ + /* Do nothing. */ +} + +#pragma weak nmi_handler = null_handler +#pragma weak hard_fault_handler = blocking_handler +#pragma weak mem_manage_handler = blocking_handler +#pragma weak bus_fault_handler = blocking_handler +#pragma weak usage_fault_handler = blocking_handler +#pragma weak sv_call_handler = null_handler +#pragma weak debug_monitor_handler = null_handler +#pragma weak pend_sv_handler = null_handler +#pragma weak sys_tick_handler = null_handler +#pragma weak wwdg_isr = null_handler +#pragma weak pvd_isr = null_handler +#pragma weak tamp_stamp_isr = null_handler +#pragma weak rtc_wkup_isr = null_handler +#pragma weak flash_isr = null_handler +#pragma weak rcc_isr = null_handler +#pragma weak exti0_isr = null_handler +#pragma weak exti1_isr = null_handler +#pragma weak exti2_isr = null_handler +#pragma weak exti3_isr = null_handler +#pragma weak exti4_isr = null_handler +#pragma weak dma1_stream0_isr = null_handler +#pragma weak dma1_stream1_isr = null_handler +#pragma weak dma1_stream2_isr = null_handler +#pragma weak dma1_stream3_isr = null_handler +#pragma weak dma1_stream4_isr = null_handler +#pragma weak dma1_stream5_isr = null_handler +#pragma weak dma1_stream6_isr = null_handler +#pragma weak adc_isr = null_handler +#pragma weak can1_tx_isr = null_handler +#pragma weak can1_rx0_isr = null_handler +#pragma weak can1_rx1_isr = null_handler +#pragma weak can1_sce_isr = null_handler +#pragma weak exti9_5_isr = null_handler +#pragma weak tim1_brk_tim9_isr = null_handler +#pragma weak tim1_up_tim10_isr = null_handler +#pragma weak tim1_trg_com_tim11_isr = null_handler +#pragma weak tim1_cc_isr = null_handler +#pragma weak tim2_isr = null_handler +#pragma weak tim3_isr = null_handler +#pragma weak tim4_isr = null_handler +#pragma weak i2c1_ev_isr = null_handler +#pragma weak i2c1_er_isr = null_handler +#pragma weak i2c2_ev_isr = null_handler +#pragma weak i2c2_er_isr = null_handler +#pragma weak spi1_isr = null_handler +#pragma weak spi2_isr = null_handler +#pragma weak usart1_isr = null_handler +#pragma weak usart2_isr = null_handler +#pragma weak usart3_isr = null_handler +#pragma weak exti15_10_isr = null_handler +#pragma weak rtc_alarm_isr = null_handler +#pragma weak usb_fs_wkup_isr = null_handler +#pragma weak tim8_brk_tim12_isr = null_handler +#pragma weak tim8_up_tim13_isr = null_handler +#pragma weak tim8_trg_com_tim14_isr = null_handler +#pragma weak tim8_cc_isr = null_handler +#pragma weak dma1_stream7_isr = null_handler +#pragma weak fsmc_isr = null_handler +#pragma weak sdio_isr = null_handler +#pragma weak tim5_isr = null_handler +#pragma weak spi3_isr = null_handler +#pragma weak usart4_isr = null_handler +#pragma weak usart5_isr = null_handler +#pragma weak tim6_dac_isr = null_handler +#pragma weak tim7_isr = null_handler +#pragma weak dma2_stream0_isr = null_handler +#pragma weak dma2_stream1_isr = null_handler +#pragma weak dma2_stream2_isr = null_handler +#pragma weak dma2_stream3_isr = null_handler +#pragma weak dma2_stream4_isr = null_handler +#pragma weak eth_isr = null_handler +#pragma weak eth_wkup_isr = null_handler +#pragma weak can2_tx_isr = null_handler +#pragma weak can2_rx0_isr = null_handler +#pragma weak can2_rx1_isr = null_handler +#pragma weak can2_sce_isr = null_handler +#pragma weak otg_fs_isr = null_handler +#pragma weak dma2_stream5_isr = null_handler +#pragma weak dma2_stream6_isr = null_handler +#pragma weak dma2_stream7_isr = null_handler +#pragma weak usart6_isr = null_handler +#pragma weak i2c3_ev_isr = null_handler +#pragma weak i2c3_er_isr = null_handler +#pragma weak otg_hs_ep1_out_isr = null_handler +#pragma weak otg_hs_ep1_in_isr = null_handler +#pragma weak otg_hs_wkup_isr = null_handler +#pragma weak otg_hs_isr = null_handler +#pragma weak dcmi_isr = null_handler +#pragma weak cryp_isr = null_handler +#pragma weak hash_rng_isr = null_handler + diff --git a/lib/usb/usb_f103.c b/lib/usb/usb_f103.c index 1c9a8ec4..2c5628d2 100644 --- a/lib/usb/usb_f103.c +++ b/lib/usb/usb_f103.c @@ -17,10 +17,10 @@ * along with this program. If not, see . */ -#include +#include #include #include -#include +#include #include #include "usb_private.h" diff --git a/lib/usb/usb_f107.c b/lib/usb/usb_f107.c index 20db7598..16630eea 100644 --- a/lib/usb/usb_f107.c +++ b/lib/usb/usb_f107.c @@ -17,7 +17,7 @@ * along with this program. If not, see . */ -#include +#include #include #include #include