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stm32/f0: enable clocking from HSE crystal

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The following four new functions enable clocking SoC from HSE crystal:
	rcc_clock_setup_in_hse_8mhz_out_{8,16,32,48}mhz

These functions start HSE as external clock and feed its output to PLL
if higher frequency is needed.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 -> Dropped 8,16,32Mhz functions as superfluous.
This commit is contained in:
Sergey Matyukevich 2016-12-17 22:21:41 +03:00 committed by Karl Palsson
parent ef668edef6
commit 7cacbbfb8d
2 changed files with 28 additions and 0 deletions
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1
include/libopencm3/stm32/f0/rcc.h
View File

@ -525,6 +525,7 @@ void rcc_set_hpre(uint32_t hpre);
void rcc_set_prediv(uint32_t prediv);
enum rcc_osc rcc_system_clock_source(void);
enum rcc_osc rcc_usb_clock_source(void);
void rcc_clock_setup_in_hse_8mhz_out_48mhz(void);
void rcc_clock_setup_in_hsi_out_8mhz(void);
void rcc_clock_setup_in_hsi_out_16mhz(void);
void rcc_clock_setup_in_hsi_out_24mhz(void);

27
lib/stm32/f0/rcc.c
View File

@ -591,6 +591,33 @@ enum rcc_osc rcc_usb_clock_source(void)
return (RCC_CFGR3 & RCC_CFGR3_USBSW) ? RCC_PLL : RCC_HSI48;
}
/**
* Set System Clock PLL at 48MHz from HSE at 8MHz.
*/
void rcc_clock_setup_in_hse_8mhz_out_48mhz(void)
{
rcc_osc_on(RCC_HSE);
rcc_wait_for_osc_ready(RCC_HSE);
rcc_set_sysclk_source(RCC_HSE);
rcc_set_hpre(RCC_CFGR_HPRE_NODIV);
rcc_set_ppre(RCC_CFGR_PPRE_NODIV);
flash_set_ws(FLASH_ACR_LATENCY_024_048MHZ);
/* PLL: 8MHz * 6 = 48MHz */
rcc_set_pll_multiplication_factor(RCC_CFGR_PLLMUL_MUL6);
rcc_set_pll_source(RCC_CFGR_PLLSRC_HSE_CLK);
rcc_set_pllxtpre(RCC_CFGR_PLLXTPRE_HSE_CLK);
rcc_osc_on(RCC_PLL);
rcc_wait_for_osc_ready(RCC_PLL);
rcc_set_sysclk_source(RCC_PLL);
rcc_apb1_frequency = 48000000;
rcc_ahb_frequency = 48000000;
}
/*---------------------------------------------------------------------------*/
/** @brief RCC Set System Clock HSI at 8MHz