[CM3] Add register definitions for Debug Watch Trace point.
Add provision functions for the use of CPU counter as a high-resolution timer for code benchmarking purposes
This commit is contained in:
Frantisek Burian
Piotr Esden-Tempski
parent
aa9b94ee1d
commit
7ccc0d053e
152
include/libopencm3/cm3/dwt.h
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152
include/libopencm3/cm3/dwt.h
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_CM3_DWT_H
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#define LIBOPENCM3_CM3_DWT_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/cm3/memorymap.h>
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/*****************************************************************************/
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/* Register definitions */
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/*****************************************************************************/
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#define DWT_CTRL MMIO32(DWT_BASE + 0x00)
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/* Those defined only on ARMv7 and above */
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
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#define DWT_CYCCNT MMIO32(DWT_BASE + 0x04)
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#define DWT_CPICNT MMIO32(DWT_BASE + 0x08)
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#define DWT_EXCCNT MMIO32(DWT_BASE + 0x0C)
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#define DWT_SLEEPCNT MMIO32(DWT_BASE + 0x10)
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#define DWT_LSUCNT MMIO32(DWT_BASE + 0x14)
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#define DWT_FOLDCNT MMIO32(DWT_BASE + 0x18)
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#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
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#define DWT_PCSR MMIO32(DWT_BASE + 0x1C)
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#define DWT_COMP(n) MMIO32(DWT_BASE + 0x20 + (n) * 16)
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#define DWT_MASK(n) MMIO32(DWT_BASE + 0x24 + (n) * 16)
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#define DWT_FUNCTION(n) MMIO32(DWT_BASE + 0x28 + (n) * 16)
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* --- DWT_CTRL values ---------------------------------------------------- */
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#define DWT_CTRL_NUMCOMP_SHIFT 28
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#define DWT_CTRL_NUMCOMP (0x0F << DWT_CTRL_NUMCOMP_SHIFT)
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/* Those defined only on ARMv7 and above */
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
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#define DWT_CTRL_NOTRCPKT (1 << 27)
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#define DWT_CTRL_NOEXTTRIG (1 << 26)
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#define DWT_CTRL_NOCYCCNT (1 << 25)
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#define DWT_CTRL_NOPRFCCNT (1 << 24)
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#define DWT_CTRL_CYCEVTENA (1 << 22)
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#define DWT_CTRL_FOLDEVTENA (1 << 21)
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#define DWT_CTRL_LSUEVTENA (1 << 20)
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#define DWT_CTRL_SLEEPEVTENA (1 << 19)
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#define DWT_CTRL_EXCEVTENA (1 << 18)
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#define DWT_CTRL_CPIEVTENA (1 << 17)
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#define DWT_CTRL_EXCTRCENA (1 << 16)
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#define DWT_CTRL_PCSAMPLENA (1 << 12)
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#define DWT_CTRL_SYNCTAP_SHIFT 10
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#define DWT_CTRL_SYNCTAP (3 << DWT_CTRL_SYNCTAP_SHIFT)
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#define DWT_CTRL_SYNCTAP_DISABLED (0 << DWT_CTRL_SYNCTAP_SHIFT)
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#define DWT_CTRL_SYNCTAP_BIT24 (1 << DWT_CTRL_SYNCTAP_SHIFT)
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#define DWT_CTRL_SYNCTAP_BIT26 (2 << DWT_CTRL_SYNCTAP_SHIFT)
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#define DWT_CTRL_SYNCTAP_BIT28 (3 << DWT_CTRL_SYNCTAP_SHIFT)
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#define DWT_CTRL_CYCTAP (1 << 9)
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#define DWT_CTRL_POSTCNT_SHIFT 5
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#define DWT_CTRL_POSTCNT (0x0F << DWT_CTRL_POSTCNT_SHIFT)
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#define DWT_CTRL_POSTPRESET_SHIFT 1
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#define DWT_CTRL_POSTPRESET (0x0F << DWT_CTRL_POSTPRESET_SHIFT)
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#define DWT_CTRL_CYCCNTENA (1 << 0)
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#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
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/* --- DWT_MASK(x) values -------------------------------------------------- */
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#define DWT_MASKx_MASK 0x0F
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/* --- DWT_FUNCTION(x) values ---------------------------------------------- */
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#define DWT_FUNCTIONx_MATCHED (1 << 24)
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/* Those defined only on ARMv7 and above */
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
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#define DWT_FUNCTIONx_DATAVADDR1_SHIFT 16
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#define DWT_FUNCTIONx_DATAVADDR1 (15 << DWT_FUNCTIONx_DATAVADDR1_SHIFT)
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#define DWT_FUNCTIONx_DATAVADDR0_SHIFT 12
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#define DWT_FUNCTIONx_DATAVADDR0 (15 << DWT_FUNCTIONx_DATAVADDR0_SHIFT)
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#define DWT_FUNCTIONx_DATAVSIZE_SHIFT 10
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#define DWT_FUNCTIONx_DATAVSIZE (3 << DWT_FUNCTIONx_DATAVSIZE_SHIFT)
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#define DWT_FUNCTIONx_DATAVSIZE_BYTE (0 << DWT_FUNCTIONx_DATAVSIZE_SHIFT)
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#define DWT_FUNCTIONx_DATAVSIZE_HALF (1 << DWT_FUNCTIONx_DATAVSIZE_SHIFT)
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#define DWT_FUNCTIONx_DATAVSIZE_WORD (2 << DWT_FUNCTIONx_DATAVSIZE_SHIFT)
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#define DWT_FUNCTIONx_LNK1ENA (1 << 9)
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#define DWT_FUNCTIONx_DATAVMATCH (1 << 8)
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#define DWT_FUNCTIONx_CYCMATCH (1 << 7)
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#define DWT_FUNCTIONx_EMITRANGE (1 << 5)
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#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
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#define DWT_FUNCTIONx_FUNCTION 15
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#define DWT_FUNCTIONx_FUNCTION_DISABLED 0
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/* Those defined only on ARMv6 */
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#if defined(__ARM_ARCH_6M__)
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#define DWT_FUNCTIONx_FUNCTION_PCWATCH 4
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#define DWT_FUNCTIONx_FUNCTION_DWATCH_R 5
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#define DWT_FUNCTIONx_FUNCTION_DWATCH_W 6
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#define DWT_FUNCTIONx_FUNCTION_DWATCH_RW 7
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#endif /* defined(__ARM_ARCH_6M__)*/
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/*****************************************************************************/
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/* API definitions */
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/*****************************************************************************/
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/*****************************************************************************/
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/* API Functions */
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/*****************************************************************************/
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BEGIN_DECLS
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bool dwt_enable_cycle_counter(void);
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uint32_t dwt_read_cycle_counter(void);
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END_DECLS
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#endif /* LIBOPENCM3_CM3_DWT_H */
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77
lib/cm3/dwt.c
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77
lib/cm3/dwt.c
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@ -0,0 +1,77 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/cm3/scs.h>
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#include <libopencm3/cm3/dwt.h>
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/*---------------------------------------------------------------------------*/
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/** @brief DebugTrace Enable the CPU cycle counter
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*
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* This function will try to enable the CPU cycle counter that is intended for
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* benchmarking performance of the code. If function fails, the cycle counter
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* isn't available on this architecture.
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*
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* @returnd true, if success
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*/
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bool dwt_enable_cycle_counter(void)
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{
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#if defined(__ARM_ARCH_6M__)
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return false; /* Not supported on ARMv6M */
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#endif /* defined(__ARM_ARCH_6M__) */
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
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/* Note TRCENA is for 7M and above*/
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SCS_DEMCR |= SCS_DEMCR_TRCENA;
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if (DWT_CTRL & DWT_CTRL_NOCYCCNT) {
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return false; /* Not supported in implementation */
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}
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DWT_CYCCNT = 0;
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DWT_CTRL |= DWT_CTRL_CYCCNTENA;
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return true;
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#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
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/* not supported on other architectures */
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return false;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief DebugTrace Read the CPU cycle counter
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*
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* This function reads the core cycle counter if it is enabled. It is the
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* fastest clock running on the system.
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*
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* @note The CPU cycle counter must be enabled by @ref dwt_enable_cycle_counter
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*
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* @returns 0 if cycle counter is not supported or enabled, the cycle counter
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* value otherwise.
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*/
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uint32_t dwt_read_cycle_counter(void)
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{
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#if defined(__ARM_ARCH_6M__)
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return 0; /* Not supported on ARMv6M */
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#endif /* defined(__ARM_ARCH_6M__) */
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#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
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if (DWT_CTRL & DWT_CTRL_CYCCNTENA) {
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return DWT_CYCCNT;
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} else {
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return 0; /* not supported or enabled */
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}
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#endif /* defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) */
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}
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