stm32g0: add timer.

Only tim2/3/7/14 have been really tested yet - but the others should
work as well.
This commit is contained in:
Guillaume Revaillot 2019-01-17 18:27:48 +01:00
parent 74526f00cc
commit 8173fb7249
3 changed files with 77 additions and 0 deletions

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@ -0,0 +1,74 @@
/** @defgroup timer_defines Timer Defines
*
* @ingroup STM32G0xx_defines
*
* @brief <b>Defined Constants and Types for the STM32G0xx Timers</b>
*
* @version 1.0.0
*
* LGPL License Terms @ref lgpl_license
* */
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2019 Guillaume Revaillot <g.revaillot@gmail.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_TIMER_H
#define LIBOPENCM3_TIMER_H
#include <libopencm3/stm32/common/timer_common_all.h>
/**@{*/
/* Option Register (TIMx_OR1) */
#define TIM_OR1(tim_base) MMIO32((tim_base) + 0x50)
#define TIM2_OR1 TIM_OR1(TIM2)
#define TIM3_OR1 TIM_OR1(TIM3)
/* Alternate Function (TIMx_AF1) */
#define TIM_AF1(tim_base) MMIO32((tim_base) + 0x60)
#define TIM2_AF1 TIM_AF1(TIM2)
#define TIM3_AF1 TIM_AF1(TIM3)
#define TIM16_AF1 TIM_AF1(TIM16)
#define TIM17_AF1 TIM_AF1(TIM17)
/* Input Selection Register (TIMx_TISEL) */
#define TIM_TISEL(tim_base) MMIO32((tim_base) + 0x68)
#define TIM2_TISEL TIM_TISEL(TIM2)
#define TIM3_TISEL TIM_TISEL(TIM3)
#define TIM14_TISEL TIM_TISEL(TIM14)
#define TIM16_TISEL TIM_TISEL(TIM16)
#define TIM17_TISEL TIM_TISEL(TIM17)
/* --- TIMx_OR1 values ---------------------------------------------------- */
/* OCREF_CLR: ocref_clr Source Selection */
#define TIM_OR1_OCREF_CLR (1 << 0)
/** @defgroup tim_or1_ocref_clr TIM_OR1_OCREF_CLR Source Selection
@{*/
#define TIM_OR1_OCREF_CLR_COMP1 (0)
#define TIM_OR1_OCREF_CLR_COMP2 (1)
/**@}*/
BEGIN_DECLS
END_DECLS
/**@}*/
#endif

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@ -40,6 +40,8 @@
# include <libopencm3/stm32/l1/timer.h> # include <libopencm3/stm32/l1/timer.h>
#elif defined(STM32L4) #elif defined(STM32L4)
# include <libopencm3/stm32/l4/timer.h> # include <libopencm3/stm32/l4/timer.h>
#elif defined(STM32G0)
# include <libopencm3/stm32/g0/timer.h>
#else #else
# error "stm32 family not defined." # error "stm32 family not defined."
#endif #endif

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@ -45,6 +45,7 @@ OBJS += spi_common_all.o spi_common_v1_frf.o
OBJS += i2c_common_v2.o OBJS += i2c_common_v2.o
OBJS += rng_common_v1.o OBJS += rng_common_v1.o
OBJS += crc_common_all.o OBJS += crc_common_all.o
OBJS += timer_common_all.o
VPATH +=../:../../cm3:../common VPATH +=../:../../cm3:../common