Fixing small bug/typo in F2 rcc code.
This commit is contained in:
parent
0731bba610
commit
8cc888a030
@ -34,8 +34,8 @@ const clock_scale_t hse_8mhz_3v3[CLOCK_3V3_END] =
|
||||
.pllp = 2,
|
||||
.pllq = 5,
|
||||
.hpre = RCC_CFGR_HPRE_DIV_NONE,
|
||||
.ppre1 = RCC_CFGR_HPRE_DIV_4,
|
||||
.ppre2 = RCC_CFGR_HPRE_DIV_2,
|
||||
.ppre1 = RCC_CFGR_PPRE_DIV_4,
|
||||
.ppre2 = RCC_CFGR_PPRE_DIV_2,
|
||||
.flash_config = FLASH_ICE | FLASH_DCE | FLASH_LATENCY_3WS,
|
||||
.apb1_frequency = 30000000,
|
||||
.apb2_frequency = 60000000,
|
||||
|
Loading…
x
Reference in New Issue
Block a user