From 8da7fbd71e138f13107119987744c832b94dfa4f Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Wed, 12 Jun 2013 21:37:55 -0700 Subject: [PATCH] Changed to use accessors instead of casting to volatile pointers. In places where we were defining memory mapped peripheral buffers we were using directly a cast to "volatile int_type *". For consistency we should use dereferenced accessor like: &MMIO32(address) --- include/libopencm3/cm3/fpb.h | 2 +- include/libopencm3/cm3/itm.h | 4 ++-- include/libopencm3/lm3s/gpio.h | 2 +- include/libopencm3/lm4f/gpio.h | 2 +- include/libopencm3/stm32/common/hash_common_f24.h | 4 ++-- include/libopencm3/stm32/f1/usb.h | 12 ++++++------ include/libopencm3/stm32/otg_fs.h | 2 +- include/libopencm3/stm32/otg_hs.h | 3 +-- lib/stm32/f1/flash.c | 8 ++++---- lib/usb/usb_fx07_common.c | 5 ++--- 10 files changed, 21 insertions(+), 23 deletions(-) diff --git a/include/libopencm3/cm3/fpb.h b/include/libopencm3/cm3/fpb.h index f1324d63..8829f81d 100644 --- a/include/libopencm3/cm3/fpb.h +++ b/include/libopencm3/cm3/fpb.h @@ -33,7 +33,7 @@ #define FPB_REMAP MMIO32(FPB_BASE + 4) /* Flash Patch Comparator (FPB_COMPx) */ -#define FPB_COMP (volatile uint32_t *)(FPB_BASE + 8) +#define FPB_COMP (&MMIO32(FPB_BASE + 8)) /* TODO: PID, CID */ diff --git a/include/libopencm3/cm3/itm.h b/include/libopencm3/cm3/itm.h index 25ab43f7..a05b904f 100644 --- a/include/libopencm3/cm3/itm.h +++ b/include/libopencm3/cm3/itm.h @@ -25,10 +25,10 @@ /* --- ITM registers ------------------------------------------------------- */ /* Stimulus Port x (ITM_STIM[x]) */ -#define ITM_STIM ((volatile uint32_t*)(ITM_BASE)) +#define ITM_STIM (&MMIO32(ITM_BASE)) /* Trace Enable ports (ITM_TER[x]) */ -#define ITM_TER ((volatile uint32_t*)(ITM_BASE + 0xE00)) +#define ITM_TER (&MMIO32(ITM_BASE + 0xE00)) /* Trace Privilege (ITM_TPR) */ #define ITM_TPR MMIO32(ITM_BASE + 0xE40) diff --git a/include/libopencm3/lm3s/gpio.h b/include/libopencm3/lm3s/gpio.h index 8da26be9..8b120789 100644 --- a/include/libopencm3/lm3s/gpio.h +++ b/include/libopencm3/lm3s/gpio.h @@ -64,7 +64,7 @@ LGPL License Terms @ref lgpl_license /* --- GPIO registers ------------------------------------------------------ */ -#define GPIO_DATA(port) ((volatile uint32_t *)(port + 0x000)) +#define GPIO_DATA(port) (&MMIO32(port + 0x000)) #define GPIO_DIR(port) MMIO32(port + 0x400) #define GPIO_IS(port) MMIO32(port + 0x404) #define GPIO_IBE(port) MMIO32(port + 0x408) diff --git a/include/libopencm3/lm4f/gpio.h b/include/libopencm3/lm4f/gpio.h index 25addcc4..eebcf9c6 100644 --- a/include/libopencm3/lm4f/gpio.h +++ b/include/libopencm3/lm4f/gpio.h @@ -90,7 +90,7 @@ * ---------------------------------------------------------------------------*/ /* GPIO Data */ -#define GPIO_DATA(port) ((volatile uint32_t *)(port + 0x000)) +#define GPIO_DATA(port) (&MMIO32(port + 0x000)) /* GPIO Direction */ #define GPIO_DIR(port) MMIO32(port + 0x400) diff --git a/include/libopencm3/stm32/common/hash_common_f24.h b/include/libopencm3/stm32/common/hash_common_f24.h index 446ad64a..2c83f55a 100644 --- a/include/libopencm3/stm32/common/hash_common_f24.h +++ b/include/libopencm3/stm32/common/hash_common_f24.h @@ -55,7 +55,7 @@ Mikhail Avkhimenia #define HASH_STR MMIO32(HASH + 0x08) /* HASH digest registers (HASH_HR[5]) */ -#define HASH_HR ((volatile uint32_t*)(HASH + 0x0C)) /* x5 */ +#define HASH_HR (&MMIO32(HASH + 0x0C)) /* x5 */ /* HASH interrupt enable register (HASH_IMR) */ #define HASH_IMR MMIO32(HASH + 0x20) @@ -64,7 +64,7 @@ Mikhail Avkhimenia #define HASH_SR MMIO32(HASH + 0x28) /* HASH context swap registers (HASH_CSR[51]) */ -#define HASH_CSR ((volatile uint32_t*)(HASH + 0xF8)) /* x51 */ +#define HASH_CSR (&MMIO32(HASH + 0xF8)) /* x51 */ /* --- HASH_CR values ------------------------------------------------------ */ diff --git a/include/libopencm3/stm32/f1/usb.h b/include/libopencm3/stm32/f1/usb.h index 67c8f6e7..5d028ca8 100644 --- a/include/libopencm3/stm32/f1/usb.h +++ b/include/libopencm3/stm32/f1/usb.h @@ -49,17 +49,17 @@ LGPL License Terms @ref lgpl_license /* --- USB general registers ----------------------------------------------- */ /* USB Control register */ -#define USB_CNTR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x40)) +#define USB_CNTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x40)) /* USB Interrupt status register */ -#define USB_ISTR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x44)) +#define USB_ISTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x44)) /* USB Frame number register */ -#define USB_FNR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x48)) +#define USB_FNR_REG (&MMIO32(USB_DEV_FS_BASE + 0x48)) /* USB Device address register */ -#define USB_DADDR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x4C)) +#define USB_DADDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x4C)) /* USB Buffer table address register */ -#define USB_BTABLE_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x50)) +#define USB_BTABLE_REG (&MMIO32(USB_DEV_FS_BASE + 0x50)) /* USB EP register */ -#define USB_EP_REG(EP) ((volatile uint32_t *)(USB_DEV_FS_BASE) + (EP)) +#define USB_EP_REG(EP) (&MMIO32(USB_DEV_FS_BASE) + (EP)) /* --- USB control register masks / bits ----------------------------------- */ diff --git a/include/libopencm3/stm32/otg_fs.h b/include/libopencm3/stm32/otg_fs.h index d8fd262b..1424f04d 100644 --- a/include/libopencm3/stm32/otg_fs.h +++ b/include/libopencm3/stm32/otg_fs.h @@ -89,7 +89,7 @@ #define OTG_FS_PCGCCTL MMIO32(USB_OTG_FS_BASE + 0xE00) /* Data FIFO */ -#define OTG_FS_FIFO(x) ((volatile uint32_t*)(USB_OTG_FS_BASE \ +#define OTG_FS_FIFO(x) (&MMIO32(USB_OTG_FS_BASE \ + (((x) + 1) \ << 12))) diff --git a/include/libopencm3/stm32/otg_hs.h b/include/libopencm3/stm32/otg_hs.h index 71f1476f..5cfa2c7e 100644 --- a/include/libopencm3/stm32/otg_hs.h +++ b/include/libopencm3/stm32/otg_hs.h @@ -145,8 +145,7 @@ #define OTG_HS_PCGCCTL MMIO32(USB_OTG_HS_BASE + OTG_PCGCCTL) /* Data FIFO */ -#define OTG_HS_FIFO(x) ((volatile uint32_t*)(USB_OTG_HS_BASE \ - + OTG_FIFO(x))) +#define OTG_HS_FIFO(x) (&MMIO32(USB_OTG_HS_BASE + OTG_FIFO(x))) /* Global CSRs */ /* OTG_HS USB control registers (OTG_FS_GOTGCTL) */ diff --git a/lib/stm32/f1/flash.c b/lib/stm32/f1/flash.c index 8bb2e1bb..aec98ae7 100644 --- a/lib/stm32/f1/flash.c +++ b/lib/stm32/f1/flash.c @@ -122,13 +122,13 @@ void flash_program_word(uint32_t address, uint32_t data) FLASH_CR |= FLASH_CR_PG; /* Program the first half of the word. */ - (*(volatile uint16_t *)address) = (uint16_t)data; + MMIO16(address) = (uint16_t)data; /* Wait for the write to complete. */ flash_wait_for_last_operation(); /* Program the second half of the word. */ - (*(volatile uint16_t *)(address + 2)) = data >> 16; + MMIO16(address + 2) = data >> 16; /* Wait for the write to complete. */ flash_wait_for_last_operation(); @@ -143,7 +143,7 @@ void flash_program_half_word(uint32_t address, uint16_t data) FLASH_CR |= FLASH_CR_PG; - (*(volatile uint16_t *)address) = data; + MMIO16(address) = data; flash_wait_for_last_operation(); @@ -196,7 +196,7 @@ void flash_program_option_bytes(uint32_t address, uint16_t data) } FLASH_CR |= FLASH_CR_OPTPG; /* Enable option byte programming. */ - (*(volatile uint16_t *)address) = data; + MMIO16(address) = data; flash_wait_for_last_operation(); FLASH_CR &= ~FLASH_CR_OPTPG; /* Disable option byte programming. */ } diff --git a/lib/usb/usb_fx07_common.c b/lib/usb/usb_fx07_common.c index 277c35d9..c54c7a32 100644 --- a/lib/usb/usb_fx07_common.c +++ b/lib/usb/usb_fx07_common.c @@ -30,9 +30,8 @@ * As the code can be used on both cores, the registers offset is modified * according to the selected cores base address. */ #define dev_base_address (usbd_dev->driver->base_address) -#define REBASE(x) MMIO32((x)+(dev_base_address)) -#define REBASE_FIFO(x) ((volatile uint32_t*)((dev_base_address) \ - + (OTG_FIFO(x)))) +#define REBASE(x) MMIO32((x) + (dev_base_address)) +#define REBASE_FIFO(x) (&MMIO32((dev_base_address) + (OTG_FIFO(x)))) void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr) {