From 90debb9fd71f51935f18a94cc8295f0dcc0c792f Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Tue, 16 Aug 2016 13:01:40 +0000 Subject: [PATCH] stm32l1: rcc: Extract msi range function Include doxygen documentation for arguments. --- include/libopencm3/stm32/l1/rcc.h | 13 ++++++++++--- lib/stm32/l1/rcc.c | 19 +++++++++++++------ 2 files changed, 23 insertions(+), 9 deletions(-) diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h index 21ef591a..778f9abe 100644 --- a/include/libopencm3/stm32/l1/rcc.h +++ b/include/libopencm3/stm32/l1/rcc.h @@ -89,8 +89,10 @@ #define RCC_CR_RTCPRE_SHIFT 29 #define RCC_CR_RTCPRE_MASK 0x3 -/* --- RCC_ICSCR values ---------------------------------------------------- */ - +/** @defgroup rcc_icscr_defines RCC_ICSCR definitions + * @brief Internal clock sources calibration register + * @ingroup rcc_defines + *@{*/ #define RCC_ICSCR_MSITRIM_SHIFT 24 #define RCC_ICSCR_MSITRIM_MASK 0xff #define RCC_ICSCR_MSICAL_SHIFT 16 @@ -98,6 +100,9 @@ #define RCC_ICSCR_MSIRANGE_SHIFT 13 #define RCC_ICSCR_MSIRANGE_MASK 0x7 +/** @defgroup rcc_icscr_msirange MSI Ranges + * @ingroup rcc_icscr_defines + *@{*/ #define RCC_ICSCR_MSIRANGE_65KHZ 0x0 #define RCC_ICSCR_MSIRANGE_131KHZ 0x1 #define RCC_ICSCR_MSIRANGE_262KHZ 0x2 @@ -105,11 +110,12 @@ #define RCC_ICSCR_MSIRANGE_1MHZ 0x4 #define RCC_ICSCR_MSIRANGE_2MHZ 0x5 #define RCC_ICSCR_MSIRANGE_4MHZ 0x6 - +/**@}*/ #define RCC_ICSCR_HSITRIM_SHIFT 8 #define RCC_ICSCR_HSITRIM_MASK 0x1f #define RCC_ICSCR_HSICAL_SHIFT 0 #define RCC_ICSCR_HSICAL_MASK 0xff +/**@}*/ /* --- RCC_CFGR values ----------------------------------------------------- */ @@ -605,6 +611,7 @@ void rcc_css_enable(void); void rcc_css_disable(void); void rcc_osc_bypass_enable(enum rcc_osc osc); void rcc_osc_bypass_disable(enum rcc_osc osc); +void rcc_set_msi_range(uint32_t range); void rcc_set_sysclk_source(uint32_t clk); void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier, uint32_t divisor); diff --git a/lib/stm32/l1/rcc.c b/lib/stm32/l1/rcc.c index 73bfa74c..b9f34527 100644 --- a/lib/stm32/l1/rcc.c +++ b/lib/stm32/l1/rcc.c @@ -371,6 +371,18 @@ void rcc_osc_bypass_disable(enum rcc_osc osc) } } +/** + * Set the range of the MSI oscillator + * @param range desired range @ref rcc_icscr_msirange + */ +void rcc_set_msi_range(uint32_t range) +{ + uint32_t reg = RCC_ICSCR; + reg &= ~(RCC_ICSCR_MSIRANGE_MASK << RCC_ICSCR_MSIRANGE_SHIFT); + reg |= (range << RCC_ICSCR_MSIRANGE_SHIFT); + RCC_ICSCR = reg; +} + void rcc_set_sysclk_source(uint32_t clk) { uint32_t reg32; @@ -455,12 +467,7 @@ void rcc_rtc_select_clock(uint32_t clock) void rcc_clock_setup_msi(const struct rcc_clock_scale *clock) { /* Enable internal multi-speed oscillator. */ - - uint32_t reg = RCC_ICSCR; - reg &= ~(RCC_ICSCR_MSIRANGE_MASK << RCC_ICSCR_MSIRANGE_SHIFT); - reg |= (clock->msi_range << RCC_ICSCR_MSIRANGE_SHIFT); - RCC_ICSCR = reg; - + rcc_set_msi_range(clock->msi_range); rcc_osc_on(RCC_MSI); rcc_wait_for_osc_ready(RCC_MSI);