diff --git a/src/crc32.c b/src/crc32.c
index d5c87320..810a9dd4 100644
--- a/src/crc32.c
+++ b/src/crc32.c
@@ -113,26 +113,35 @@ uint32_t generic_crc32(struct target_s *target, uint32_t base, int len)
 uint32_t generic_crc32(struct target_s *target, uint32_t base, int len)
 {
 	uint32_t data;
-	uint8_t byte;
+	uint32_t crc;
+	size_t i;
 
-        CRC_CR |= CRC_CR_RESET;
+	CRC_CR |= CRC_CR_RESET;
 
-	while (len >3) {
-		if (target_mem_read_words(target, &data, base, 1) != 0)
+	while (len > 3) {
+		if (target_mem_read_words(target, &data, base, 4) != 0)
 			return -1;
 
-		CRC_DR = data;
-		base+=4;
-                len -= 4;
+		CRC_DR = __builtin_bswap32(data);
+		base += 4;
+		len -= 4;
 	}
+
+	crc = CRC_DR;
+
 	while (len--) {
-		if (target_mem_read_bytes(target, &byte, base, 1) != 0)
+		if (target_mem_read_bytes(target, (uint8_t *)&data, base++, 1) != 0)
 			return -1;
 
-		CRC_DR = byte;
-		base++;
+		crc ^= data << 24;
+		for (i = 0; i < 8; i++) {
+			if (crc & 0x80000000)
+				crc = (crc << 1) ^ 0x4C11DB7;
+			else
+				crc <<= 1;
+		}
 	}
-	return CRC_DR;
+	return crc;
 }
 
 #endif
diff --git a/src/platforms/f4discovery/platform.c b/src/platforms/f4discovery/platform.c
index 4aa14a67..de39ab76 100644
--- a/src/platforms/f4discovery/platform.c
+++ b/src/platforms/f4discovery/platform.c
@@ -53,6 +53,7 @@ int platform_init(void)
 	rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN);
 	rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN);
 	rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN);
+	rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_CRCEN);
 
 
 	/* Set up USB Pins and alternate function*/
diff --git a/src/platforms/native/platform.c b/src/platforms/native/platform.c
index 8ded81ad..0c130471 100644
--- a/src/platforms/native/platform.c
+++ b/src/platforms/native/platform.c
@@ -72,6 +72,7 @@ int platform_init(void)
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+	rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN);
 
 	/* Setup GPIO ports */
 	gpio_clear(USB_PU_PORT, USB_PU_PIN);
diff --git a/src/platforms/stlink/platform.c b/src/platforms/stlink/platform.c
index 5eaf5fcd..e8435b92 100644
--- a/src/platforms/stlink/platform.c
+++ b/src/platforms/stlink/platform.c
@@ -79,6 +79,7 @@ int platform_init(void)
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+	rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN);
 
 	/* On Rev 1 unconditionally activate MCO on PORTA8 with HSE
          * platform_hwversion() also needed to initialize led_idle_run!
diff --git a/src/platforms/swlink/platform.c b/src/platforms/swlink/platform.c
index 33d4f129..1aa45b16 100644
--- a/src/platforms/swlink/platform.c
+++ b/src/platforms/swlink/platform.c
@@ -51,6 +51,7 @@ int platform_init(void)
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
 	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+	rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN);
 
 	/* Unmap JTAG Pins so we can reuse as GPIO */
         data = AFIO_MAPR;