From 91dca33789409305987e0a784d913f2445a95269 Mon Sep 17 00:00:00 2001 From: Silvio Gissi Date: Mon, 27 Oct 2014 21:52:00 +0000 Subject: [PATCH] lpc17xx: memorymap: Add APB1 peripherals --- include/libopencm3/lpc17xx/memorymap.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/include/libopencm3/lpc17xx/memorymap.h b/include/libopencm3/lpc17xx/memorymap.h index f68f5904..4fab7506 100644 --- a/include/libopencm3/lpc17xx/memorymap.h +++ b/include/libopencm3/lpc17xx/memorymap.h @@ -62,7 +62,26 @@ #define CAN2_BASE (PERIPH_BASE_APB0 + 0x48000) /* PERIPH_BASE_APB0 + 0X4C000 (0x4004 C000 - 0x4005 BFFF): Reserved */ #define I2C1_BASE (PERIPH_BASE_APB0 + 0x5C000) -/* PERIPH_BASE_APB0 + 0X60000 (0x6000 0000 - 0x4007 BFFF): Reserved */ +/* PERIPH_BASE_APB0 + 0X60000 (0x4006 0000 - 0x4007 BFFF): Reserved */ + +/* APB1 */ +/* PERIPH_BASE_APB1 + 0X00000 (0x4008 0000 - 0x4008 7FFF): Reserved */ +#define SSP0_BASE (PERIPH_BASE_APB1 + 0x08000) +#define DAC_BASE (PERIPH_BASE_APB1 + 0x0c000) +#define TIMER2_BASE (PERIPH_BASE_APB1 + 0x10000) +#define TIMER3_BASE (PERIPH_BASE_APB1 + 0x14000) +#define UART2_BASE (PERIPH_BASE_APB1 + 0x18000) +#define UART3_BASE (PERIPH_BASE_APB1 + 0x1c000) +#define I2C2_BASE (PERIPH_BASE_APB1 + 0x20000) +/* PERIPH_BASE_APB1 + 0X24000 (0x400A 4000 - 0x400A 7FFF): Reserved */ +#define I2S_BASE (PERIPH_BASE_APB1 + 0x28000) +/* PERIPH_BASE_APB1 + 0X2C000 (0x400A C000 - 0x400A FFFF): Reserved */ +#define RIT_BASE (PERIPH_BASE_APB1 + 0x30000) +/* PERIPH_BASE_APB1 + 0X34000 (0x400B 4000 - 0x400B 7FFF): Reserved */ +#define MCPWM_BASE (PERIPH_BASE_APB1 + 0x38000) +#define QEI_BASE (PERIPH_BASE_APB1 + 0x3c000) +/* PERIPH_BASE_APB1 + 0X40000 (0x400C 0000 - 0x400F BFFF): Reserved */ +#define SYSCON_BASE (PERIPH_BASE_APB1 + 0x7c000) /* AHB */ #define ETHERNET_BASE (PERIPH_BASE_AHB + 0x00000)