STM32: moved timer_ic_set_polarity from timer_common_all to
f1/timer. Added timer_ic_set_polarity to timer_common_f24 with the enum tim_ic_pol now including trigger on both edges. Changed timer_slave_set_polarity to use enum tim_et_pol rather than tim_ic_pol. In response to suggestion of stinkydiver73 on 24 March that timers in all families have an option for triggers on both edges, except F1.
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@ -1012,10 +1012,10 @@ enum tim_ic_input {
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TIM_IC_IN_TI4 = 6,
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};
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/** Input Capture input polarity */
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enum tim_ic_pol {
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TIM_IC_RISING,
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TIM_IC_FALLING,
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/** Slave external trigger polarity */
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enum tim_et_pol {
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TIM_ET_RISING,
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TIM_ET_FALLING,
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};
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/* --- TIM function prototypes ------------------------------------------------------- */
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@ -1093,13 +1093,12 @@ void timer_set_counter(u32 timer_peripheral, u32 count);
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void timer_ic_set_filter(u32 timer, enum tim_ic_id ic, enum tim_ic_filter flt);
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void timer_ic_set_prescaler(u32 timer, enum tim_ic_id ic, enum tim_ic_psc psc);
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void timer_ic_set_input(u32 timer, enum tim_ic_id ic, enum tim_ic_input in);
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void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
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void timer_ic_enable(u32 timer, enum tim_ic_id ic);
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void timer_ic_disable(u32 timer, enum tim_ic_id ic);
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void timer_slave_set_filter(u32 timer, enum tim_ic_filter flt);
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void timer_slave_set_prescaler(u32 timer, enum tim_ic_psc psc);
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void timer_slave_set_polarity(u32 timer, enum tim_ic_pol pol);
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void timer_slave_set_polarity(u32 timer, enum tim_et_pol pol);
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void timer_slave_set_mode(u32 timer, u8 mode);
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void timer_slave_set_trigger(u32 timer, u8 trigger);
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@ -85,11 +85,19 @@ Only available in F2 and F4 series.
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/**@}*/
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#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
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/** Input Capture input polarity */
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enum tim_ic_pol {
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TIM_IC_RISING,
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TIM_IC_FALLING,
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TIM_IC_BOTH,
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};
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void timer_set_option(u32 timer_peripheral, u32 option);
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void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
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END_DECLS
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@ -37,4 +37,18 @@ LGPL License Terms @ref lgpl_license
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#include <libopencm3/stm32/common/timer_common_all.h>
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/** Input Capture input polarity */
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enum tim_ic_pol {
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TIM_IC_RISING,
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TIM_IC_FALLING,
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};
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
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END_DECLS
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#endif
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@ -1950,22 +1950,6 @@ void timer_ic_set_input(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_inp
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set Input Polarity
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@param[in] timer_peripheral Unsigned int32. Timer register address base
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@param[in] ic ::tim_ic_id. Input Capture channel designator.
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@param[in] pol ::tim_ic_pol. Input Capture polarity.
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*/
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void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
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{
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if (pol)
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TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
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else
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TIM_CCER(timer_peripheral) &= ~(0x2 << (ic * 4));
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Enable Timer Input Capture
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@ -2027,10 +2011,10 @@ void timer_slave_set_prescaler(u32 timer_peripheral, enum tim_ic_psc psc)
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/** @brief Set External Trigger Polarity for Slave
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@param[in] timer_peripheral Unsigned int32. Timer register address base
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@param[in] pol ::tim_ic_pol. Input Capture polarity.
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@param[in] pol ::tim_et_pol. Slave External Trigger polarity.
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*/
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void timer_slave_set_polarity(u32 timer_peripheral, enum tim_ic_pol pol)
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void timer_slave_set_polarity(u32 timer_peripheral, enum tim_et_pol pol)
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{
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if (pol)
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TIM_SMCR(timer_peripheral) |= TIM_SMCR_ETP;
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@ -46,6 +46,32 @@ void timer_set_option(u32 timer_peripheral, u32 option)
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TIM_OR(timer_peripheral) |= option;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set Input Polarity
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The timer channel must be set to input capture mode.
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@param[in] timer_peripheral Unsigned int32. Timer register address base
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@param[in] ic ::tim_ic_id. Input Capture channel designator.
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@param[in] pol ::tim_ic_pol. Input Capture polarity control.
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*/
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void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
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{
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/* Clear CCxP and CCxNP to zero. For both edge trigger both fields are set. Case 10 is invalid. */
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TIM_CCER(timer_peripheral) &= ~(0x6 << (ic * 4));
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switch (pol)
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{
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case TIM_IC_RISING: /* 00 */
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break;
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case TIM_IC_BOTH: /* 11 */
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TIM_CCER(timer_peripheral) |= (0x6 << (ic * 4));
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break;
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case TIM_IC_FALLING: /* 01 */
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TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
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}
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}
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/**@}*/
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@ -38,3 +38,19 @@ in which case this file must be added to the compile list. */
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/common/timer_common_all.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Set Input Polarity
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@param[in] timer_peripheral Unsigned int32. Timer register address base
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@param[in] ic ::tim_ic_id. Input Capture channel designator.
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@param[in] pol ::tim_ic_pol. Input Capture polarity.
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*/
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void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
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{
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if (pol)
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TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
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else
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TIM_CCER(timer_peripheral) &= ~(0x2 << (ic * 4));
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}
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