STM32: moved timer_ic_set_polarity from timer_common_all to

f1/timer.
Added timer_ic_set_polarity to timer_common_f24 with
the enum tim_ic_pol now including trigger on both edges.
Changed timer_slave_set_polarity to use enum tim_et_pol
rather than tim_ic_pol.

In response to suggestion of stinkydiver73 on 24 March that
timers in all families have an option for triggers on both
edges, except F1.
This commit is contained in:
Ken Sarkies 2013-04-26 15:30:07 +09:30
parent cbb4756440
commit 92d1134a16
6 changed files with 71 additions and 24 deletions

View File

@ -1012,10 +1012,10 @@ enum tim_ic_input {
TIM_IC_IN_TI4 = 6,
};
/** Input Capture input polarity */
enum tim_ic_pol {
TIM_IC_RISING,
TIM_IC_FALLING,
/** Slave external trigger polarity */
enum tim_et_pol {
TIM_ET_RISING,
TIM_ET_FALLING,
};
/* --- TIM function prototypes ------------------------------------------------------- */
@ -1093,13 +1093,12 @@ void timer_set_counter(u32 timer_peripheral, u32 count);
void timer_ic_set_filter(u32 timer, enum tim_ic_id ic, enum tim_ic_filter flt);
void timer_ic_set_prescaler(u32 timer, enum tim_ic_id ic, enum tim_ic_psc psc);
void timer_ic_set_input(u32 timer, enum tim_ic_id ic, enum tim_ic_input in);
void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
void timer_ic_enable(u32 timer, enum tim_ic_id ic);
void timer_ic_disable(u32 timer, enum tim_ic_id ic);
void timer_slave_set_filter(u32 timer, enum tim_ic_filter flt);
void timer_slave_set_prescaler(u32 timer, enum tim_ic_psc psc);
void timer_slave_set_polarity(u32 timer, enum tim_ic_pol pol);
void timer_slave_set_polarity(u32 timer, enum tim_et_pol pol);
void timer_slave_set_mode(u32 timer, u8 mode);
void timer_slave_set_trigger(u32 timer, u8 trigger);

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@ -85,11 +85,19 @@ Only available in F2 and F4 series.
/**@}*/
#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
/** Input Capture input polarity */
enum tim_ic_pol {
TIM_IC_RISING,
TIM_IC_FALLING,
TIM_IC_BOTH,
};
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
END_DECLS

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@ -37,4 +37,18 @@ LGPL License Terms @ref lgpl_license
#include <libopencm3/stm32/common/timer_common_all.h>
/** Input Capture input polarity */
enum tim_ic_pol {
TIM_IC_RISING,
TIM_IC_FALLING,
};
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_ic_set_polarity(u32 timer, enum tim_ic_id ic, enum tim_ic_pol pol);
END_DECLS
#endif

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@ -1950,22 +1950,6 @@ void timer_ic_set_input(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_inp
}
}
/*---------------------------------------------------------------------------*/
/** @brief Set Input Polarity
@param[in] timer_peripheral Unsigned int32. Timer register address base
@param[in] ic ::tim_ic_id. Input Capture channel designator.
@param[in] pol ::tim_ic_pol. Input Capture polarity.
*/
void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
{
if (pol)
TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
else
TIM_CCER(timer_peripheral) &= ~(0x2 << (ic * 4));
}
/*---------------------------------------------------------------------------*/
/** @brief Enable Timer Input Capture
@ -2027,10 +2011,10 @@ void timer_slave_set_prescaler(u32 timer_peripheral, enum tim_ic_psc psc)
/** @brief Set External Trigger Polarity for Slave
@param[in] timer_peripheral Unsigned int32. Timer register address base
@param[in] pol ::tim_ic_pol. Input Capture polarity.
@param[in] pol ::tim_et_pol. Slave External Trigger polarity.
*/
void timer_slave_set_polarity(u32 timer_peripheral, enum tim_ic_pol pol)
void timer_slave_set_polarity(u32 timer_peripheral, enum tim_et_pol pol)
{
if (pol)
TIM_SMCR(timer_peripheral) |= TIM_SMCR_ETP;

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@ -46,6 +46,32 @@ void timer_set_option(u32 timer_peripheral, u32 option)
TIM_OR(timer_peripheral) |= option;
}
}
/*---------------------------------------------------------------------------*/
/** @brief Set Input Polarity
The timer channel must be set to input capture mode.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@param[in] ic ::tim_ic_id. Input Capture channel designator.
@param[in] pol ::tim_ic_pol. Input Capture polarity control.
*/
void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
{
/* Clear CCxP and CCxNP to zero. For both edge trigger both fields are set. Case 10 is invalid. */
TIM_CCER(timer_peripheral) &= ~(0x6 << (ic * 4));
switch (pol)
{
case TIM_IC_RISING: /* 00 */
break;
case TIM_IC_BOTH: /* 11 */
TIM_CCER(timer_peripheral) |= (0x6 << (ic * 4));
break;
case TIM_IC_FALLING: /* 01 */
TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
}
}
/**@}*/

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@ -38,3 +38,19 @@ in which case this file must be added to the compile list. */
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_all.h>
/*---------------------------------------------------------------------------*/
/** @brief Set Input Polarity
@param[in] timer_peripheral Unsigned int32. Timer register address base
@param[in] ic ::tim_ic_id. Input Capture channel designator.
@param[in] pol ::tim_ic_pol. Input Capture polarity.
*/
void timer_ic_set_polarity(u32 timer_peripheral, enum tim_ic_id ic, enum tim_ic_pol pol)
{
if (pol)
TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
else
TIM_CCER(timer_peripheral) &= ~(0x2 << (ic * 4));
}