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Merge commit '7365a44989c7c8561c583f75ff30f7277e712ff3' into sam-update

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This commit is contained in:
Jason Kotzin 2022-08-10 19:30:16 -07:00
commit 95a4ebf836
6 changed files with 44 additions and 13 deletions
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4
src/platforms/hosted/bmp_libusb.c
View File

@ -142,6 +142,8 @@ int find_debuggers(BMP_CL_OPTIONS_t *cl_opts,bmp_info_t *info)
libusb_close(handle);
continue;
}
if (res < 0)
serial[0] = 0;
res = libusb_get_string_descriptor_ascii(
handle, desc.iManufacturer, (uint8_t*)manufacturer,
sizeof(manufacturer));
@ -231,6 +233,8 @@ int find_debuggers(BMP_CL_OPTIONS_t *cl_opts,bmp_info_t *info)
if (!cable->name)
continue;
}
if (!serial[0])
strcpy(serial, "<no serial number>");
if (report) {
DEBUG_WARN("%2d: %s, %s, %s\n", found_debuggers + 1,
serial,

7
src/platforms/hosted/bmp_serial.c
View File

@ -209,15 +209,12 @@ static int scan_linux_id(char *name, char *type, char *version, char *serial)
int find_debuggers(BMP_CL_OPTIONS_t *cl_opts, bmp_info_t *info)
{
char name[4096];
if (cl_opts->opt_device)
return 1;
info->bmp_type = BMP_TYPE_BMP;
DIR *dir = opendir(DEVICE_BY_ID);
if (!dir) {
DEBUG_WARN("Could not opendir %s: %s\n", name, strerror(errno));
return -1;
}
if (!dir) /* No serial device connected!*/
return 0;
int found_bmps = 0;
struct dirent *dp;
int i = 0;

26
src/platforms/pc/cl_utils.c
View File

@ -31,6 +31,7 @@
#include "version.h"
#include "target.h"
#include "target_internal.h"
#include "cortexm.h"
#include "cl_utils.h"
#include "bmp_hosted.h"
@ -140,6 +141,8 @@ static void cl_help(char **argv)
DEBUG_WARN("\t-C\t\t: Connect under reset\n");
DEBUG_WARN("\t-t\t\t: Scan SWD or JTAG and display information about \n"
"\t\t\t connected devices\n");
DEBUG_WARN("\t-T\t\t: Continious read/write-back some value to allow\n"
"\t\t\t timing insection of SWJ. Abort with ^C\n");
DEBUG_WARN("\t-e\t\t: Assume \"resistor SWD connection\" on FTDI: TDI\n"
"\t\t\t connected to TMS, TDO to TDI with eventual resistor\n");
DEBUG_WARN("\t-E\t\t: Erase flash until flash end or for given size\n");
@ -163,7 +166,7 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
opt->opt_target_dev = 1;
opt->opt_flash_size = 16 * 1024 *1024;
opt->opt_flash_start = 0xffffffff;
while((c = getopt(argc, argv, "eEhHv:d:s:I:c:CnltVta:S:jpP:rR")) != -1) {
while((c = getopt(argc, argv, "eEhHv:d:s:I:c:CnltVtTa:S:jpP:rR")) != -1) {
switch(c) {
case 'c':
if (optarg)
@ -212,6 +215,9 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
opt->opt_mode = BMP_MODE_TEST;
cl_debuglevel |= BMP_DEBUG_INFO | BMP_DEBUG_STDOUT;
break;
case 'T':
opt->opt_mode = BMP_MODE_SWJ_TEST;
break;
case 'V':
opt->opt_mode = BMP_MODE_FLASH_VERIFY;
break;
@ -262,6 +268,7 @@ void cl_init(BMP_CL_OPTIONS_t *opt, int argc, char **argv)
}
/* Checks */
if ((opt->opt_flash_file) && ((opt->opt_mode == BMP_MODE_TEST ) ||
(opt->opt_mode == BMP_MODE_SWJ_TEST) ||
(opt->opt_mode == BMP_MODE_RESET))) {
DEBUG_WARN("Ignoring filename in reset/test mode\n");
opt->opt_flash_file = NULL;
@ -369,7 +376,22 @@ int cl_execute(BMP_CL_OPTIONS_t *opt)
}
if (opt->opt_flash_start == 0xffffffff)
opt->opt_flash_start = flash_start;
if (opt->opt_mode == BMP_MODE_TEST)
if (opt->opt_mode == BMP_MODE_SWJ_TEST) {
switch (t->core[0]) {
case 'M':
DEBUG_WARN("Continious read/write-back DEMCR. Abort with ^C\n");
while(1) {
uint32_t demcr;
target_mem_read(t, &demcr, CORTEXM_DEMCR, 4);
target_mem_write32(t, CORTEXM_DEMCR, demcr);
platform_delay(1); /* To allow trigger*/
}
default:
DEBUG_WARN("No test for this core type yet\n");
}
}
if ((opt->opt_mode == BMP_MODE_TEST) ||
(opt->opt_mode == BMP_MODE_SWJ_TEST))
goto target_detach;
int read_file = -1;
if ((opt->opt_mode == BMP_MODE_FLASH_WRITE) ||

3
src/platforms/pc/cl_utils.h
View File

@ -33,7 +33,8 @@ enum bmp_cl_mode {
BMP_MODE_FLASH_ERASE,
BMP_MODE_FLASH_WRITE,
BMP_MODE_FLASH_READ,
BMP_MODE_FLASH_VERIFY
BMP_MODE_FLASH_VERIFY,
BMP_MODE_SWJ_TEST,
};
typedef struct BMP_CL_OPTIONS_s {

2
src/target/cortexm.c
View File

@ -448,6 +448,8 @@ bool cortexm_probe(ADIv5_AP_t *ap)
PROBE(lpc43xx_probe);
PROBE(lpc546xx_probe);
PROBE(kinetis_probe); /* Older K-series */
} else if (ap->ap_partno == 0x4cb) { /* Cortex-M23 ROM */
PROBE(gd32f1_probe); /* GD32E23x uses GD32F1 peripherals */
}
/* Info on PIDR of these parts wanted! */
PROBE(sam3x_probe);

15
src/target/stm32f1.c
View File

@ -123,8 +123,10 @@ static void stm32f1_add_flash(target *t,
bool gd32f1_probe(target *t)
{
uint16_t stored_idcode = t->idcode;
// M3 & M4 & riscV only afaik
t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff;
if ((t->cpuid & CPUID_PARTNO_MASK) == CORTEX_M23)
t->idcode = target_mem_read32(t, DBGMCU_IDCODE_F0) & 0xfff;
else
t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff;
uint32_t signature= target_mem_read32(t, FLASHSIZE);
uint32_t flashSize=signature & 0xFFFF;
uint32_t ramSize=signature >>16 ;
@ -132,11 +134,14 @@ bool gd32f1_probe(target *t)
case 0x414: /* Gigadevice gd32f303 */
t->driver = "GD32F3";
break;
case 0x410: /* Gigadevice gd32f103 */
t->driver = "GD32F1";
case 0x410: /* Gigadevice gd32f103, gd32e230 */
if ((t->cpuid & CPUID_PARTNO_MASK) == CORTEX_M23)
t->driver = "GD32E230";
else
t->driver = "GD32F1";
break;
default:
t->idcode = stored_idcode;
t->idcode = stored_idcode;
return false;
}
target_add_ram(t, 0x20000000, ramSize*1024);