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stm32g0: memorymap: get rid of apb1/apb2 reference, device only has one apb.

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I apparently based memorymap.h on previously written header without noticing
that g0 has only one apb despite a big hole in the memory space and addresses
matching usual apb1/apb2 split..
This commit is contained in:
Guillaume Revaillot 2019-08-28 12:03:55 +02:00
parent 1928e6eb3c
commit 998e647dde
1 changed files with 37 additions and 40 deletions
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77
include/libopencm3/stm32/g0/memorymap.h
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@ -23,48 +23,45 @@
#define PERIPH_BASE (0x40000000U)
#define IOPORT_BASE (0x50000000U)
#define INFO_BASE (0x1fff7500U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)
#define PERIPH_BASE_APB (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_AHB (PERIPH_BASE + 0x20000)
/* APB1 */
#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)
#define TIM3_BASE (PERIPH_BASE_APB1 + 0x0400)
#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)
#define TIM7_BASE (PERIPH_BASE_APB1 + 0x1400)
#define TIM14_BASE (PERIPH_BASE_APB1 + 0x2000)
#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800)
#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)
#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000)
#define SPI2_BASE (PERIPH_BASE_APB1 + 0x3800)
#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400)
#define USART3_BASE (PERIPH_BASE_APB1 + 0x4800)
#define USART4_BASE (PERIPH_BASE_APB1 + 0x4C00)
#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
#define CEC_BASE (PERIPH_BASE_APB1 + 0x7800)
#define LPTIM1_BASE (PERIPH_BASE_APB1 + 0x7c00)
#define LPUART1_BASE (PERIPH_BASE_APB1 + 0x8000)
#define LPTIM2_BASE (PERIPH_BASE_APB1 + 0x9400)
#define UCPD1_BASE (PERIPH_BASE_APB1 + 0xA000)
#define UCPD2_BASE (PERIPH_BASE_APB1 + 0xA400)
#define TAMP_BASE (PERIPH_BASE_APB1 + 0xB000)
/* APB2 */
#define SYSCFG_BASE (PERIPH_BASE_APB2 + 0x0000)
#define VREFBUF_BASE (PERIPH_BASE_APB2 + 0x0030)
#define SYSCFG_ITLINE_BASE (PERIPH_BASE_APB2 + 0x0080)
#define COMP_BASE (PERIPH_BASE_APB2 + 0x0200)
#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2400)
#define TIM1_BASE (PERIPH_BASE_APB2 + 0x2C00)
#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)
#define USART1_BASE (PERIPH_BASE_APB2 + 0x3800)
#define TIM15_BASE (PERIPH_BASE_APB2 + 0x4000)
#define TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)
#define TIM17_BASE (PERIPH_BASE_APB2 + 0x4800)
#define DBGMCU_BASE (PERIPH_BASE_APB2 + 0x5800)
/* APB */
#define TIM2_BASE (PERIPH_BASE_APB + 0x0000)
#define TIM3_BASE (PERIPH_BASE_APB + 0x0400)
#define TIM6_BASE (PERIPH_BASE_APB + 0x1000)
#define TIM7_BASE (PERIPH_BASE_APB + 0x1400)
#define TIM14_BASE (PERIPH_BASE_APB + 0x2000)
#define RTC_BASE (PERIPH_BASE_APB + 0x2800)
#define WWDG_BASE (PERIPH_BASE_APB + 0x2c00)
#define IWDG_BASE (PERIPH_BASE_APB + 0x3000)
#define SPI2_BASE (PERIPH_BASE_APB + 0x3800)
#define USART2_BASE (PERIPH_BASE_APB + 0x4400)
#define USART3_BASE (PERIPH_BASE_APB + 0x4800)
#define USART4_BASE (PERIPH_BASE_APB + 0x4C00)
#define I2C1_BASE (PERIPH_BASE_APB + 0x5400)
#define I2C2_BASE (PERIPH_BASE_APB + 0x5800)
#define POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)
#define DAC_BASE (PERIPH_BASE_APB + 0x7400)
#define CEC_BASE (PERIPH_BASE_APB + 0x7800)
#define LPTIM1_BASE (PERIPH_BASE_APB + 0x7c00)
#define LPUART1_BASE (PERIPH_BASE_APB + 0x8000)
#define LPTIM2_BASE (PERIPH_BASE_APB + 0x9400)
#define UCPD1_BASE (PERIPH_BASE_APB + 0xA000)
#define UCPD2_BASE (PERIPH_BASE_APB + 0xA400)
#define TAMP_BASE (PERIPH_BASE_APB + 0xB000)
#define SYSCFG_BASE (PERIPH_BASE_APB + 0x10000)
#define VREFBUF_BASE (PERIPH_BASE_APB + 0x10030)
#define SYSCFG_ITLINE_BASE (PERIPH_BASE_APB + 0x10080)
#define COMP_BASE (PERIPH_BASE_APB + 0x10200)
#define ADC1_BASE (PERIPH_BASE_APB + 0x12400)
#define TIM1_BASE (PERIPH_BASE_APB + 0x12C00)
#define SPI1_BASE (PERIPH_BASE_APB + 0x13000)
#define USART1_BASE (PERIPH_BASE_APB + 0x13800)
#define TIM15_BASE (PERIPH_BASE_APB + 0x14000)
#define TIM16_BASE (PERIPH_BASE_APB + 0x14400)
#define TIM17_BASE (PERIPH_BASE_APB + 0x14800)
#define DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)
/* AHB */
#define DMA1_BASE (PERIPH_BASE_AHB + 0x00000)