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@ -1,3 +1,9 @@
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/* big fat FIXME: this should use a consistent structure, and reference
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* functionality from libopencm3 instead of copypasting.
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*
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* particularly unimplemented features are FIXME'd extra
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* */
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#ifndef OPENCMSIS_CORECM3_H
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#ifndef OPENCMSIS_CORECM3_H
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#define OPENCMSIS_CORECM3_H
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#define OPENCMSIS_CORECM3_H
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@ -25,7 +31,7 @@
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#define SCB_SCR_SLEEPDEEP_Msk (1 << 2)
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#define SCB_SCR_SLEEPDEEP_Msk (1 << 2)
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/* structure as in, for example,
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/* structure as in, for example,
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* DeviceSupport/EnergyMicro/EFM32/efm32tg840f32.h, data from
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* DeviceSupport/EnergyMicro/EFM32/efm32tg840f32.h, data from
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* libopencm3/stm32/f1/scb.h. incomplete. */
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* libopencm3/stm32/f1/scb.h. FIXME incomplete. */
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typedef struct
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typedef struct
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{
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{
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__IO uint32_t CPUID;
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__IO uint32_t CPUID;
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@ -59,6 +65,7 @@ typedef struct
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uint32_t DHCSR;
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uint32_t DHCSR;
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uint32_t DEMCR; /* needed by efm32tg stk trace.c */
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uint32_t DEMCR; /* needed by efm32tg stk trace.c */
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} CoreDebug_TypeDef;
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} CoreDebug_TypeDef;
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/* FIXME let's just hope writes to flash are protected */
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#define CoreDebug ((CoreDebug_TypeDef *) 0)
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#define CoreDebug ((CoreDebug_TypeDef *) 0)
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#define CoreDebug_DHCSR_C_DEBUGEN_Msk 0
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#define CoreDebug_DHCSR_C_DEBUGEN_Msk 0
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#define CoreDebug_DEMCR_TRCENA_Msk 0
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#define CoreDebug_DEMCR_TRCENA_Msk 0
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@ -85,12 +92,13 @@ static inline void NVIC_DisableIRQ(uint8_t irqn)
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NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
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NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
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}
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}
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/* stubs for efm32_int */
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/* stubs for efm32_int. FIXME: how do they do that? nvic documentation in the
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* efm32 core manual doesn't tell anything of a global on/off switch */
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#define __enable_irq() 1
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#define __enable_irq() 1
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#define __disable_irq() 1
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#define __disable_irq() 1
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/* stubs for efm32_mpu */
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/* stubs for efm32_mpu FIXME */
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#define SCB_SHCSR_MEMFAULTENA_Msk 0
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#define SCB_SHCSR_MEMFAULTENA_Msk 0
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@ -101,6 +109,7 @@ typedef struct
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uint32_t RBAR;
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uint32_t RBAR;
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uint32_t RASR;
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uint32_t RASR;
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} MPU_TypeDef;
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} MPU_TypeDef;
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/* FIXME struct at NULL */
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#define MPU ((MPU_TypeDef *) 0)
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#define MPU ((MPU_TypeDef *) 0)
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#define MPU_CTRL_ENABLE_Msk 0
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#define MPU_CTRL_ENABLE_Msk 0
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#define MPU_RASR_XN_Pos 0
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#define MPU_RASR_XN_Pos 0
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@ -167,6 +176,7 @@ typedef struct
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uint32_t LAR;
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uint32_t LAR;
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uint32_t TCR;
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uint32_t TCR;
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} ITM_TypeDef;
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} ITM_TypeDef;
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/* FIXME struct at NULL */
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#define ITM ((ITM_TypeDef *) 0)
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#define ITM ((ITM_TypeDef *) 0)
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/* blink.h expects the isr for systicks to be named SysTick_Handler. with this,
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/* blink.h expects the isr for systicks to be named SysTick_Handler. with this,
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