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@ -96,9 +96,6 @@ int gdb_main_loop(struct target_controller *tc, bool in_syscall)
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int size;
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bool single_step = false;
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/*
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DEBUG("Entering GDB protocol main loop\n");
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*/
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/* GDB protocol main loop */
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while(1) {
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SET_IDLE_STATE(1);
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@ -36,7 +36,7 @@ static void swdptap_turnaround(uint8_t dir)
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if(dir == olddir) return;
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olddir = dir;
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#if 0
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#ifdef DEBUG_SWD_BITS
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DEBUG("%s", dir ? "\n-> ":"\n<- ");
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#endif
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@ -58,7 +58,7 @@ bool swdptap_bit_in(void)
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gpio_set(SWCLK_PORT, SWCLK_PIN);
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gpio_clear(SWCLK_PORT, SWCLK_PIN);
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#if 0
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#ifdef DEBUG_SWD_BITS
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DEBUG("%d", ret?1:0);
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#endif
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@ -67,7 +67,7 @@ bool swdptap_bit_in(void)
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void swdptap_bit_out(bool val)
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{
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#if 0
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#ifdef DEBUG_SWD_BITS
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DEBUG("%d", val);
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#endif
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@ -1,5 +1,4 @@
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/*
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* vim: set noexpandtab ts=4:
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*
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* This file is part of the Black Magic Debug project.
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*
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@ -108,10 +107,6 @@ static int sam4l_flash_erase(struct target_flash *f, target_addr addr, size_t le
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static int sam4l_flash_write_buf(struct target_flash *f, target_addr dest,
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const void *src, size_t len);
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const struct command_s sam4l_cmds[] = {
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{NULL, NULL, NULL}
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};
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/* why Atmel couldn't make it sequential ... */
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static const size_t __ram_size[16] = {
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48 * 1024, /* 0: 48K */
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@ -152,6 +147,7 @@ static const size_t __nvp_size[16] = {
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};
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/* All variants of 4L have a 512 byte page */
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#define SAM4L_PAGE_SIZE 512
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#define SAM4L_ARCH 0xb0
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#define SAM4L_CHIPID_CIDR 0x400E0740
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@ -162,8 +158,6 @@ static const size_t __nvp_size[16] = {
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#define CHIPID_CIDR_NVPSIZ_MASK 0xf
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#define CHIPID_CIDR_NVPSIZ_SHIFT 8
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/* All variants of 4L have a 512 byte page */
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#define SAM4_PAGE_SIZE 512
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/* Arbitrary time to wait for FLASH controller to be ready */
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#define FLASH_TIMEOUT 10000
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@ -177,12 +171,12 @@ static void sam4l_add_flash(target *t, uint32_t addr, size_t length)
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struct target_flash *f = calloc(1, sizeof(struct target_flash));
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f->start = addr;
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f->length = length;
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f->blocksize = 512;
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f->blocksize = SAM4L_PAGE_SIZE;
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f->erase = sam4l_flash_erase;
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f->write = target_flash_write_buffered;
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f->done = target_flash_done_buffered;
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f->write_buf = sam4l_flash_write_buf;
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f->buf_size = 512;;
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f->buf_size = SAM4L_PAGE_SIZE;
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f->erased = 0xff;
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/* add it into the target structures flash chain */
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target_add_flash(t, f);
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@ -264,7 +258,7 @@ bool sam4l_probe(target *t)
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/*
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* We've been reset, make sure we take the core out of reset
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*/
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void
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static void
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sam4l_extended_reset(target *t)
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{
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uint32_t reg;
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@ -345,9 +339,12 @@ sam4l_flash_write_buf(struct target_flash *f, target_addr addr, const void *src,
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DEBUG("\nSAM4L: sam4l_flash_write_buf: addr = 0x%08lx, len %d\n", (long unsigned int) addr, (int) len);
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/* This will fail with unaligned writes, the write_buf version */
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while (len) {
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page = addr / SAM4L_PAGE_SIZE;
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if (len != SAM4L_PAGE_SIZE) {
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return -1;
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}
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/* clear the page buffer */
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if (sam4l_flash_command(t, 0, FLASH_CMD_CPB)) {
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return -1;
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@ -374,10 +371,6 @@ sam4l_flash_write_buf(struct target_flash *f, target_addr addr, const void *src,
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if (sam4l_flash_command(t, page, FLASH_CMD_WP)) {
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return -1;
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}
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/* it should be done after one page, but in case it isn't */
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len -= SAM4L_PAGE_SIZE;
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addr += SAM4L_PAGE_SIZE;
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}
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return 0;
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}
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@ -399,12 +392,12 @@ sam4l_flash_erase(struct target_flash *f, target_addr addr, size_t len)
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*/
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while (len) {
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page = addr / SAM4_PAGE_SIZE;
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page = addr / SAM4L_PAGE_SIZE;
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if (sam4l_flash_command(t, page, FLASH_CMD_EP)) {
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return -1;
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}
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len -= SAM4_PAGE_SIZE;
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addr += SAM4_PAGE_SIZE;
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len -= SAM4L_PAGE_SIZE;
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addr += SAM4L_PAGE_SIZE;
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}
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return 0;
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}
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