From a759a0d9c96344fc9b066648b020cb8025f32074 Mon Sep 17 00:00:00 2001 From: Jacob Walser Date: Tue, 24 Sep 2019 22:16:33 -0400 Subject: [PATCH] stm32f3: unify implementation with f0 adc_enable_analog_watchdog_on_selected_channel - match the same logic as the f0 api - use ADC_CFGR1_AWD1CH_VAL macro to mask the channel bits - don't check if channel is < 18q - enable the awd in addition to setting the selection to single channel monitoring (in following with the signature and @brief 'enable' --- lib/stm32/f3/adc.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/lib/stm32/f3/adc.c b/lib/stm32/f3/adc.c index dc1f7db8..da317134 100644 --- a/lib/stm32/f3/adc.c +++ b/lib/stm32/f3/adc.c @@ -282,14 +282,10 @@ void adc_enable_analog_watchdog_on_all_channels(uint32_t adc) void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel) { - uint32_t reg32; + ADC_CFGR1(adc) = (ADC_CFGR1(adc) & ~ADC_CFGR1_AWD1CH) | + ADC_CFGR1_AWD1CH_VAL(channel); - reg32 = (ADC_CFGR1(adc) & ~ADC_CFGR1_AWD1CH); /* Clear bit [4:0]. */ - if (channel < 18) { - reg32 |= channel; - } - ADC_CFGR1(adc) = reg32; - ADC_CFGR1(adc) |= ADC_CFGR1_AWD1SGL; + ADC_CFGR1(adc) |= ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL; }