efm32hg: add basic makefile, interrupts, device information
This commit is contained in:
parent
5cb852efde
commit
a86948ec6e
2
Makefile
2
Makefile
@ -31,7 +31,7 @@ TARGETS := stm32/f0 stm32/f1 stm32/f2 stm32/f3 stm32/f4 stm32/f7
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TARGETS += stm32/l0 stm32/l1 stm32/l4
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TARGETS += stm32/l0 stm32/l1 stm32/l4
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TARGETS += lpc13xx lpc17xx lpc43xx/m4 lpc43xx/m0
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TARGETS += lpc13xx lpc17xx lpc43xx/m4 lpc43xx/m0
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TARGETS += lm3s lm4f
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TARGETS += lm3s lm4f
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TARGETS += efm32/tg efm32/g efm32/lg efm32/gg
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TARGETS += efm32/tg efm32/g efm32/lg efm32/gg efm32/hg
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TARGETS += sam/3a sam/3n sam/3s sam/3u sam/3x
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TARGETS += sam/3a sam/3n sam/3s sam/3u sam/3x
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TARGETS += sam/d
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TARGETS += sam/d
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TARGETS += vf6xx
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TARGETS += vf6xx
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@ -5,7 +5,7 @@
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ARCHS := stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7
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ARCHS := stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7
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ARCHS += stm32l0 stm32l1 stm32l4
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ARCHS += stm32l0 stm32l1 stm32l4
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ARCHS += efm32g efm32gg efm32lg efm32tg
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ARCHS += efm32g efm32gg efm32hg efm32lg efm32tg
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ARCHS += lm3s lm4f
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ARCHS += lm3s lm4f
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ARCHS += lpc13xx lpc17xx lpc43xx
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ARCHS += lpc13xx lpc17xx lpc43xx
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ARCHS += sam3a sam3n sam3s sam3u sam3x
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ARCHS += sam3a sam3n sam3s sam3u sam3x
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@ -35,6 +35,7 @@ rebuildsources:
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../scripts/gendoxylist ../lib/stm32/l4 stm32l4
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../scripts/gendoxylist ../lib/stm32/l4 stm32l4
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../scripts/gendoxylist ../lib/efm32/g efm32g
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../scripts/gendoxylist ../lib/efm32/g efm32g
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../scripts/gendoxylist ../lib/efm32/gg efm32gg
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../scripts/gendoxylist ../lib/efm32/gg efm32gg
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../scripts/gendoxylist ../lib/efm32/hg efm32hg
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../scripts/gendoxylist ../lib/efm32/lg efm32lg
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../scripts/gendoxylist ../lib/efm32/lg efm32lg
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../scripts/gendoxylist ../lib/efm32/tg efm32tg
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../scripts/gendoxylist ../lib/efm32/tg efm32tg
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../scripts/gendoxylist ../lib/lm3s lm3s
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../scripts/gendoxylist ../lib/lm3s lm3s
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@ -29,6 +29,8 @@
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# include <libopencm3/efm32/lg/nvic.h>
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# include <libopencm3/efm32/lg/nvic.h>
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#elif defined(EFM32GG)
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#elif defined(EFM32GG)
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# include <libopencm3/efm32/gg/nvic.h>
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# include <libopencm3/efm32/gg/nvic.h>
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#elif defined(EFM32HG)
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# include <libopencm3/efm32/hg/nvic.h>
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#elif defined(LPC13XX)
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#elif defined(LPC13XX)
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# include <libopencm3/lpc13xx/nvic.h>
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# include <libopencm3/lpc13xx/nvic.h>
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32
include/libopencm3/efm32/hg/doc-efm32hg.h
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32
include/libopencm3/efm32/hg/doc-efm32hg.h
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@ -0,0 +1,32 @@
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/** @mainpage libopencm3 EFM32 Happy Gecko
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@version 1.0.0
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@date 28 January 2018
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API documentation for Energy Micro EFM32 Happy Gecko Cortex M0+ series.
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LGPL License Terms @ref lgpl_license
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*/
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/** @defgroup EFM32LG EFM32 HappyGecko
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Libraries for Energy Micro EFM32 Happy Gecko series.
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@version 1.0.0
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@date 28 January 2018
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LGPL License Terms @ref lgpl_license
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*/
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/** @defgroup EFM32HG_defines EFM32 Happy Gecko Defines
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@brief Defined Constants and Types for the Energy Micro EFM32 Happy Gecko
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series
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@version 1.0.0
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@date 28 January 2018
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LGPL License Terms @ref lgpl_license
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*/
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29
include/libopencm3/efm32/hg/irq.json
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29
include/libopencm3/efm32/hg/irq.json
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@ -0,0 +1,29 @@
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{
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"_source": "The names and sequence are taken from EFM32HG-RM.pdf table 4.1.",
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"irqs": [
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"dma",
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"gpio_even",
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"timer0",
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"acmp0",
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"adc0",
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"i2c0",
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"gpio_odd",
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"timer1",
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"usart1_rx",
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"usart1_tx",
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"leuart0",
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"pcnt0",
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"rtc",
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"cmu",
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"vcmp",
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"msc",
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"aes",
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"usart0_rx",
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"usart0_tx",
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"usb",
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"timer2"
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],
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"partname_humanreadable": "EFM32 Happy Gecko series",
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"partname_doxygen": "EFM32HG",
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"includeguard": "LIBOPENCM3_EFM32HG_NVIC_H"
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}
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@ -287,6 +287,9 @@ efm32zg???f8 efm32zg ROM=8K RAM=2K
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efm32zg???f16 efm32zg ROM=16K RAM=4K
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efm32zg???f16 efm32zg ROM=16K RAM=4K
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efm32zg???f32 efm32zg ROM=32K RAM=4K
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efm32zg???f32 efm32zg ROM=32K RAM=4K
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# Happy Gecko
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efm32hg???f64 efm32hg ROM=64K RAM=8K
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# Tiny Gecko
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# Tiny Gecko
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efm32tg108f4 efm32tg ROM=4K RAM=1K
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efm32tg108f4 efm32tg ROM=4K RAM=1K
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efm32tg110f4 efm32tg ROM=4K RAM=2K
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efm32tg110f4 efm32tg ROM=4K RAM=2K
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@ -448,6 +451,7 @@ lpc43xx END CPU=cortex-m4 FPU=hard-fpv4-sp-d16
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# the efm32 Gecko families
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# the efm32 Gecko families
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efm32zg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m0plus FPU=soft
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efm32zg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m0plus FPU=soft
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efm32hg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m0plus FPU=soft
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efm32tg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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efm32tg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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efm32g END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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efm32g END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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efm32lg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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efm32lg END ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000 CPU=cortex-m3 FPU=soft
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@ -25,6 +25,8 @@
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# include "../efm32/lg/vector_nvic.c"
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# include "../efm32/lg/vector_nvic.c"
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#elif defined(EFM32GG)
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#elif defined(EFM32GG)
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# include "../efm32/gg/vector_nvic.c"
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# include "../efm32/gg/vector_nvic.c"
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#elif defined(EFM32HG)
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# include "../efm32/hg/vector_nvic.c"
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#elif defined(LPC13XX)
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#elif defined(LPC13XX)
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# include "../lpc13xx/vector_nvic.c"
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# include "../lpc13xx/vector_nvic.c"
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47
lib/efm32/hg/Makefile
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47
lib/efm32/hg/Makefile
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@ -0,0 +1,47 @@
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##
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## This file is part of the libopencm3 project.
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##
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## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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## Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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## Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
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## Copyright (C) 2018 Seb Holzapfel <schnommus@gmail.com>
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##
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## This library is free software: you can redistribute it and/or modify
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## it under the terms of the GNU Lesser General Public License as published by
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## the Free Software Foundation, either version 3 of the License, or
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## (at your option) any later version.
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##
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## This library is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU Lesser General Public License for more details.
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##
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## You should have received a copy of the GNU Lesser General Public License
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## along with this library. If not, see <http://www.gnu.org/licenses/>.
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##
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LIBNAME = libopencm3_efm32hg
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SRCLIBDIR ?= ../..
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FAMILY = EFM32HG
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PREFIX ?= arm-none-eabi
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#PREFIX ?= arm-elf
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CC = $(PREFIX)-gcc
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AR = $(PREFIX)-ar
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TGT_CFLAGS = -Os \
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-Wall -Wextra -Wimplicit-function-declaration \
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-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
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-Wundef -Wshadow \
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-I../../../include -fno-common \
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-mcpu=cortex-m0plus $(FP_FLAGS) -mthumb -Wstrict-prototypes \
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-ffunction-sections -fdata-sections -MD -D$(FAMILY)
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TGT_CFLAGS += $(DEBUG_FLAGS)
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TGT_CFLAGS += $(STANDARD_FLAGS)
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ARFLAGS = rcs
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OBJS =
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VPATH += ../../usb:../:../../cm3:
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include ../../Makefile.include
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105
lib/efm32/hg/libopencm3_efm32hg.ld
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105
lib/efm32/hg/libopencm3_efm32hg.ld
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@ -0,0 +1,105 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* Generic linker script for EFM32 targets using libopencm3. */
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/* Memory regions must be defined in the ld script which includes this one. */
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/* Enforce emmition of the vector table. */
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EXTERN (vector_table)
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/* Define the entry point of the output file. */
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ENTRY(reset_handler)
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/* Define sections. */
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SECTIONS
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{
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.text : {
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*(.vectors) /* Vector table */
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*(.text*) /* Program code */
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. = ALIGN(4);
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*(.rodata*) /* Read-only data */
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. = ALIGN(4);
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} >rom
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/* C++ Static constructors/destructors, also used for __attribute__
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* ((constructor)) and the likes */
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.preinit_array : {
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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} >rom
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.init_array : {
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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} >rom
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.fini_array : {
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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} >rom
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/*
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* Another section used by C++ stuff, appears when using newlib with
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* 64bit (long long) printf support
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*/
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.ARM.extab : {
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*(.ARM.extab*)
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} >rom
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.ARM.exidx : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >rom
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. = ALIGN(4);
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_etext = .;
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.data : {
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_data = .;
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*(.data*) /* Read-write initialized data */
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. = ALIGN(4);
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_edata = .;
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} >ram AT >rom
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_data_loadaddr = LOADADDR(.data);
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.bss : {
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*(.bss*) /* Read-write zero initialized data */
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >ram
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/*
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* The .eh_frame section appears to be used for C++ exception handling.
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* You may need to fix this if you're using C++.
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*/
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/DISCARD/ : { *(.eh_frame) }
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. = ALIGN(4);
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end = .;
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}
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PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
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