jackcartersmith/blackmagic
1
0
Fork 0
Code Issues Pull Requests Releases Activity

[stm32] Use correct offsets for UniqueID bits

Browse Source 
STM32L1 has a different set of offsets, not just a different base
address, so we can't have common registers definitions.  Also, out of
F0,F1,F2,F3,F4,L1, only the F1 has the odd note about 2x16bit registers
and 2x32bit registers with one 16bit register marked as "This field
value is also reserved for a future feature."  Therefore, replace the
awkward reading out as multiple words and just copy them in.

F0,F2,F3,F4 were missing definitions altogether.

This does _not_ attempt to address the problem of the mismatched base
addresses for Medium+ and High Density L1 parts.
This commit is contained in:
Karl Palsson 2013-09-23 13:47:01 +00:00
parent 8c8592e2b6
commit a99f4fb620
8 changed files with 43 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
include/libopencm3/stm32/desig.h
View File

@ -28,14 +28,6 @@
/* Flash size register */ /* Flash size register */
#define DESIG_FLASH_SIZE MMIO16(DESIG_FLASH_SIZE_BASE + 0x00) #define DESIG_FLASH_SIZE MMIO16(DESIG_FLASH_SIZE_BASE + 0x00)
/* Unique ID register (96 bits) */
/* Note: ST says these may be accessed in any width if you choose */
#define DESIG_UID_15_0 MMIO16(DESIG_UNIQUE_ID_BASE + 0x00)
/* Listed as "This field value is also reserved for a future feature" WTH?! */
#define DESIG_UID_31_16 MMIO16(DESIG_UNIQUE_ID_BASE + 0x02)
#define DESIG_UID_63_32 MMIO32(DESIG_UNIQUE_ID_BASE + 0x04)
#define DESIG_UID_95_64 MMIO32(DESIG_UNIQUE_ID_BASE + 0x08)
BEGIN_DECLS BEGIN_DECLS
/** /**

11
include/libopencm3/stm32/f0/memorymap.h
View File

@ -92,10 +92,11 @@
#define GPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400) #define GPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)
/* Device Electronic Signature */ /* Device Electronic Signature */
/* ??? #define DESIG_FLASH_SIZE_BASE (0x1FFFF7CC)
#define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0) #define DESIG_UNIQUE_ID_BASE (0x1FFFF7AC)
#define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7e8) #define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
*/ #define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
#endif #endif

9
include/libopencm3/stm32/f1/memorymap.h
View File

@ -113,7 +113,12 @@
#define FSMC_BASE (PERIPH_BASE + 0x60000000) #define FSMC_BASE (PERIPH_BASE + 0x60000000)
/* Device Electronic Signature */ /* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0) #define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0)
#define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7e8) #define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7e8)
/* Ignore the "reserved for future use" half of the first word */
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
#endif #endif

8
include/libopencm3/stm32/f2/memorymap.h
View File

@ -130,4 +130,12 @@
/* PPIB */ /* PPIB */
#define DBGMCU_BASE (PPBI_BASE + 0x00042000) #define DBGMCU_BASE (PPBI_BASE + 0x00042000)
/* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (0x1FFF7A22)
#define DESIG_UNIQUE_ID_BASE (0x1FFF7A10)
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
#endif #endif

7
include/libopencm3/stm32/f3/memorymap.h
View File

@ -114,4 +114,11 @@
/* PPIB */ /* PPIB */
#define DBGMCU_BASE (PPBI_BASE + 0x00042000) #define DBGMCU_BASE (PPBI_BASE + 0x00042000)
/* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (0x1FFFF7CC)
#define DESIG_UNIQUE_ID_BASE (0x1FFFF7AC)
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
#endif #endif

7
include/libopencm3/stm32/f4/memorymap.h
View File

@ -132,4 +132,11 @@
/* PPIB */ /* PPIB */
#define DBGMCU_BASE (PPBI_BASE + 0x00042000) #define DBGMCU_BASE (PPBI_BASE + 0x00042000)
/* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (0x1FFF7A22)
#define DESIG_UNIQUE_ID_BASE (0x1FFF7A10)
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
#endif #endif

7
include/libopencm3/stm32/l1/memorymap.h
View File

@ -105,8 +105,11 @@
#define AES_BASE (PERIPH_BASE + 0x10000000) #define AES_BASE (PERIPH_BASE + 0x10000000)
/* Device Electronic Signature */ /* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x8004C) #define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x8004C)
#define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x80050) #define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x80050)
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 0x14)
/* Make the map names match those for other families to allow commonality */ /* Make the map names match those for other families to allow commonality */
#define SPI1_I2S_BASE SPI1_BASE #define SPI1_I2S_BASE SPI1_BASE

12
lib/stm32/desig.c
View File

@ -26,15 +26,9 @@ uint16_t desig_get_flash_size(void)
void desig_get_unique_id(uint32_t result[]) void desig_get_unique_id(uint32_t result[])
{ {
/* Could also just return a pointer to the start? read it as they wish? result[0] = DESIG_UNIQUE_ID2;
*/ result[1] = DESIG_UNIQUE_ID1;
uint16_t bits15_0 = DESIG_UID_15_0; result[2] = DESIG_UNIQUE_ID0;
uint32_t bits31_16 = DESIG_UID_31_16;
uint32_t bits63_32 = DESIG_UID_63_32;
uint32_t bits95_64 = DESIG_UID_95_64;
result[0] = bits95_64;
result[1] = bits63_32;
result[2] = bits31_16 << 16 | bits15_0;
} }
void desig_get_unique_id_as_string(char *string, void desig_get_unique_id_as_string(char *string,