From af3389652cce7bd911a538ece4fd1fabf34e6048 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Tue, 15 Jul 2014 13:28:02 +0000 Subject: [PATCH] stm32: timers: Fix edge polarity setup The CCxP/CCxNP bits are actually separated by a reserved bit, so the correct mask is 0xa, (0b1010) not 0x6 (0b0110) Reported by PyroDevil on the mailinglist --- lib/stm32/common/timer_common_f234.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/stm32/common/timer_common_f234.c b/lib/stm32/common/timer_common_f234.c index e4e35745..1506408c 100644 --- a/lib/stm32/common/timer_common_f234.c +++ b/lib/stm32/common/timer_common_f234.c @@ -42,12 +42,12 @@ void timer_ic_set_polarity(uint32_t timer_peripheral, enum tim_ic_id ic, /* Clear CCxP and CCxNP to zero. For both edge trigger both fields are * set. Case 10 is invalid. */ - TIM_CCER(timer_peripheral) &= ~(0x6 << (ic * 4)); + TIM_CCER(timer_peripheral) &= ~(0xa << (ic * 4)); switch (pol) { case TIM_IC_RISING: /* 00 */ break; case TIM_IC_BOTH: /* 11 */ - TIM_CCER(timer_peripheral) |= (0x6 << (ic * 4)); + TIM_CCER(timer_peripheral) |= (0xa << (ic * 4)); break; case TIM_IC_FALLING: /* 01 */ TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));