Moving stm32 f2/f4 flash code into the common area.
This commit is contained in:
Fergus Noble
Piotr Esden-Tempski
parent
4d15da995e
commit
b039504494
155
include/libopencm3/stm32/common/flash_common_f24.h
Normal file
155
include/libopencm3/stm32/common/flash_common_f24.h
Normal file
@ -0,0 +1,155 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* PM0081 Programming manual: STM32F40xxx and STM32F41xxx Flash programming
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* September 2011, Doc ID 018520 Rev 1
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* http://www.st.com/st-web-ui/static/active/en/resource/technical/document/programming_manual/DM00023388.pdf
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*/
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#ifdef LIBOPENCM3_FLASH_H
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#ifndef LIBOPENCM3_FLASH_COMMON_F24_H
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#define LIBOPENCM3_FLASH_COMMON_F24_H
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#include <libopencm3/cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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#define FLASH_ACR_LATENCY_3WS 0x03
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#define FLASH_ACR_LATENCY_4WS 0x04
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#define FLASH_ACR_LATENCY_5WS 0x05
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#define FLASH_ACR_LATENCY_6WS 0x06
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#define FLASH_ACR_LATENCY_7WS 0x07
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
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#define FLASH_CR_SECTOR_2 (0x02 << 3)
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#define FLASH_CR_SECTOR_3 (0x03 << 3)
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#define FLASH_CR_SECTOR_4 (0x04 << 3)
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#define FLASH_CR_SECTOR_5 (0x05 << 3)
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#define FLASH_CR_SECTOR_6 (0x06 << 3)
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#define FLASH_CR_SECTOR_7 (0x07 << 3)
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#define FLASH_CR_SECTOR_8 (0x08 << 3)
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#define FLASH_CR_SECTOR_9 (0x09 << 3)
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#define FLASH_CR_SECTOR_10 (0x0a << 3)
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#define FLASH_CR_SECTOR_11 (0x0b << 3)
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#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
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#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
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#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
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#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
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/* --- FLASH_OPTCR values -------------------------------------------------- */
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/* FLASH_OPTCR[27:16]: nWRP */
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/* FLASH_OBR[15:8]: RDP */
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#define FLASH_OPTCR_NRST_STDBY (1 << 7)
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#define FLASH_OPTCR_NRST_STOP (1 << 6)
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#define FLASH_OPTCR_WDG_SW (1 << 5)
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#define FLASH_OPTCR_OPTSTRT (1 << 1)
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#define FLASH_OPTCR_OPTLOCK (1 << 0)
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#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
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#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_KEYR_KEY1 ((u32)0x45670123)
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#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
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#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_set_ws(u32 ws);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_pgperr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_erase_all_sectors(u32 program_size);
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void flash_erase_sector(u32 sector, u32 program_size);
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void flash_program_double_word(u32 address, u64 data);
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void flash_program_word(u32 address, u32 data);
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void flash_program_half_word(u32 address, u16 data);
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void flash_program_byte(u32 address, u8 data);
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void flash_wait_for_last_operation(void);
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void flash_program_option_bytes(u32 data);
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END_DECLS
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#endif
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#else
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#warning "flash_common_f24.h should not be included explicitly, only via flash.h"
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#endif
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@ -1,9 +1,6 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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@ -18,135 +15,11 @@
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* PM0059 Programming manual: STM32F205xx, STM32F207xx, STM32F215xx, STM32F217xx
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* Flash programming
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* May 2011, Doc ID 15687 Rev 4
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* http://www.st.com/st-web-ui/static/active/en/resource/technical/document/programming_manual/CD00233952.pdf
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*/
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#ifndef LIBOPENCM3_FLASH_H
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#define LIBOPENCM3_FLASH_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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#define FLASH_ACR_LATENCY_3WS 0x03
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#define FLASH_ACR_LATENCY_4WS 0x04
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#define FLASH_ACR_LATENCY_5WS 0x05
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#define FLASH_ACR_LATENCY_6WS 0x06
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#define FLASH_ACR_LATENCY_7WS 0x07
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
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#define FLASH_CR_SECTOR_2 (0x02 << 3)
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#define FLASH_CR_SECTOR_3 (0x03 << 3)
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#define FLASH_CR_SECTOR_4 (0x04 << 3)
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#define FLASH_CR_SECTOR_5 (0x05 << 3)
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#define FLASH_CR_SECTOR_6 (0x06 << 3)
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#define FLASH_CR_SECTOR_7 (0x07 << 3)
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#define FLASH_CR_SECTOR_8 (0x08 << 3)
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#define FLASH_CR_SECTOR_9 (0x09 << 3)
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#define FLASH_CR_SECTOR_10 (0x0a << 3)
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#define FLASH_CR_SECTOR_11 (0x0b << 3)
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#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
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#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
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#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
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#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
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/* --- FLASH_OPTCR values -------------------------------------------------- */
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/* FLASH_OPTCR[27:16]: nWRP */
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/* FLASH_OBR[15:8]: RDP */
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#define FLASH_OPTCR_NRST_STDBY (1 << 7)
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#define FLASH_OPTCR_NRST_STOP (1 << 6)
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#define FLASH_OPTCR_WDG_SW (1 << 5)
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#define FLASH_OPTCR_OPTSTRT (1 << 1)
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#define FLASH_OPTCR_OPTLOCK (1 << 0)
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#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
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#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_KEYR_KEY1 ((u32)0x45670123)
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#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
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#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_set_ws(u32 ws);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_pgperr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_erase_all_sectors(u32 program_size);
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void flash_erase_sector(u32 sector, u32 program_size);
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void flash_program_double_word(u32 address, u64 data, u32 program_size);
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void flash_program_word(u32 address, u32 data, u32 program_size);
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void flash_program_half_word(u32 address, u16 data, u32 program_size);
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void flash_program_byte(u32 address, u8 data, u32 program_size);
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void flash_wait_for_last_operation(void);
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void flash_program_option_bytes(u32 data);
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END_DECLS
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#include <libopencm3/stm32/common/flash_common_f24.h>
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#endif
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@ -1,9 +1,6 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
@ -18,134 +15,11 @@
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
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*/
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/*
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* For details see:
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* PM0081 Programming manual: STM32F40xxx and STM32F41xxx Flash programming
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* September 2011, Doc ID 018520 Rev 1
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* http://www.st.com/st-web-ui/static/active/en/resource/technical/document/programming_manual/DM00023388.pdf
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*/
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#ifndef LIBOPENCM3_FLASH_H
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#define LIBOPENCM3_FLASH_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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#define FLASH_ACR_LATENCY_3WS 0x03
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#define FLASH_ACR_LATENCY_4WS 0x04
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#define FLASH_ACR_LATENCY_5WS 0x05
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#define FLASH_ACR_LATENCY_6WS 0x06
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#define FLASH_ACR_LATENCY_7WS 0x07
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
|
||||
#define FLASH_CR_SECTOR_2 (0x02 << 3)
|
||||
#define FLASH_CR_SECTOR_3 (0x03 << 3)
|
||||
#define FLASH_CR_SECTOR_4 (0x04 << 3)
|
||||
#define FLASH_CR_SECTOR_5 (0x05 << 3)
|
||||
#define FLASH_CR_SECTOR_6 (0x06 << 3)
|
||||
#define FLASH_CR_SECTOR_7 (0x07 << 3)
|
||||
#define FLASH_CR_SECTOR_8 (0x08 << 3)
|
||||
#define FLASH_CR_SECTOR_9 (0x09 << 3)
|
||||
#define FLASH_CR_SECTOR_10 (0x0a << 3)
|
||||
#define FLASH_CR_SECTOR_11 (0x0b << 3)
|
||||
#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
|
||||
#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
|
||||
#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
|
||||
#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
|
||||
|
||||
/* --- FLASH_OPTCR values -------------------------------------------------- */
|
||||
|
||||
/* FLASH_OPTCR[27:16]: nWRP */
|
||||
/* FLASH_OBR[15:8]: RDP */
|
||||
#define FLASH_OPTCR_NRST_STDBY (1 << 7)
|
||||
#define FLASH_OPTCR_NRST_STOP (1 << 6)
|
||||
#define FLASH_OPTCR_WDG_SW (1 << 5)
|
||||
#define FLASH_OPTCR_OPTSTRT (1 << 1)
|
||||
#define FLASH_OPTCR_OPTLOCK (1 << 0)
|
||||
#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
|
||||
#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
|
||||
#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
|
||||
#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
|
||||
|
||||
/* --- FLASH Keys -----------------------------------------------------------*/
|
||||
|
||||
#define FLASH_KEYR_KEY1 ((u32)0x45670123)
|
||||
#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
|
||||
#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
|
||||
#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
|
||||
|
||||
/* --- Function prototypes ------------------------------------------------- */
|
||||
|
||||
BEGIN_DECLS
|
||||
|
||||
void flash_dcache_enable(void);
|
||||
void flash_dcache_disable(void);
|
||||
void flash_icache_enable(void);
|
||||
void flash_icache_disable(void);
|
||||
void flash_prefetch_enable(void);
|
||||
void flash_prefetch_disable(void);
|
||||
void flash_dcache_reset(void);
|
||||
void flash_icache_reset(void);
|
||||
void flash_set_ws(u32 ws);
|
||||
void flash_unlock(void);
|
||||
void flash_lock(void);
|
||||
void flash_clear_pgserr_flag(void);
|
||||
void flash_clear_pgperr_flag(void);
|
||||
void flash_clear_pgaerr_flag(void);
|
||||
void flash_clear_eop_flag(void);
|
||||
void flash_clear_wrperr_flag(void);
|
||||
void flash_clear_bsy_flag(void);
|
||||
void flash_clear_status_flags(void);
|
||||
void flash_unlock_option_bytes(void);
|
||||
void flash_lock_option_bytes(void);
|
||||
void flash_erase_all_sectors(u32 program_size);
|
||||
void flash_erase_sector(u32 sector, u32 program_size);
|
||||
void flash_program_double_word(u32 address, u64 data);
|
||||
void flash_program_word(u32 address, u32 data);
|
||||
void flash_program_half_word(u32 address, u16 data);
|
||||
void flash_program_byte(u32 address, u8 data);
|
||||
void flash_wait_for_last_operation(void);
|
||||
void flash_program_option_bytes(u32 data);
|
||||
|
||||
END_DECLS
|
||||
#include <libopencm3/stm32/common/flash_common_f24.h>
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
31
include/libopencm3/stm32/flash.h
Normal file
31
include/libopencm3/stm32/flash.h
Normal file
@ -0,0 +1,31 @@
|
||||
/* This provides unification of code over STM32F subfamilies */
|
||||
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#if defined(STM32F1)
|
||||
# include <libopencm3/stm32/f1/flash.h>
|
||||
#elif defined(STM32F2)
|
||||
# include <libopencm3/stm32/f2/flash.h>
|
||||
#elif defined(STM32F4)
|
||||
# include <libopencm3/stm32/f4/flash.h>
|
||||
#elif defined(STM32L1)
|
||||
# include <libopencm3/stm32/l1/flash.h>
|
||||
#else
|
||||
# error "stm32 family not defined."
|
||||
#endif
|
||||
|
||||
@ -18,7 +18,7 @@
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <libopencm3/stm32/f4/flash.h>
|
||||
#include <libopencm3/stm32/flash.h>
|
||||
|
||||
static inline void flash_set_program_size(u32 psize)
|
||||
{
|
||||
@ -33,12 +33,13 @@ CFLAGS = -Os -g \
|
||||
# ARFLAGS = rcsv
|
||||
ARFLAGS = rcs
|
||||
|
||||
OBJS = gpio.o exti2.o flash.o rcc.o
|
||||
OBJS = gpio.o exti2.o rcc.o
|
||||
|
||||
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
|
||||
gpio_common_all.o gpio_common_f24.o i2c_common_all.o \
|
||||
iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \
|
||||
timer_common_all.o timer_common_f24.o usart_common_all.o
|
||||
timer_common_all.o timer_common_f24.o usart_common_all.o \
|
||||
flash_common_f24.o
|
||||
|
||||
VPATH += ../../usb:../:../../cm3:../common
|
||||
|
||||
|
||||
@ -1,257 +0,0 @@
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
|
||||
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <libopencm3/stm32/f2/flash.h>
|
||||
|
||||
static inline void flash_set_program_size(u32 psize)
|
||||
{
|
||||
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
|
||||
FLASH_CR |= psize;
|
||||
}
|
||||
|
||||
void flash_dcache_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCE;
|
||||
}
|
||||
|
||||
void flash_dcache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_DCE;
|
||||
}
|
||||
|
||||
void flash_icache_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICE;
|
||||
}
|
||||
|
||||
void flash_icache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_ICE;
|
||||
}
|
||||
|
||||
void flash_prefetch_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_PRFTEN;
|
||||
}
|
||||
|
||||
void flash_prefetch_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_PRFTEN;
|
||||
}
|
||||
|
||||
void flash_dcache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCRST;
|
||||
}
|
||||
|
||||
void flash_icache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICRST;
|
||||
}
|
||||
|
||||
void flash_set_ws(u32 ws)
|
||||
{
|
||||
u32 reg32;
|
||||
|
||||
reg32 = FLASH_ACR;
|
||||
reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
|
||||
reg32 |= ws;
|
||||
FLASH_ACR = reg32;
|
||||
}
|
||||
|
||||
void flash_unlock(void)
|
||||
{
|
||||
/* Clear the unlock state. */
|
||||
FLASH_CR |= FLASH_CR_LOCK;
|
||||
|
||||
/* Authorize the FPEC access. */
|
||||
FLASH_KEYR = FLASH_KEYR_KEY1;
|
||||
FLASH_KEYR = FLASH_KEYR_KEY2;
|
||||
}
|
||||
|
||||
void flash_lock(void)
|
||||
{
|
||||
FLASH_CR |= FLASH_CR_LOCK;
|
||||
}
|
||||
|
||||
void flash_clear_pgserr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGSERR;
|
||||
}
|
||||
|
||||
void flash_clear_pgperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGPERR;
|
||||
}
|
||||
|
||||
void flash_clear_pgaerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGAERR;
|
||||
}
|
||||
|
||||
void flash_clear_eop_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_EOP;
|
||||
}
|
||||
|
||||
void flash_clear_wrperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_WRPERR;
|
||||
}
|
||||
|
||||
void flash_clear_bsy_flag(void)
|
||||
{
|
||||
FLASH_SR &= ~FLASH_SR_BSY;
|
||||
}
|
||||
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
flash_clear_pgserr_flag();
|
||||
flash_clear_pgperr_flag();
|
||||
flash_clear_pgaerr_flag();
|
||||
flash_clear_eop_flag();
|
||||
flash_clear_wrperr_flag();
|
||||
flash_clear_bsy_flag();
|
||||
}
|
||||
|
||||
void flash_unlock_option_bytes(void)
|
||||
{
|
||||
/* Clear the unlock state. */
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
|
||||
/* Unlock the option bytes. */
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY1;
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY2;
|
||||
}
|
||||
|
||||
void flash_lock_option_bytes(void)
|
||||
{
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
}
|
||||
|
||||
void flash_wait_for_last_operation(void)
|
||||
{
|
||||
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY)
|
||||
;
|
||||
}
|
||||
|
||||
void flash_program_double_word(u32 address, u64 data, u32 program_size)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO64(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_word(u32 address, u32 data, u32 program_size)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO32(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_half_word(u32 address, u16 data, u32 program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO16(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_program_byte(u32 address, u8 data, u32 program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO8(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_erase_sector(u32 sector, u32 program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3);
|
||||
FLASH_CR |= sector;
|
||||
FLASH_CR |= FLASH_CR_STRT;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_SER;
|
||||
FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3);
|
||||
}
|
||||
|
||||
void flash_erase_all_sectors(u32 program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR |= FLASH_CR_MER; /* Enable mass erase. */
|
||||
FLASH_CR |= FLASH_CR_STRT; /* Trigger the erase. */
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */
|
||||
}
|
||||
|
||||
void flash_program_option_bytes(u32 data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
if (FLASH_OPTCR & FLASH_OPTCR_OPTLOCK)
|
||||
flash_unlock_option_bytes();
|
||||
|
||||
FLASH_OPTCR = data & ~0x3;
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte programming. */
|
||||
flash_wait_for_last_operation();
|
||||
}
|
||||
@ -34,13 +34,13 @@ CFLAGS = -Os -g \
|
||||
# ARFLAGS = rcsv
|
||||
ARFLAGS = rcs
|
||||
|
||||
OBJS = adc.o can.o gpio.o exti2.o flash.o pwr.o rcc.o rtc.o
|
||||
OBJS = adc.o can.o gpio.o exti2.o pwr.o rcc.o rtc.o
|
||||
|
||||
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
|
||||
gpio_common_all.o gpio_common_f24.o i2c_common_all.o \
|
||||
iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \
|
||||
spi_common_all.o timer_common_all.o timer_common_f24.o \
|
||||
usart_common_all.o
|
||||
usart_common_all.o flash_common_f24.o
|
||||
|
||||
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \
|
||||
usb_f107.o usb_f207.o
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user