diff --git a/include/libopencm3/stm32/common/adc_common_v2.h b/include/libopencm3/stm32/common/adc_common_v2.h
index 41930b2e..baa2fb38 100644
--- a/include/libopencm3/stm32/common/adc_common_v2.h
+++ b/include/libopencm3/stm32/common/adc_common_v2.h
@@ -190,6 +190,9 @@ void adc_set_left_aligned(uint32_t adc);
 void adc_set_right_aligned(uint32_t adc);
 void adc_enable_dma(uint32_t adc);
 void adc_disable_dma(uint32_t adc);
+bool adc_eoc(uint32_t adc);
+bool adc_eos(uint32_t adc);
+uint32_t adc_read_regular(uint32_t adc);
 
 END_DECLS
 
diff --git a/include/libopencm3/stm32/f0/adc.h b/include/libopencm3/stm32/f0/adc.h
index 123376de..f2860099 100644
--- a/include/libopencm3/stm32/f0/adc.h
+++ b/include/libopencm3/stm32/f0/adc.h
@@ -168,8 +168,6 @@ void adc_disable_external_trigger_regular(uint32_t adc);
 
 /* Conversion API */
 void adc_start_conversion_regular(uint32_t adc);
-bool adc_eoc(uint32_t adc);
-uint32_t adc_read_regular(uint32_t adc);
 
 /* Interrupt configuration */
 void adc_enable_watchdog_interrupt(uint32_t adc);
diff --git a/include/libopencm3/stm32/f3/adc.h b/include/libopencm3/stm32/f3/adc.h
index cc9797ab..db10b765 100644
--- a/include/libopencm3/stm32/f3/adc.h
+++ b/include/libopencm3/stm32/f3/adc.h
@@ -609,11 +609,8 @@ void adc_set_watchdog_high_threshold(uint32_t adc, uint8_t threshold);
 void adc_set_watchdog_low_threshold(uint32_t adc, uint8_t threshold);
 void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[]);
 void adc_set_injected_sequence(uint32_t adc, uint8_t length, uint8_t channel[]);
-bool adc_eoc(uint32_t adc);
 bool adc_eoc_injected(uint32_t adc);
-bool adc_eos(uint32_t adc);
 bool adc_eos_injected(uint32_t adc);
-uint32_t adc_read_regular(uint32_t adc);
 uint32_t adc_read_injected(uint32_t adc, uint8_t reg);
 void adc_set_injected_offset(uint32_t adc, uint8_t reg, uint32_t offset);
 
diff --git a/lib/stm32/common/adc_common_v2.c b/lib/stm32/common/adc_common_v2.c
index 3c84e0a4..aef89960 100644
--- a/lib/stm32/common/adc_common_v2.c
+++ b/lib/stm32/common/adc_common_v2.c
@@ -35,6 +35,35 @@ LGPL License Terms @ref lgpl_license
 
 #include <libopencm3/stm32/adc.h>
 
+
+/** @brief ADC Read the End-of-Conversion Flag
+ *
+ * This flag is set by hardware at the end of each regular conversion of a
+ * channel when a new data is available in the ADCx_DR register.
+ *
+ * @param[in] adc Unsigned int32. ADC block register address base
+ * @ref adc_reg_base
+ * @returns bool. End of conversion flag.
+ */
+bool adc_eoc(uint32_t adc)
+{
+	return ADC_ISR(adc) & ADC_ISR_EOC;
+}
+
+/** @brief ADC Read the End-of-Sequence Flag for Regular Conversions
+ *
+ * This flag is set after all channels of an regular group have been
+ * converted.
+ *
+ * @param[in] adc Unsigned int32. ADC block register address base
+ * @ref adc_reg_base
+ * @returns bool. End of conversion flag.
+ */
+bool adc_eos(uint32_t adc)
+{
+	return ADC_ISR(adc) & ADC_ISR_EOS;
+}
+
 /**
  * Turn on the ADC (async)
  * @sa adc_wait_power_on
@@ -188,6 +217,20 @@ void adc_disable_dma(uint32_t adc)
 }
 
 
+/** @brief ADC Read from the Regular Conversion Result Register
+ *
+ * The result read back is 12 bits, right or left aligned within the first
+ * 16 bits.
+ *
+ * @param[in] adc Unsigned int32. ADC block register address base
+ * @ref adc_reg_base
+ * @returns Unsigned int32 conversion result.
+ */
+uint32_t adc_read_regular(uint32_t adc)
+{
+	return ADC_DR(adc);
+}
+
 /**
  * Enable the temperature sensor (only)
  * The channel this is available on is unfortunately not
diff --git a/lib/stm32/f0/adc.c b/lib/stm32/f0/adc.c
index 7b247a04..28f06a7b 100644
--- a/lib/stm32/f0/adc.c
+++ b/lib/stm32/f0/adc.c
@@ -172,37 +172,6 @@ void adc_start_conversion_regular(uint32_t adc)
 	while (ADC_CR(adc) & ADC_CR_ADSTART);
 }
 
-/*---------------------------------------------------------------------------*/
-/** @brief ADC Read the End-of-Conversion Flag
- *
- * This flag is set after all channels of a regular or injected group have been
- * converted.
- *
- * @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
- * @returns bool. End of conversion flag.
- */
-
-bool adc_eoc(uint32_t adc)
-{
-	return ((ADC_ISR(adc) & ADC_ISR_EOC) != 0);
-}
-
-/*---------------------------------------------------------------------------*/
-/** @brief ADC Read from the Regular Conversion Result Register
- *
- * The result read back is 12 bits, right or left aligned within the first
- * 16 bits. For ADC1 only, the higher 16 bits will hold the result from ADC2 if
- * an appropriate dual mode has been set @see adc_set_dual_mode.
- *
- * @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
- * @returns Unsigned int32 conversion result.
- */
-
-uint32_t adc_read_regular(uint32_t adc)
-{
-	return ADC_DR(adc);
-}
-
 /**@}*/
 
 /*---------------------------------------------------------------------------*/
diff --git a/lib/stm32/f3/adc.c b/lib/stm32/f3/adc.c
index 9568ad09..327ac4cd 100644
--- a/lib/stm32/f3/adc.c
+++ b/lib/stm32/f3/adc.c
@@ -668,22 +668,6 @@ void adc_set_injected_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
 	ADC_JSQR(adc) = reg32;
 }
 
-/*---------------------------------------------------------------------------*/
-/** @brief ADC Read the End-of-Conversion Flag
- *
- * This flag is set by hardware at the end of each regular conversion of a
- * channel when a new data is available in the ADCx_DR register.
- *
- * @param[in] adc Unsigned int32. ADC block register address base
- * @ref adc_reg_base
- * @returns bool. End of conversion flag.
- */
-
-bool adc_eoc(uint32_t adc)
-{
-	return ADC_ISR(adc) & ADC_ISR_EOC;
-}
-
 /*---------------------------------------------------------------------------*/
 /** @brief ADC Read the End-of-Conversion Flag for Injected Conversion
  *
@@ -700,21 +684,6 @@ bool adc_eoc_injected(uint32_t adc)
 	return ADC_ISR(adc) & ADC_ISR_JEOC;
 }
 
-/*---------------------------------------------------------------------------*/
-/** @brief ADC Read the End-of-Sequence Flag for Regular Conversions
- *
- * This flag is set after all channels of an regular group have been
- * converted.
- *
- * @param[in] adc Unsigned int32. ADC block register address base
- * @ref adc_reg_base
- * @returns bool. End of conversion flag.
- */
-bool adc_eos(uint32_t adc)
-{
-	return ADC_ISR(adc) & ADC_ISR_EOS;
-}
-
 /*---------------------------------------------------------------------------*/
 /** @brief ADC Read the End-of-Sequence Flag for Injected Conversions
  *
@@ -731,23 +700,6 @@ bool adc_eos_injected(uint32_t adc)
 }
 
 
-/*---------------------------------------------------------------------------*/
-/** @brief ADC Read from the Regular Conversion Result Register
- *
- * The result read back is 12 bits, right or left aligned within the first
- * 16 bits. For ADC1 only, the higher 16 bits will hold the result from ADC2 if
- * an appropriate dual mode has been set @see adc_set_dual_mode.
- *
- * @param[in] adc Unsigned int32. ADC block register address base
- * @ref adc_reg_base
- * @returns Unsigned int32 conversion result.
- */
-
-uint32_t adc_read_regular(uint32_t adc)
-{
-	return ADC_DR(adc);
-}
-
 /*---------------------------------------------------------------------------*/
 /** @brief ADC Read from an Injected Conversion Result Register
  *