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tests: gadget0: Update for namespace cleanups

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Fixes: 3a7cbec776bc9b9b53eefc26d5bf365466977e5a
This commit is contained in:
Karl Palsson 2016-01-05 18:00:00 +00:00
parent 609cfe7f28
commit b81588da74
4 changed files with 9 additions and 9 deletions
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2
tests/gadget-zero/main-stm32f072disco.c
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@ -46,7 +46,7 @@ int main(void)
{ {
rcc_clock_setup_in_hsi48_out_48mhz(); rcc_clock_setup_in_hsi48_out_48mhz();
crs_autotrim_usb_enable(); crs_autotrim_usb_enable();
rcc_set_usbclk_source(HSI48); rcc_set_usbclk_source(RCC_HSI48);
/* LED on for boot progress */ /* LED on for boot progress */
rcc_periph_clock_enable(RCC_GPIOC); rcc_periph_clock_enable(RCC_GPIOC);

2
tests/gadget-zero/main-stm32f4disco.c
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@ -35,7 +35,7 @@
int main(void) int main(void)
{ {
rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_168MHZ]); rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_periph_clock_enable(RCC_GPIOA); rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_OTGFS); rcc_periph_clock_enable(RCC_OTGFS);

10
tests/gadget-zero/main-stm32l053disco.c
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@ -50,9 +50,9 @@ int main(void)
gpio_set(GPIOA, GPIO5); gpio_set(GPIOA, GPIO5);
/* jump up to 16mhz, leave PLL setup for later. */ /* jump up to 16mhz, leave PLL setup for later. */
rcc_osc_on(HSI16); rcc_osc_on(RCC_HSI16);
rcc_wait_for_osc_ready(HSI16); rcc_wait_for_osc_ready(RCC_HSI16);
rcc_set_sysclk_source(HSI16); rcc_set_sysclk_source(RCC_HSI16);
/* HSI48 needs the vrefint turned on */ /* HSI48 needs the vrefint turned on */
rcc_periph_clock_enable(RCC_SYSCFG); rcc_periph_clock_enable(RCC_SYSCFG);
@ -63,8 +63,8 @@ int main(void)
crs_autotrim_usb_enable(); crs_autotrim_usb_enable();
rcc_set_hsi48_source_rc48(); rcc_set_hsi48_source_rc48();
rcc_osc_on(HSI48); rcc_osc_on(RCC_HSI48);
rcc_wait_for_osc_ready(HSI48); rcc_wait_for_osc_ready(RCC_HSI48);
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver, usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver,
"stm32l053disco"); "stm32l053disco");

4
tests/gadget-zero/main-stm32l1-generic.c
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@ -34,7 +34,7 @@
do { } while (0) do { } while (0)
#endif #endif
const clock_scale_t this_clock_config = { const struct rcc_clock_scale this_clock_config = {
/* 32MHz PLL from 8MHz HSE */ /* 32MHz PLL from 8MHz HSE */
.pll_source = RCC_CFGR_PLLSRC_HSE_CLK, .pll_source = RCC_CFGR_PLLSRC_HSE_CLK,
.pll_mul = RCC_CFGR_PLLMUL_MUL12, .pll_mul = RCC_CFGR_PLLMUL_MUL12,
@ -42,7 +42,7 @@ const clock_scale_t this_clock_config = {
.hpre = RCC_CFGR_HPRE_SYSCLK_NODIV, .hpre = RCC_CFGR_HPRE_SYSCLK_NODIV,
.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV, .ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
.ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV, .ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV,
.voltage_scale = RANGE1, .voltage_scale = PWR_SCALE1,
.flash_config = FLASH_ACR_LATENCY_1WS, .flash_config = FLASH_ACR_LATENCY_1WS,
.apb1_frequency = 32000000, .apb1_frequency = 32000000,
.apb2_frequency = 32000000, .apb2_frequency = 32000000,