Connectivity line USB driver now enumerating correctly.
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7faea389e8
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@ -297,6 +297,16 @@
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#define OTG_FS_DIEPINTX_EPDISD (1 << 1)
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#define OTG_FS_DIEPINTX_XFRC (1 << 0)
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/* OTG_FS Device IN Endpoint Interrupt Register (OTG_FS_DOEPINTx) */
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/* Bits 31:7 - Reserved */
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#define OTG_FS_DOEPINTX_B2BSTUP (1 << 6)
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/* Bit 5 - Reserved */
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#define OTG_FS_DOEPINTX_OTEPDIS (1 << 4)
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#define OTG_FS_DOEPINTX_STUP (1 << 3)
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/* Bit 2 - Reserved */
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#define OTG_FS_DOEPINTX_EPDISD (1 << 1)
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#define OTG_FS_DOEPINTX_XFRC (1 << 0)
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/* OTG_FS Device OUT Endpoint 0 Transfer Size Regsiter (OTG_FS_DOEPTSIZ0) */
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/* Bit 31 - Reserved */
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#define OTG_FS_DIEPSIZ0_STUPCNT_1 (0x1 << 29)
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@ -58,12 +58,13 @@ static void stm32f107_usbd_init(void)
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int i;
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/* TODO: Enable interrupts on Reset, Transfer, Suspend and Resume */
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OTG_FS_GINTSTS = OTG_FS_GINTSTS_MMIS;
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/* WARNING: Undocumented! Select internal PHY */
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OTG_FS_GUSBCFG |= OTG_FS_GUSBCFG_PHYSEL;
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/* Enable VBUS sensing in device mode and power down the phy */
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OTG_FS_GCCFG |= OTG_FS_GCCFG_VBUSBSEN | OTG_FS_GCCFG_PWRDWN;
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for(i = 0; i < 800000; i++) __asm__("nop");
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/* Wait for AHB idle */
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while(!(OTG_FS_GRSTCTL & OTG_FS_GRSTCTL_AHBIDL));
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@ -71,7 +72,6 @@ static void stm32f107_usbd_init(void)
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OTG_FS_GRSTCTL |= OTG_FS_GRSTCTL_CSRST;
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while(OTG_FS_GRSTCTL & OTG_FS_GRSTCTL_CSRST);
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for(i = 0; i < 800000; i++) __asm__("nop");
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/* Force peripheral only mode. */
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OTG_FS_GUSBCFG |= OTG_FS_GUSBCFG_FDMOD;
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@ -82,6 +82,9 @@ static void stm32f107_usbd_init(void)
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/* Restart the phy clock */
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OTG_FS_PCGCCTL = 0;
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OTG_FS_GRXFSIZ = 128;
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OTG_FS_GNPTXFSIZ = (128 << 16) | 128;
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/* Unmask interrupts for TX and RX */
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OTG_FS_GINTMSK &= OTG_FS_GINTMSK_RXFLVLM;
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@ -89,15 +92,7 @@ static void stm32f107_usbd_init(void)
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static void stm32f107_set_address(u8 addr)
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{
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/* There is something badly wrong gere! */
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/* TODO: Set device address and enable. */
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/* This I think is correct, but doesn't work at all... */
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//OTG_FS_DCFG = (OTG_FS_DCFG & ~OTG_FS_DCFG_DAD) | (addr << 4);
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/* This is obviously incorrect, but sometimes works... */
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OTG_FS_DCFG |= addr << 4;
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OTG_FS_DCFG = (OTG_FS_DCFG & ~OTG_FS_DCFG_DAD) | (addr << 4);
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}
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static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size,
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@ -171,9 +166,9 @@ static void stm32f107_ep_stall_set(u8 addr, u8 stall)
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{
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if(addr == 0) {
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if(stall)
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OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTL0_STALL;
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OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTL0_STALL;
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else
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OTG_FS_DOEPCTL(addr) &= ~OTG_FS_DOEPCTL0_STALL;
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OTG_FS_DIEPCTL(addr) &= ~OTG_FS_DIEPCTL0_STALL;
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}
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if(addr & 0x80) {
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@ -131,6 +131,12 @@ static int usb_standard_set_address(struct usb_setup_data *req, u8 **buf,
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_usbd_device.current_address = req->wValue;
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/* Special workaround for STM32F10[57] that require the address
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* to be set here. This is undocumented!
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*/
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if(_usbd_device.driver == &stm32f107_usb_driver)
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_usbd_device.driver->set_address(req->wValue);
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return 1;
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}
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