Added address legend to the interrupt vector. Made it easier to crosscheck for correctness.
This commit is contained in:
Piotr Esden-Tempski
parent
c6f30043fd
commit
bf4f8480a6
@ -108,87 +108,87 @@ void WEAK otg_fs_isr(void);
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__attribute__ ((section(".vectors")))
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void (*const vector_table[]) (void) = {
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(void *)&_stack,
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reset_handler,
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nmi_handler,
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hard_fault_handler,
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mem_manage_handler,
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bus_fault_handler,
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usage_fault_handler,
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0, 0, 0, 0, /* Reserved */
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sv_call_handler,
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debug_monitor_handler,
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0, /* Reserved */
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pend_sv_handler,
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sys_tick_handler,
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wwdg_isr,
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pvd_isr,
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tamper_isr,
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rtc_isr,
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flash_isr,
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rcc_isr,
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exti0_isr,
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exti1_isr,
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exti2_isr,
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exti3_isr,
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exti4_isr,
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dma1_channel1_isr,
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dma1_channel2_isr,
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dma1_channel3_isr,
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dma1_channel4_isr,
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dma1_channel5_isr,
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dma1_channel6_isr,
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dma1_channel7_isr,
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adc1_2_isr,
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usb_hp_can_tx_isr,
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usb_lp_can_rx0_isr,
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can_rx1_isr,
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can_sce_isr,
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exti9_5_isr,
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tim1_brk_isr,
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tim1_up_isr,
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tim1_trg_com_isr,
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tim1_cc_isr,
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tim2_isr,
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tim3_isr,
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tim4_isr,
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i2c1_ev_isr,
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i2c1_er_isr,
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i2c2_ev_isr,
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i2c2_er_isr,
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spi1_isr,
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spi2_isr,
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usart1_isr,
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usart2_isr,
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usart3_isr,
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exti15_10_isr,
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rtc_alarm_isr,
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usb_wakeup_isr,
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tim8_brk_isr,
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tim8_up_isr,
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tim8_trg_com_isr,
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tim8_cc_isr,
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adc3_isr,
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fsmc_isr,
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sdio_isr,
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tim5_isr,
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spi3_isr,
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uart4_isr,
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uart5_isr,
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tim6_isr,
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tim7_isr,
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dma2_channel1_isr,
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dma2_channel2_isr,
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dma2_channel3_isr,
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dma2_channel4_5_isr,
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dma2_channel5_isr,
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eth_isr,
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eth_wkup_isr,
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can2_tx_isr,
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can2_rx0_isr,
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can2_rx1_isr,
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can2_sce_isr,
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otg_fs_isr,
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(void*)&_stack, /* Addr: 0x0000_0000 */
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reset_handler, /* Addr: 0x0000_0004 */
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nmi_handler, /* Addr: 0x0000_0008 */
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hard_fault_handler, /* Addr: 0x0000_000C */
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mem_manage_handler, /* Addr: 0x0000_0010 */
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bus_fault_handler, /* Addr: 0x0000_0014 */
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usage_fault_handler, /* Addr: 0x0000_0018 */
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0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */
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sv_call_handler, /* Addr: 0x0000_002C */
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debug_monitor_handler, /* Addr: 0x0000_0030*/
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0, /* Reserved Addr: 0x0000_00034 */
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pend_sv_handler, /* Addr: 0x0000_0038 */
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sys_tick_handler, /* Addr: 0x0000_003C */
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wwdg_isr, /* Addr: 0x0000_0040 */
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pvd_isr, /* Addr: 0x0000_0044 */
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tamper_isr, /* Addr: 0x0000_0048 */
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rtc_isr, /* Addr: 0x0000_004C */
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flash_isr, /* Addr: 0x0000_0050 */
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rcc_isr, /* Addr: 0x0000_0054 */
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exti0_isr, /* Addr: 0x0000_0058 */
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exti1_isr, /* Addr: 0x0000_005C */
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exti2_isr, /* Addr: 0x0000_0060 */
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exti3_isr, /* Addr: 0x0000_0064 */
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exti4_isr, /* Addr: 0x0000_0068 */
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dma1_channel1_isr, /* Addr: 0x0000_006C */
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dma1_channel2_isr, /* Addr: 0x0000_0070 */
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dma1_channel3_isr, /* Addr: 0x0000_0074 */
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dma1_channel4_isr, /* Addr: 0x0000_0078 */
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dma1_channel5_isr, /* Addr: 0x0000_007C */
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dma1_channel6_isr, /* Addr: 0x0000_0080 */
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dma1_channel7_isr, /* Addr: 0x0000_0084 */
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adc1_2_isr, /* Addr: 0x0000_0088 */
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usb_hp_can_tx_isr, /* Addr: 0x0000_008C */
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usb_lp_can_rx0_isr, /* Addr: 0x0000_0090 */
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can_rx1_isr, /* Addr: 0x0000_0094 */
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can_sce_isr, /* Addr: 0x0000_0098 */
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exti9_5_isr, /* Addr: 0x0000_009C */
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tim1_brk_isr, /* Addr: 0x0000_00A0 */
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tim1_up_isr, /* Addr: 0x0000_00A4 */
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tim1_trg_com_isr, /* Addr: 0x0000_00A8 */
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tim1_cc_isr, /* Addr: 0x0000_00AC */
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tim2_isr, /* Addr: 0x0000_00B0 */
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tim3_isr, /* Addr: 0x0000_00B4 */
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tim4_isr, /* Addr: 0x0000_00B8 */
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i2c1_ev_isr, /* Addr: 0x0000_00BC */
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i2c1_er_isr, /* Addr: 0x0000_00C0 */
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i2c2_ev_isr, /* Addr: 0x0000_00C4 */
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i2c2_er_isr, /* Addr: 0x0000_00C8 */
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spi1_isr, /* Addr: 0x0000_00CC */
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spi2_isr, /* Addr: 0x0000_00D0 */
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usart1_isr, /* Addr: 0x0000_00D4 */
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usart2_isr, /* Addr: 0x0000_00D8 */
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usart3_isr, /* Addr: 0x0000_00DC */
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exti15_10_isr, /* Addr: 0x0000_00E0 */
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rtc_alarm_isr, /* Addr: 0x0000_00E4 */
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usb_wakeup_isr, /* Addr: 0x0000_00E8 */
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tim8_brk_isr, /* Addr: 0x0000_00EC */
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tim8_up_isr, /* Addr: 0x0000_00F0 */
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tim8_trg_com_isr, /* Addr: 0x0000_00F4 */
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tim8_cc_isr, /* Addr: 0x0000_00F8 */
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adc3_isr, /* Addr: 0x0000_00FC */
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fsmc_isr, /* Addr: 0x0000_0100 */
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sdio_isr, /* Addr: 0x0000_0104 */
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tim5_isr, /* Addr: 0x0000_0108 */
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spi3_isr, /* Addr: 0x0000_010C */
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uart4_isr, /* Addr: 0x0000_0110 */
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uart5_isr, /* Addr: 0x0000_0114 */
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tim6_isr, /* Addr: 0x0000_0118 */
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tim7_isr, /* Addr: 0x0000_011C */
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dma2_channel1_isr, /* Addr: 0x0000_0120 */
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dma2_channel2_isr, /* Addr: 0x0000_0124 */
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dma2_channel3_isr, /* Addr: 0x0000_0128 */
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dma2_channel4_5_isr, /* Addr: 0x0000_012C */
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dma2_channel5_isr, /* Addr: 0x0000_0130 */
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eth_isr, /* Addr: 0x0000_0134 */
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eth_wkup_isr, /* Addr: 0x0000_0138 */
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can2_tx_isr, /* Addr: 0x0000_013C */
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can2_rx0_isr, /* Addr: 0x0000_0140 */
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can2_rx1_isr, /* Addr: 0x0000_0144 */
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can2_sce_isr, /* Addr: 0x0000_0148 */
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otg_fs_isr, /* Addr: 0x0000_014C */
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};
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void reset_handler(void)
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