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[stm32] implement i2c_reset using rcc_periph_reset_pulse

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this also adds support for I2C3 in i2c_reset
This commit is contained in:
Felix Ruess 2014-06-11 14:47:51 +02:00 committed by Karl Palsson
parent 67b538a540
commit c01f9ee323
1 changed files with 16 additions and 9 deletions
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25
lib/stm32/common/i2c_common_all.c
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@ -5,7 +5,7 @@ Thomas Otto <tommi@viadmin.org>
@author @htmlonly &copy; @endhtmlonly 2012 @author @htmlonly &copy; @endhtmlonly 2012
Ken Sarkies <ksarkies@internode.on.net> Ken Sarkies <ksarkies@internode.on.net>
Devices can have up to two I2C peripherals. The peripherals support SMBus and Devices can have up to three I2C peripherals. The peripherals support SMBus and
PMBus variants. PMBus variants.
A peripheral begins after reset in Slave mode. To become a Master a start A peripheral begins after reset in Slave mode. To become a Master a start
@ -52,14 +52,21 @@ the reset condition. The reset is effected via the RCC peripheral reset system.
void i2c_reset(uint32_t i2c) void i2c_reset(uint32_t i2c)
{ {
switch (i2c) { switch (i2c) {
case I2C1: case I2C1:
rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST); rcc_periph_reset_pulse(RCC_I2C1);
rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST); break;
break; #if defined(I2C2_BASE)
case I2C2: case I2C2:
rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_I2C2RST); rcc_periph_reset_pulse(RCC_I2C2);
rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_I2C2RST); break;
break; #endif
#if defined(I2C3_BASE)
case I2C3:
rcc_periph_reset_pulse(RCC_I2C3);
break;
#endif
default:
break;
} }
} }