header file generation learned register templates

registers that have the same structure can now use shared value
definitions. the abstraction is kept active through the header
generation; that is, no cartesian product code is generated.

include/libopencm3/efm32/tinygecko/cmu.h

@@ -61,10 +61,10 @@
 #define CMU_CMD                 MMIO32(CMU_BASE + 0x024) /**< @see EFM32TG_CMU_CMD_bits */
 #define CMU_LFCLKSEL            MMIO32(CMU_BASE + 0x028) /**< @see EFM32TG_CMU_LFCLKSEL_bits */
 #define CMU_STATUS              MMIO32(CMU_BASE + 0x02c) /**< @see EFM32TG_CMU_STATUS_bits */
-#define CMU_IF                  MMIO32(CMU_BASE + 0x030) /**< @see EFM32TG_CMU_IF_bits */
+#define CMU_IF                  MMIO32(CMU_BASE + 0x030) /**< @see EFM32TG_CMU_I_bits */
-#define CMU_IFS                 MMIO32(CMU_BASE + 0x034) /**< @see EFM32TG_CMU_IFS_bits */
+#define CMU_IFS                 MMIO32(CMU_BASE + 0x034) /**< @see EFM32TG_CMU_I_bits */
-#define CMU_IFC                 MMIO32(CMU_BASE + 0x038) /**< @see EFM32TG_CMU_IFC_bits */
+#define CMU_IFC                 MMIO32(CMU_BASE + 0x038) /**< @see EFM32TG_CMU_I_bits */
-#define CMU_IEN                 MMIO32(CMU_BASE + 0x03c) /**< @see EFM32TG_CMU_IEN_bits */
+#define CMU_IEN                 MMIO32(CMU_BASE + 0x03c) /**< @see EFM32TG_CMU_I_bits */
 #define CMU_HFCORECLKEN0        MMIO32(CMU_BASE + 0x040) /**< @see EFM32TG_CMU_HFCORECLKEN0_bits */
 #define CMU_HFPERCLKEN0         MMIO32(CMU_BASE + 0x044) /**< @see EFM32TG_CMU_HFPERCLKEN0_bits */
 #define CMU_SYNCBUSY            MMIO32(CMU_BASE + 0x050) /**< @see EFM32TG_CMU_SYNCBUSY_bits */
@@ -578,6 +578,40 @@
 
 /** @} */
 
+/** Bit states for the CMU "I" group of registers (IF, IFS, IFC, IEN)
+ *
+ * These registers use this:
+ *
+ * <ul>
+ *
+ * <li>The CMU_IF register; see d0034_efm32tg_reference_manual.pdf section
+ * 11.5.13 for definitions.</li>
+ *
+ * <li>The CMU_IFS register; see d0034_efm32tg_reference_manual.pdf section
+ * 11.5.14 for definitions.</li>
+ *
+ * <li>The CMU_IFC register; see d0034_efm32tg_reference_manual.pdf section
+ * 11.5.15 for definitions.</li>
+ *
+ * <li>The CMU_IEN register; see d0034_efm32tg_reference_manual.pdf section
+ * 11.5.16 for definitions.</li>
+ *
+ * </ul>
+ *
+ * @defgroup EFM32TG_CMU_I_bits CMU I bits group
+ * @{
+ */
+
+#define CMU_I_CALOF             (1<<6)
+#define CMU_I_CALRDY            (1<<5)
+#define CMU_I_AUXHFRCORDY       (1<<4)
+#define CMU_I_LFXORDY           (1<<3)
+#define CMU_I_LFRCORDY          (1<<2)
+#define CMU_I_HFXORDY           (1<<1)
+#define CMU_I_HFRCORDY          (1<<0)
+
+/** @} */
+
 /** @} */
 
 /** CMU convenience functions

include/libopencm3/efm32/tinygecko/cmu.yaml

@@ -6,6 +6,17 @@ shortname: CMU
 longname: Clock Management Unit
 baseref: d0034_efm32tg_reference_manual.pdf section 11
 registers_baserefext: ".4"
+templateregs:
+    - name: I
+      comment: Bits for the various CMU interrupt registers
+      fields:
+          - {name: CALOF, shift: 6}
+          - {name: CALRDY, shift: 5}
+          - {name: AUXHFRCORDY, shift: 4}
+          - {name: LFXORDY, shift: 3}
+          - {name: LFRCORDY, shift: 2}
+          - {name: HFXORDY, shift: 1}
+          - {name: HFRCORDY, shift: 0}
 registers:
     - name: CTRL
       offset: 0x000
@@ -265,19 +276,19 @@ registers:
     - name: IF
       offset: 0x030
       definition_baserefext: ".5.13"
-      #fields: I
+      fields: I
     - name: IFS
       offset: 0x034
       definition_baserefext: ".5.14"
-      #fields: I
+      fields: I
     - name: IFC
       offset: 0x038
       definition_baserefext: ".5.15"
-      #fields: I
+      fields: I
     - name: IEN
       offset: 0x03c
       definition_baserefext: ".5.16"
-      #fields: I
+      fields: I
     - name: HFCORECLKEN0
       offset: 0x040
       definition_baserefext: ".5.17"

include/libopencm3/efm32/tinygecko/generate.py

@@ -64,20 +64,62 @@ def yaml2h(filenamebase):
         nl()
 
         regs = data['registers']
+
+        for template in data.get('templateregs', []):
+            template['is_template'] = []
+            regs.append(template)
+
+        regs_dict = dict((x['name'], x) for x in regs) # for easier access. they've got to be a list in yaml to preserve order
+
         wc("These definitions reflect {baseref}{registers_baserefext}", "@defgroup {shortdocname}_registers {shortname} registers", "@{{")
         nl()
+
         for regdata in regs:
-            define("%s_%s"%(data['shortname'], regdata['name']), "MMIO32(%s_BASE + %#.003x)"%(data['shortname'], regdata['offset']), "@see %s_%s_%s"%(data['shortdocname'], regdata['name'], 'values' if 'values' in regdata else 'bits'))
+            if 'is_template' in regdata:
+                # this isn't a real register, just a template
+                continue
+            secondcomponent_name = regdata['name']
+            if ('fields' in regdata and isinstance(regdata['fields'], str)) or ('values' in regdata and isinstance(regdata['values'], str)):
+                # uses a template
+                secondcomponent_name = regdata['fields'] if 'fields' in regdata else regdata['values']
+                regs_dict[secondcomponent_name]['is_template'].append(regdata['name'])
+
+            define("%s_%s"%(data['shortname'], regdata['name']), "MMIO32(%s_BASE + %#.003x)"%(data['shortname'], regdata['offset']), "@see %s_%s_%s"%(data['shortdocname'], secondcomponent_name, 'values' if 'values' in regdata else 'bits'))
         nl()
         wc_close() # close register definitions
         nl()
+
         for regdata in regs:
             has_bits = "fields" in regdata
             has_values = "values" in regdata
+            is_template = "is_template" in regdata
             if not has_bits and not has_values:
                 continue
 
-            wc("%s for the {shortname}_{name} register"%("Bit states" if has_bits else "Values"), "See {baseref}{definition_baserefext} for definitions"+regdata.get("details", "."), '@defgroup {shortdocname}_{name}_%s {shortname} {name} %s'%(('bits' if has_bits else 'values',)*2), '@{{', **regdata)
+            if (has_bits and isinstance(regdata['fields'], str)) or (has_values and isinstance(regdata['values'], str)):
+                # uses a template, doesn't need own section
+                continue
+
+            commentlines = []
+            if is_template:
+                commentlines.append("%s for the {shortname} \"{name}\" group of registers (%s)"%("Bit states" if has_bits else "Values", ", ".join(regdata['is_template'])))
+                assert len(regdata['is_template']) > 0, "What should I talk about when nobody uses this template?"
+                commentlines.append("These registers use this:")
+                commentlines.append("<ul>") # FIXME: once we're using markdown 1.8, this can be changed to markdown
+                for user in regdata['is_template']:
+                    userdata = regs_dict[user]
+                    # FIXME: this is an ugly hack around this being in a single wc() line which doesn't take per-line contexts
+                    mergeddata = data.copy()
+                    mergeddata.update(userdata)
+                    commentlines.append(("<li>The {shortname}_{name} register; see {baseref}{definition_baserefext} for definitions"+regdata.get("details", "."+"</li>")).format(**mergeddata))
+                commentlines.append("</ul>")
+                commentlines.append('@defgroup {shortdocname}_{name}_%s {shortname} {name} %s'%(('bits' if has_bits else 'values', 'bits group' if has_bits else 'values group')))
+            else:
+                commentlines.append("%s for the {shortname}_{name} register"%("Bit states" if has_bits else "Values"))
+                commentlines.append("See {baseref}{definition_baserefext} for definitions"+regdata.get("details", "."))
+                commentlines.append('@defgroup {shortdocname}_{name}_%s {shortname} {name} %s'%(('bits' if has_bits else 'values',)*2))
+            commentlines.append('@{{')
+            wc(*commentlines, **regdata)
             nl()
 
             if has_bits: