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spi: drop misleading explicit baudrate comments

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The SPI br parameter has always been the 3 bit fpclk divider field, and
was never a target or explicit bit rate.  Correct the comments, and drop
the duplicate commentary that wasn't included in the doxygen output
anyway.

Fixes: a7a3770d Add initial SPI code
This commit is contained in:
Karl Palsson 2018-01-04 09:59:18 +00:00
parent 580a2a4a63
commit c4cf904ef6
3 changed files with 6 additions and 45 deletions
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17
lib/stm32/common/spi_common_all.c
View File

@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
@note The I2S protocol shares the SPI hardware so the two protocols cannot be @note The I2S protocol shares the SPI hardware so the two protocols cannot be
used at the same time on the same peripheral. used at the same time on the same peripheral.
Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words, Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
LSB first. LSB first.
@code @code
spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
SPI_CR1_LSBFIRST); SPI_CR1_LSBFIRST);
spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0x55); // 8-bit write
@ -54,19 +54,6 @@ LSB first.
#include <libopencm3/stm32/spi.h> #include <libopencm3/stm32/spi.h>
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/rcc.h>
/*
* SPI and I2S code.
*
* Examples:
* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
* SPI_CR1_LSBFIRST);
* spi_write(SPI1, 0x55); // 8-bit write
* spi_write(SPI1, 0xaa88); // 16-bit write
* reg8 = spi_read(SPI1); // 8-bit read
* reg16 = spi_read(SPI1); // 16-bit read
*/
/**@{*/ /**@{*/
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/

17
lib/stm32/common/spi_common_f03.c
View File

@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
@note The I2S protocol shares the SPI hardware so the two protocols cannot be @note The I2S protocol shares the SPI hardware so the two protocols cannot be
used at the same time on the same peripheral. used at the same time on the same peripheral.
Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words, Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
LSB first. LSB first.
@code @code
spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT, SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT,
SPI_CR1_LSBFIRST); SPI_CR1_LSBFIRST);
spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0x55); // 8-bit write
@ -54,19 +54,6 @@ LSB first.
#include <libopencm3/stm32/spi.h> #include <libopencm3/stm32/spi.h>
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/rcc.h>
/*
* SPI and I2S code.
*
* Examples:
* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT,
* SPI_CR1_LSBFIRST);
* spi_write(SPI1, 0x55); // 8-bit write
* spi_write(SPI1, 0xaa88); // 16-bit write
* reg8 = spi_read(SPI1); // 8-bit read
* reg16 = spi_read(SPI1); // 16-bit read
*/
/**@{*/ /**@{*/
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/

17
lib/stm32/common/spi_common_l1f124.c
View File

@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
@note The I2S protocol shares the SPI hardware so the two protocols cannot be @note The I2S protocol shares the SPI hardware so the two protocols cannot be
used at the same time on the same peripheral. used at the same time on the same peripheral.
Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words, Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
LSB first. LSB first.
@code @code
spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
SPI_CR1_LSBFIRST); SPI_CR1_LSBFIRST);
spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0x55); // 8-bit write
@ -54,19 +54,6 @@ LSB first.
#include <libopencm3/stm32/spi.h> #include <libopencm3/stm32/spi.h>
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/rcc.h>
/*
* SPI and I2S code.
*
* Examples:
* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
* SPI_CR1_LSBFIRST);
* spi_write(SPI1, 0x55); // 8-bit write
* spi_write(SPI1, 0xaa88); // 16-bit write
* reg8 = spi_read(SPI1); // 8-bit read
* reg16 = spi_read(SPI1); // 16-bit read
*/
/**@{*/ /**@{*/
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/