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stm32f3: adc: common registers are per master/slave

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They're not a single set just based on ADC1.
This commit is contained in:
Karl Palsson 2015-10-22 22:54:04 +00:00
parent 7373d3ad58
commit ca50f069b6
2 changed files with 19 additions and 14 deletions
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19
include/libopencm3/stm32/f3/adc.h
View File

@ -247,11 +247,16 @@
#define ADC3_CALFACT ADC_CALFACT(ADC3_BASE)
#define ADC4_CALFACT ADC_CALFACT(ADC4_BASE)
/* ADC common (shared) registers */
#define ADC_COMMON_REGISTERS_BASE (ADC1_BASE+0x300)
#define ADC_CSR MMIO32(ADC_COMMON_REGISTERS_BASE + 0x0)
#define ADC_CCR MMIO32(ADC_COMMON_REGISTERS_BASE + 0x8)
#define ADC_CDR MMIO32(ADC_COMMON_REGISTERS_BASE + 0xA)
/* ADC common (shared) registers, adc_pair is ADC12 or ADC34 */
#define ADC_CSR(adc_pair) MMIO32((adc_pair) + 0x300 + 0x0)
#define ADC_CCR(adc_pair) MMIO32((adc_pair) + 0x300 + 0x8)
#define ADC_CDR(adc_pair) MMIO32((adc_pair) + 0x300 + 0xa)
#define ADC12_CSR ADC_CSR(ADC1)
#define ADC12_CCR ADC_CCR(ADC1)
#define ADC12_CDR ADC_CDR(ADC1)
#define ADC34_CSR ADC_CSR(ADC3)
#define ADC34_CCR ADC_CCR(ADC3)
#define ADC34_CDR ADC_CDR(ADC3)
/*------- ADC_ISR values ---------*/
@ -903,8 +908,8 @@ uint32_t adc_read_regular(uint32_t adc);
uint32_t adc_read_injected(uint32_t adc, uint8_t reg);
void adc_set_injected_offset(uint32_t adc, uint8_t reg, uint32_t offset);
void adc_set_clk_prescale(uint32_t prescaler);
void adc_set_multi_mode(uint32_t mode);
void adc_set_clk_prescale(uint32_t adc, uint32_t prescaler);
void adc_set_multi_mode(uint32_t adc, uint32_t mode);
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
uint32_t polarity);
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,

14
lib/stm32/f3/adc.c
View File

@ -931,10 +931,10 @@ void adc_power_on(uint32_t adc)
* adc_ccr_adcpre
*/
void adc_set_clk_prescale(uint32_t prescale)
void adc_set_clk_prescale(uint32_t adc, uint32_t prescale)
{
uint32_t reg32 = ((ADC_CCR & ~ADC_CCR_CKMODE_MASK) | prescale);
ADC_CCR = reg32;
uint32_t reg32 = ((ADC_CCR(adc) & ~ADC_CCR_CKMODE_MASK) | prescale);
ADC_CCR(adc) = reg32;
}
/*---------------------------------------------------------------------------*/
@ -949,9 +949,9 @@ void adc_set_clk_prescale(uint32_t prescale)
* adc_multi_mode
*/
void adc_set_multi_mode(uint32_t mode)
void adc_set_multi_mode(uint32_t adc, uint32_t mode)
{
ADC_CCR |= mode;
ADC_CCR(adc) |= mode;
}
/*---------------------------------------------------------------------------*/
@ -1177,7 +1177,7 @@ bool adc_awd(uint32_t adc)
void adc_enable_temperature_sensor()
{
ADC_CCR |= ADC_CCR_TSEN;
ADC12_CCR |= ADC_CCR_TSEN;
}
/*---------------------------------------------------------------------------*/
@ -1192,7 +1192,7 @@ void adc_enable_temperature_sensor()
void adc_disable_temperature_sensor()
{
ADC_CCR &= ~ADC_CCR_TSEN;
ADC12_CCR &= ~ADC_CCR_TSEN;
}
/*---------------------------------------------------------------------------*/