From cf80e2bd5e19eadd8fe0e8719070fc59070a3459 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 9 Aug 2016 05:53:24 -1000 Subject: [PATCH] stm32f4: USB support for newer OTG cores Support for the conflicting bit definitions for vbus sensing on core id version 0x2000+ Reviewed-by: Karl Palsson --- include/libopencm3/stm32/otg_common.h | 8 ++++++-- lib/usb/usb_f107.c | 16 ++++++++++++---- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/include/libopencm3/stm32/otg_common.h b/include/libopencm3/stm32/otg_common.h index eeabbe9e..8c1022b0 100644 --- a/include/libopencm3/stm32/otg_common.h +++ b/include/libopencm3/stm32/otg_common.h @@ -219,9 +219,11 @@ #define OTG_GRXSTSP_BCNT_MASK (0x7ff << 4) #define OTG_GRXSTSP_EPNUM_MASK (0xf << 0) -/* OTG general core configuration register (OTG_GCCFG) */ /* Bits 31:22 - Reserved */ -#define OTG_GCCFG_NOVBUSSENS (1 << 21) +/** Only on cores < 0x2000 */ +#define OTG_GCCFG_NOVBUSSENS (1 << 21) +/** Only on cores >= 0x2000 */ +#define OTG_GCCFG_VBDEN (1 << 21) #define OTG_GCCFG_SOFOUTEN (1 << 20) #define OTG_GCCFG_VBUSBSEN (1 << 19) #define OTG_GCCFG_VBUSASEN (1 << 18) @@ -229,6 +231,8 @@ #define OTG_GCCFG_PWRDWN (1 << 16) /* Bits 15:0 - Reserved */ +/* OTG FS Product ID register (OTG_CID) */ +#define OTG_CID_HAS_VBDEN 0x00002000 /* Device-mode CSRs */ /* OTG device control register (OTG_DCTL) */ diff --git a/lib/usb/usb_f107.c b/lib/usb/usb_f107.c index 1620482b..7f7902cc 100644 --- a/lib/usb/usb_f107.c +++ b/lib/usb/usb_f107.c @@ -54,11 +54,7 @@ const struct _usbd_driver stm32f107_usb_driver = { static usbd_device *stm32f107_usbd_init(void) { rcc_periph_clock_enable(RCC_OTGFS); - OTG_FS_GINTSTS = OTG_GINTSTS_MMIS; - OTG_FS_GUSBCFG |= OTG_GUSBCFG_PHYSEL; - /* Enable VBUS sensing in device mode and power down the PHY. */ - OTG_FS_GCCFG |= OTG_GCCFG_VBUSBSEN | OTG_GCCFG_PWRDWN; /* Wait for AHB idle. */ while (!(OTG_FS_GRSTCTL & OTG_GRSTCTL_AHBIDL)); @@ -66,9 +62,21 @@ static usbd_device *stm32f107_usbd_init(void) OTG_FS_GRSTCTL |= OTG_GRSTCTL_CSRST; while (OTG_FS_GRSTCTL & OTG_GRSTCTL_CSRST); + if (OTG_FS_CID >= OTG_CID_HAS_VBDEN) { + /* Enable VBUS detection in device mode and power up the PHY. */ + OTG_FS_GCCFG |= OTG_GCCFG_VBDEN | OTG_GCCFG_PWRDWN; + } else { + /* Enable VBUS sensing in device mode and power up the PHY. */ + OTG_FS_GCCFG |= OTG_GCCFG_VBUSBSEN | OTG_GCCFG_PWRDWN; + } + /* Explicitly enable DP pullup (not all cores do this by default) */ + OTG_FS_DCTL &= ~OTG_DCTL_SDIS; + /* Force peripheral only mode. */ OTG_FS_GUSBCFG |= OTG_GUSBCFG_FDMOD | OTG_GUSBCFG_TRDT_MASK; + OTG_FS_GINTSTS = OTG_GINTSTS_MMIS; + /* Full speed device. */ OTG_FS_DCFG |= OTG_DCFG_DSPD;