diff --git a/include/libopencm3/stm32/f0/rcc.h b/include/libopencm3/stm32/f0/rcc.h index 3d7492e2..b6e519ae 100644 --- a/include/libopencm3/stm32/f0/rcc.h +++ b/include/libopencm3/stm32/f0/rcc.h @@ -305,6 +305,9 @@ Control #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_OBLRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF) #define RCC_CSR_V18PWRRSTF (1 << 23) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) diff --git a/include/libopencm3/stm32/f1/rcc.h b/include/libopencm3/stm32/f1/rcc.h index 1675fdef..828475fd 100644 --- a/include/libopencm3/stm32/f1/rcc.h +++ b/include/libopencm3/stm32/f1/rcc.h @@ -433,6 +433,9 @@ #define RCC_CSR_PORRSTF (1 << 27) #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) diff --git a/include/libopencm3/stm32/f2/rcc.h b/include/libopencm3/stm32/f2/rcc.h index d98f3fea..afda3692 100644 --- a/include/libopencm3/stm32/f2/rcc.h +++ b/include/libopencm3/stm32/f2/rcc.h @@ -451,6 +451,9 @@ #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_BORRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_BORRSTF) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) diff --git a/include/libopencm3/stm32/f4/rcc.h b/include/libopencm3/stm32/f4/rcc.h index c6bf5ad8..7322ec75 100644 --- a/include/libopencm3/stm32/f4/rcc.h +++ b/include/libopencm3/stm32/f4/rcc.h @@ -522,6 +522,9 @@ #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_BORRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_BORRSTF) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) diff --git a/include/libopencm3/stm32/f7/rcc.h b/include/libopencm3/stm32/f7/rcc.h index 77dacd53..2f7891e6 100644 --- a/include/libopencm3/stm32/f7/rcc.h +++ b/include/libopencm3/stm32/f7/rcc.h @@ -511,6 +511,9 @@ #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_BORRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_BORRSTF) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) diff --git a/include/libopencm3/stm32/l0/rcc.h b/include/libopencm3/stm32/l0/rcc.h index 3f29bd49..230e82bf 100644 --- a/include/libopencm3/stm32/l0/rcc.h +++ b/include/libopencm3/stm32/l0/rcc.h @@ -469,7 +469,11 @@ #define RCC_CSR_PORRSTF (1 << 27) #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_OBLRSTF (1 << 25) -#define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_FWRSTF (1 << 24) +#define RCC_CSR_RMVF (1 << 23) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF | RCC_CSR_FWRSTF) #define RCC_CSR_RTCRST (1 << 19) #define RCC_CSR_RTCEN (1 << 18) #define RCC_CSR_RTCSEL_SHIFT (16) diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h index 8c783e49..6432a493 100644 --- a/include/libopencm3/stm32/l1/rcc.h +++ b/include/libopencm3/stm32/l1/rcc.h @@ -388,6 +388,9 @@ #define RCC_CSR_PINRSTF (1 << 26) #define RCC_CSR_OBLRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF) #define RCC_CSR_RTCRST (1 << 23) #define RCC_CSR_RTCEN (1 << 22) #define RCC_CSR_RTCSEL_SHIFT (16) diff --git a/include/libopencm3/stm32/l4/rcc.h b/include/libopencm3/stm32/l4/rcc.h index 30241949..fbdc7b8e 100644 --- a/include/libopencm3/stm32/l4/rcc.h +++ b/include/libopencm3/stm32/l4/rcc.h @@ -678,6 +678,9 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz, #define RCC_CSR_OBLRSTF (1 << 25) #define RCC_CSR_FWRSTF (1 << 24) #define RCC_CSR_RMVF (1 << 23) +#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\ + RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_BORRSTF |\ + RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF | RCC_CSR_FWRSTF) /** @defgroup rcc_csr_msirange MSI Range after standby values @brief Range of the MSI oscillator after returning from standby