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Added missing lm3s header files.

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This commit is contained in:
Gareth McMullin 2011-02-09 14:31:17 +13:00
parent 4b5f9b4a35
commit d67795f383
2 changed files with 108 additions and 0 deletions
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47
include/libopencm3/lm3s/memorymap.h Normal file
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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LM3S_MEMORYMAP_H
#define LM3S_MEMORYMAP_H
#include <libopencm3/cm3/common.h>
/* --- LM3S specific peripheral definitions ----------------------------- */
#define GPIOA_APB_BASE (0x40004000)
#define GPIOB_APB_BASE (0x40005000)
#define GPIOC_APB_BASE (0x40006000)
#define GPIOD_APB_BASE (0x40007000)
#define GPIOE_APB_BASE (0x40024000)
#define GPIOF_APB_BASE (0x40025000)
#define GPIOG_APB_BASE (0x40026000)
#define GPIOH_APB_BASE (0x40027000)
#define GPIOA_BASE (0x40058000)
#define GPIOB_BASE (0x40059000)
#define GPIOC_BASE (0x4005A000)
#define GPIOD_BASE (0x4005B000)
#define GPIOE_BASE (0x4005C000)
#define GPIOF_BASE (0x4005D000)
#define GPIOG_BASE (0x4005E000)
#define GPIOH_BASE (0x4005F000)
#define SYSTEMCONTROL_BASE (0x400FE000)
#endif

61
include/libopencm3/lm3s/systemcontrol.h Normal file
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/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LM3S_SYSTEMCONTROL_H
#define LM3S_SYSTEMCONTROL_H
#include <libopencm3/cm3/common.h>
#define SYSTEMCONTROL_DID0 MMIO32(SYSTEMCONTROL_BASE + 0x000)
#define SYSTEMCONTROL_DID1 MMIO32(SYSTEMCONTROL_BASE + 0x004)
#define SYSTEMCONTROL_DC0 MMIO32(SYSTEMCONTROL_BASE + 0x008)
#define SYSTEMCONTROL_DC1 MMIO32(SYSTEMCONTROL_BASE + 0x010)
#define SYSTEMCONTROL_DC2 MMIO32(SYSTEMCONTROL_BASE + 0x014)
#define SYSTEMCONTROL_DC3 MMIO32(SYSTEMCONTROL_BASE + 0x018)
#define SYSTEMCONTROL_DC4 MMIO32(SYSTEMCONTROL_BASE + 0x01C)
#define SYSTEMCONTROL_DC5 MMIO32(SYSTEMCONTROL_BASE + 0x020)
#define SYSTEMCONTROL_DC6 MMIO32(SYSTEMCONTROL_BASE + 0x024)
#define SYSTEMCONTROL_DC7 MMIO32(SYSTEMCONTROL_BASE + 0x028)
#define SYSTEMCONTROL_PBORCTL MMIO32(SYSTEMCONTROL_BASE + 0x030)
#define SYSTEMCONTROL_LDORCTL MMIO32(SYSTEMCONTROL_BASE + 0x034)
#define SYSTEMCONTROL_SRCR0 MMIO32(SYSTEMCONTROL_BASE + 0x040)
#define SYSTEMCONTROL_SRCR1 MMIO32(SYSTEMCONTROL_BASE + 0x044)
#define SYSTEMCONTROL_SRCR2 MMIO32(SYSTEMCONTROL_BASE + 0x048)
#define SYSTEMCONTROL_RIS MMIO32(SYSTEMCONTROL_BASE + 0x050)
#define SYSTEMCONTROL_IMC MMIO32(SYSTEMCONTROL_BASE + 0x054)
#define SYSTEMCONTROL_MISC MMIO32(SYSTEMCONTROL_BASE + 0x058)
#define SYSTEMCONTROL_RESC MMIO32(SYSTEMCONTROL_BASE + 0x05C)
#define SYSTEMCONTROL_RCC MMIO32(SYSTEMCONTROL_BASE + 0x060)
#define SYSTEMCONTROL_PLLCFG MMIO32(SYSTEMCONTROL_BASE + 0x064)
#define SYSTEMCONTROL_GPIOHBCTL MMIO32(SYSTEMCONTROL_BASE + 0x06C)
#define SYSTEMCONTROL_RCC2 MMIO32(SYSTEMCONTROL_BASE + 0x070)
#define SYSTEMCONTROL_MOSCCTL MMIO32(SYSTEMCONTROL_BASE + 0x07C)
#define SYSTEMCONTROL_RCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x100)
#define SYSTEMCONTROL_RCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x104)
#define SYSTEMCONTROL_RCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x108)
#define SYSTEMCONTROL_SCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x110)
#define SYSTEMCONTROL_SCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x114)
#define SYSTEMCONTROL_SCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x118)
#define SYSTEMCONTROL_DCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x120)
#define SYSTEMCONTROL_DCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x124)
#define SYSTEMCONTROL_DCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x128)
#define SYSTEMCONTROL_DSLPCLKCFG MMIO32(SYSTEMCONTROL_BASE + 0x144)
#endif