From de39ab158449ec0920c8b9b07746bf052eea9cba Mon Sep 17 00:00:00 2001 From: Bruno Randolf Date: Wed, 20 Dec 2017 19:31:34 +0000 Subject: [PATCH] stm32:l4: Add CRS Reviewed against RM0394, untested --- include/libopencm3/stm32/crs.h | 2 ++ include/libopencm3/stm32/l4/memorymap.h | 1 + include/libopencm3/stm32/l4/rcc.h | 2 ++ lib/stm32/l4/Makefile | 1 + 4 files changed, 6 insertions(+) diff --git a/include/libopencm3/stm32/crs.h b/include/libopencm3/stm32/crs.h index 50c94b5b..69858bc2 100644 --- a/include/libopencm3/stm32/crs.h +++ b/include/libopencm3/stm32/crs.h @@ -24,6 +24,8 @@ # include #elif defined(STM32L0) # include +#elif defined(STM32L4) +# include #else # error "stm32 family not defined or not supported for this peripheral" #endif diff --git a/include/libopencm3/stm32/l4/memorymap.h b/include/libopencm3/stm32/l4/memorymap.h index f5d9e02c..161c3351 100644 --- a/include/libopencm3/stm32/l4/memorymap.h +++ b/include/libopencm3/stm32/l4/memorymap.h @@ -56,6 +56,7 @@ #define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400) #define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800) #define I2C3_BASE (PERIPH_BASE_APB1 + 0x5c00) +#define CRS_BASE (PERIPH_BASE_APB1 + 0x6000) #define CAN1_BASE (PERIPH_BASE_APB1 + 0x6400) #define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) #define DAC1_BASE (PERIPH_BASE_APB1 + 0x7400) diff --git a/include/libopencm3/stm32/l4/rcc.h b/include/libopencm3/stm32/l4/rcc.h index de275155..0366752c 100644 --- a/include/libopencm3/stm32/l4/rcc.h +++ b/include/libopencm3/stm32/l4/rcc.h @@ -758,6 +758,7 @@ enum rcc_periph_clken { RCC_DAC1 = _REG_BIT(RCC_APB1ENR1_OFFSET, 29), RCC_PWR = _REG_BIT(RCC_APB1ENR1_OFFSET, 28), RCC_CAN1 = _REG_BIT(RCC_APB1ENR1_OFFSET, 25), + RCC_CRS = _REG_BIT(RCC_APB1ENR1_OFFSET, 24), RCC_I2C3 = _REG_BIT(RCC_APB1ENR1_OFFSET, 23), RCC_I2C2 = _REG_BIT(RCC_APB1ENR1_OFFSET, 22), RCC_I2C1 = _REG_BIT(RCC_APB1ENR1_OFFSET, 21), @@ -898,6 +899,7 @@ enum rcc_periph_rst { RST_DAC1 = _REG_BIT(RCC_APB1RSTR1_OFFSET, 29), RST_PWR = _REG_BIT(RCC_APB1RSTR1_OFFSET, 28), RST_CAN1 = _REG_BIT(RCC_APB1RSTR1_OFFSET, 25), + RST_CRS = _REG_BIT(RCC_APB1RSTR1_OFFSET, 24), RST_I2C3 = _REG_BIT(RCC_APB1RSTR1_OFFSET, 23), RST_I2C2 = _REG_BIT(RCC_APB1RSTR1_OFFSET, 22), RST_I2C1 = _REG_BIT(RCC_APB1RSTR1_OFFSET, 21), diff --git a/lib/stm32/l4/Makefile b/lib/stm32/l4/Makefile index bde174a9..6af3cdaa 100644 --- a/lib/stm32/l4/Makefile +++ b/lib/stm32/l4/Makefile @@ -45,6 +45,7 @@ OBJS += rcc_common_all.o OBJS += gpio_common_all.o gpio_common_f0234.o OBJS += adc_common_v2.o adc_common_v2_multi.o OBJS += crc_common_all.o crc_v2.o +OBJS += crs_common_all.o OBJS += rng_common_v1.o OBJS += timer_common_all.o OBJS += i2c_common_v2.o