From e2ac1a6358ae0b5b1b2be08f70a0468cbb9f84a0 Mon Sep 17 00:00:00 2001 From: Jacob Walser Date: Tue, 24 Sep 2019 22:35:54 -0400 Subject: [PATCH] stm32f3: bugfix + adjust wwdg threshold signatures to support 12 bit resolution - these registers are 12 bits wide - bugfix clearing thresholds so that both upper and lower thresholds can be configured on the **window** watchdog --- include/libopencm3/stm32/f3/adc.h | 4 ++-- lib/stm32/f3/adc.c | 29 ++++++++++++++++------------- 2 files changed, 18 insertions(+), 15 deletions(-) diff --git a/include/libopencm3/stm32/f3/adc.h b/include/libopencm3/stm32/f3/adc.h index 041562f4..1456aacc 100644 --- a/include/libopencm3/stm32/f3/adc.h +++ b/include/libopencm3/stm32/f3/adc.h @@ -533,8 +533,8 @@ void adc_disable_eos_interrupt(uint32_t adc); void adc_start_conversion_injected(uint32_t adc); void adc_disable_external_trigger_regular(uint32_t adc); void adc_disable_external_trigger_injected(uint32_t adc); -void adc_set_watchdog_high_threshold(uint32_t adc, uint8_t threshold); -void adc_set_watchdog_low_threshold(uint32_t adc, uint8_t threshold); +void adc_set_watchdog_high_threshold(uint32_t adc, uint16_t threshold); +void adc_set_watchdog_low_threshold(uint32_t adc, uint16_t threshold); void adc_set_injected_sequence(uint32_t adc, uint8_t length, uint8_t channel[]); bool adc_eoc_injected(uint32_t adc); bool adc_eos_injected(uint32_t adc); diff --git a/lib/stm32/f3/adc.c b/lib/stm32/f3/adc.c index da317134..7bf67e81 100644 --- a/lib/stm32/f3/adc.c +++ b/lib/stm32/f3/adc.c @@ -415,18 +415,20 @@ void adc_start_conversion_injected(uint32_t adc) * * @param[in] adc Unsigned int32. ADC block register address base * @ref adc_reg_base - * @param[in] threshold Unsigned int8. Upper threshold value + * @param[in] threshold. Upper threshold value */ -void adc_set_watchdog_high_threshold(uint32_t adc, uint8_t threshold) +void adc_set_watchdog_high_threshold(uint32_t adc, uint16_t threshold) { uint32_t reg32 = 0; + uint32_t mask = 0xf000ffff; reg32 |= (threshold << 16); - reg32 &= ~0xff00ffff; /* Clear all bits above 8. */ - ADC_TR1(adc) = reg32; - ADC_TR2(adc) = reg32; - ADC_TR3(adc) = reg32; + reg32 &= ~mask; /* clear masked bits. */ + + ADC_TR1(adc) = (ADC_TR1(adc) & mask) | reg32; + ADC_TR2(adc) = (ADC_TR2(adc) & mask) | reg32; + ADC_TR3(adc) = (ADC_TR3(adc) & mask) | reg32; } /*---------------------------------------------------------------------------*/ @@ -434,18 +436,19 @@ void adc_set_watchdog_high_threshold(uint32_t adc, uint8_t threshold) * * @param[in] adc Unsigned int32. ADC block register address base * @ref adc_reg_base - * @param[in] threshold Unsigned int8. Lower threshold value + * @param[in] threshold. Lower threshold value */ -void adc_set_watchdog_low_threshold(uint32_t adc, uint8_t threshold) +void adc_set_watchdog_low_threshold(uint32_t adc, uint16_t threshold) { uint32_t reg32 = 0; - + uint32_t mask = 0xfffff000; reg32 = (uint32_t)threshold; - reg32 &= ~0xffffff00; /* Clear all bits above 8. */ - ADC_TR1(adc) = reg32; - ADC_TR2(adc) = reg32; - ADC_TR3(adc) = reg32; + reg32 &= ~mask; /* clear masked bits. */ + + ADC_TR1(adc) = (ADC_TR1(adc) & mask) | reg32; + ADC_TR2(adc) = (ADC_TR2(adc) & mask) | reg32; + ADC_TR3(adc) = (ADC_TR3(adc) & mask) | reg32; }