Build fixes for ethernet.c, and hook it up.
This commit is contained in:
parent
af61aaef21
commit
e2d82ff44c
@ -28,7 +28,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../include -fno-common \
|
||||
# ARFLAGS = rcsv
|
||||
ARFLAGS = rcs
|
||||
OBJS = vector.o rcc.o gpio.o usart.o adc.o spi.o flash.o nvic.o \
|
||||
rtc.o i2c.o dma.o systick.o exti.o scb.o \
|
||||
rtc.o i2c.o dma.o systick.o exti.o scb.o ethernet.o \
|
||||
usb_f103.o usb.o usb_control.o usb_standard.o
|
||||
|
||||
VPATH += usb
|
||||
|
@ -22,32 +22,32 @@
|
||||
void eth_smi_write(u8 phy, u8 reg, u16 data)
|
||||
{
|
||||
/* Set PHY and register addresses for write access. */
|
||||
*ETH_MACMIIAR &= ~(ETH_MACMIIAR_MR | ETH_MACMIIAR_PA);
|
||||
*ETH_MACMIIAR |= (phy << 11) | (reg << 6) | ETH_MACMIIAR_MW;
|
||||
ETH_MACMIIAR &= ~(ETH_MACMIIAR_MR | ETH_MACMIIAR_PA);
|
||||
ETH_MACMIIAR |= (phy << 11) | (reg << 6) | ETH_MACMIIAR_MW;
|
||||
|
||||
/* Set register value. */
|
||||
*ETH_MACMIIDR = data;
|
||||
ETH_MACMIIDR = data;
|
||||
|
||||
/* Begin transaction. */
|
||||
*ETH_MACMIIAR |= ETH_MACMIIAR_MB;
|
||||
ETH_MACMIIAR |= ETH_MACMIIAR_MB;
|
||||
|
||||
/* Wait for not busy. */
|
||||
while (*ETH_MACMIIAR & ETH_MACMIIAR_MB);
|
||||
while (ETH_MACMIIAR & ETH_MACMIIAR_MB);
|
||||
}
|
||||
|
||||
u16 eth_smi_read(u8 phy, u8 reg)
|
||||
{
|
||||
/* Set PHY and register addresses for write access. */
|
||||
*ETH_MACMIIAR &= ~(ETH_MACMIIAR_MR | ETH_MACMIIAR_PA |
|
||||
ETH_MACMIIAR &= ~(ETH_MACMIIAR_MR | ETH_MACMIIAR_PA |
|
||||
ETH_MACMIAR_MW);
|
||||
*ETH_MACMIIAR |= (phy << 11) | (reg << 6);
|
||||
ETH_MACMIIAR |= (phy << 11) | (reg << 6);
|
||||
|
||||
/* Begin transaction. */
|
||||
*ETH_MACMIIAR |= ETH_MACMIIAR_MB;
|
||||
ETH_MACMIIAR |= ETH_MACMIIAR_MB;
|
||||
|
||||
/* Wait for not busy. */
|
||||
while (*ETH_MACMIIAR & ETH_MACMIIAR_MB);
|
||||
while (ETH_MACMIIAR & ETH_MACMIIAR_MB);
|
||||
|
||||
/* Set register value. */
|
||||
return (u16)(*ETH_MACMIIDR);
|
||||
return (u16)(ETH_MACMIIDR);
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user