[stm32-dma] Eliminate redundant write.

Clearing a single bit in DMA_CCR, then immediately writing a 0 over the
entire register is completely redundant on the F1, F3 and L1 DMA
peripherals.  (Unlike the F2 & F4 DMA Peripheral, where this is
required)
This commit is contained in:
Karl Palsson 2013-02-06 11:41:10 +00:00
parent c9276b7aa2
commit e4c0a50286

View File

@ -55,9 +55,7 @@ The channel is disabled and configuration registers are cleared.
void dma_channel_reset(u32 dma, u8 channel)
{
/* Disable channel. */
DMA_CCR(dma, channel) &= ~DMA_CCR_EN;
/* Reset config bits. */
/* Disable channel and reset config bits. */
DMA_CCR(dma, channel) = 0;
/* Reset data transfer number. */
DMA_CNDTR(dma, channel) = 0;