[stm32-dma] Eliminate redundant write.
Clearing a single bit in DMA_CCR, then immediately writing a 0 over the entire register is completely redundant on the F1, F3 and L1 DMA peripherals. (Unlike the F2 & F4 DMA Peripheral, where this is required)
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@ -55,9 +55,7 @@ The channel is disabled and configuration registers are cleared.
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void dma_channel_reset(u32 dma, u8 channel)
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{
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/* Disable channel. */
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DMA_CCR(dma, channel) &= ~DMA_CCR_EN;
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/* Reset config bits. */
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/* Disable channel and reset config bits. */
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DMA_CCR(dma, channel) = 0;
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/* Reset data transfer number. */
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DMA_CNDTR(dma, channel) = 0;
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