Fix bug: PLLMUL_PLL_CLK_MUL9 is correct.
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@ -406,7 +406,7 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void)
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* Set the PLL multiplication factor to 9.
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* 8MHz (external) * 9 (multiplier) = 72MHz
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*/
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL10);
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Select HSE as PLL source. */
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rcc_set_pll_source(PLLSRC_HSE_CLK);
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