Fix bug: PLLMUL_PLL_CLK_MUL9 is correct.

This commit is contained in:
Uwe Hermann 2010-03-06 15:07:21 +01:00
parent 4390abfd95
commit e6c72d5cfc

View File

@ -406,7 +406,7 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void)
* Set the PLL multiplication factor to 9. * Set the PLL multiplication factor to 9.
* 8MHz (external) * 9 (multiplier) = 72MHz * 8MHz (external) * 9 (multiplier) = 72MHz
*/ */
rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL10); rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
/* Select HSE as PLL source. */ /* Select HSE as PLL source. */
rcc_set_pll_source(PLLSRC_HSE_CLK); rcc_set_pll_source(PLLSRC_HSE_CLK);