diff --git a/include/libopencm3/stm32/common/adc_common_v2.h b/include/libopencm3/stm32/common/adc_common_v2.h
index d46bd496..e91e1769 100644
--- a/include/libopencm3/stm32/common/adc_common_v2.h
+++ b/include/libopencm3/stm32/common/adc_common_v2.h
@@ -35,6 +35,8 @@ specific memorymap.h header before including this header file.*/
 #ifndef LIBOPENCM3_ADC_COMMON_V2_H
 #define LIBOPENCM3_ADC_COMMON_V2_H
 
+/** @defgroup adc_registers ADC registers
+@{*/
 /* ----- ADC registers  -----------------------------------------------------*/
 /** ADC interrupt and status register */
 #define ADC_ISR(adc)		MMIO32((adc) + 0x00)
@@ -56,6 +58,7 @@ specific memorymap.h header before including this header file.*/
 
 /** Common Configuration register */
 #define ADC_CCR(adc)		MMIO32((adc) + 0x300 + 0x8)
+/**@}*/
 
 /* --- Register values -------------------------------------------------------*/
 
diff --git a/include/libopencm3/stm32/common/adc_common_v2_multi.h b/include/libopencm3/stm32/common/adc_common_v2_multi.h
index 55e16b24..374889b1 100644
--- a/include/libopencm3/stm32/common/adc_common_v2_multi.h
+++ b/include/libopencm3/stm32/common/adc_common_v2_multi.h
@@ -42,6 +42,8 @@ specific memorymap.h header before including this header file.*/
  * or only a much "simpler" version as found on (so far) f0 and l0.
  */
 
+/** @addtogroup adc_registers
+ *@{*/
 /* ----- ADC registers  -----------------------------------------------------*/
 /* Sample Time Register 2 */
 #define ADC_SMPR2(adc)		MMIO32((adc) + 0x18)
@@ -84,6 +86,7 @@ specific memorymap.h header before including this header file.*/
 /* ADC common (shared) registers */
 #define ADC_CSR(adc)		MMIO32((adc) + 0x300 + 0x0)
 #define ADC_CDR(adc)		MMIO32((adc) + 0x300 + 0xc)
+/**@}*/
 
 /* --- Register values ------------------------------------------------------*/
 /* ADC_ISR Values -----------------------------------------------------------*/
diff --git a/include/libopencm3/stm32/common/adc_common_v2_single.h b/include/libopencm3/stm32/common/adc_common_v2_single.h
index d2db6dce..060e03cc 100644
--- a/include/libopencm3/stm32/common/adc_common_v2_single.h
+++ b/include/libopencm3/stm32/common/adc_common_v2_single.h
@@ -42,9 +42,12 @@ specific memorymap.h header before including this header file.*/
 #ifndef LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
 #define LIBOPENCM3_ADC_COMMON_V2_SINGLE_H
 
+/** @addtogroup adc_registers
+ *@{*/
 /* ----- ADC registers  -----------------------------------------------------*/
 /** Channel Select Register */
 #define ADC_CHSELR(adc)		MMIO32((adc) + 0x28)
+/**@}*/
 
 /* ----- ADC registers values -----------------------------------------------*/
 /* ADC_CFGR1 values */
diff --git a/include/libopencm3/stm32/g0/adc.h b/include/libopencm3/stm32/g0/adc.h
index f7130558..b00c59ca 100644
--- a/include/libopencm3/stm32/g0/adc.h
+++ b/include/libopencm3/stm32/g0/adc.h
@@ -47,6 +47,8 @@
 #define ADC_CHANNEL_VBAT	14
 /**@}*/
 
+/** @addtogroup adc_registers
+ *@{*/
 /* ----- ADC registers  -----------------------------------------------------*/
 /** ADC_AWD1TR Watchdog 1 Threshold register */
 #define ADC_AWD1TR(adc)		MMIO32((adc) + 0x20)
@@ -65,6 +67,7 @@
 
 /** ADC_OR Option register */
 #define ADC_OR(adc)			MMIO32((adc) + 0xD0)
+/**@}*/
 
 /* --- Register values -------------------------------------------------------*/