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[BREAKING] rcc: change gpio bit defines to be consistent with reference manual

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This _breaks_ your gpio code for F2 and F4.  It makes them consistent
with the reference manual, and more consistent with all other families
and general expectations.

OLD code -> NEW code
RCC_AHB1RSTR_IOPxRST 	->	RCC_AHB1RSTR_GPIOxRST
RCC_AHB1ENR_IOPIxEN	->	RCC_AHB1ENR_GPIOxEN
RCC_AHB1LPENR_IOPxLPEN	->	RCC_AHB1LPENR_GPIOxLPEN

[We're not actually breaking it, see the next commit for deprecated
aliases]
This commit is contained in:
Yonghua Zheng 2018-01-11 10:48:14 +08:00 committed by Karl Palsson
parent 34f57ae06e
commit eeef996cb0
2 changed files with 60 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
include/libopencm3/stm32/f2/rcc.h
View File

@ -215,15 +215,15 @@
#define RCC_AHB1RSTR_DMA2RST (1 << 22) #define RCC_AHB1RSTR_DMA2RST (1 << 22)
#define RCC_AHB1RSTR_DMA1RST (1 << 21) #define RCC_AHB1RSTR_DMA1RST (1 << 21)
#define RCC_AHB1RSTR_CRCRST (1 << 12) #define RCC_AHB1RSTR_CRCRST (1 << 12)
#define RCC_AHB1RSTR_IOPIRST (1 << 8) #define RCC_AHB1RSTR_GPIOIRST (1 << 8)
#define RCC_AHB1RSTR_IOPHRST (1 << 7) #define RCC_AHB1RSTR_GPIOHRST (1 << 7)
#define RCC_AHB1RSTR_IOPGRST (1 << 6) #define RCC_AHB1RSTR_GPIOGRST (1 << 6)
#define RCC_AHB1RSTR_IOPFRST (1 << 5) #define RCC_AHB1RSTR_GPIOFRST (1 << 5)
#define RCC_AHB1RSTR_IOPERST (1 << 4) #define RCC_AHB1RSTR_GPIOERST (1 << 4)
#define RCC_AHB1RSTR_IOPDRST (1 << 3) #define RCC_AHB1RSTR_GPIODRST (1 << 3)
#define RCC_AHB1RSTR_IOPCRST (1 << 2) #define RCC_AHB1RSTR_GPIOCRST (1 << 2)
#define RCC_AHB1RSTR_IOPBRST (1 << 1) #define RCC_AHB1RSTR_GPIOBRST (1 << 1)
#define RCC_AHB1RSTR_IOPARST (1 << 0) #define RCC_AHB1RSTR_GPIOARST (1 << 0)
/* --- RCC_AHB2RSTR values ------------------------------------------------- */ /* --- RCC_AHB2RSTR values ------------------------------------------------- */
@ -289,15 +289,15 @@
#define RCC_AHB1ENR_DMA1EN (1 << 21) #define RCC_AHB1ENR_DMA1EN (1 << 21)
#define RCC_AHB1ENR_BKPSRAMEN (1 << 18) #define RCC_AHB1ENR_BKPSRAMEN (1 << 18)
#define RCC_AHB1ENR_CRCEN (1 << 12) #define RCC_AHB1ENR_CRCEN (1 << 12)
#define RCC_AHB1ENR_IOPIEN (1 << 8) #define RCC_AHB1ENR_GPIOIEN (1 << 8)
#define RCC_AHB1ENR_IOPHEN (1 << 7) #define RCC_AHB1ENR_GPIOHEN (1 << 7)
#define RCC_AHB1ENR_IOPGEN (1 << 6) #define RCC_AHB1ENR_GPIOGEN (1 << 6)
#define RCC_AHB1ENR_IOPFEN (1 << 5) #define RCC_AHB1ENR_GPIOFEN (1 << 5)
#define RCC_AHB1ENR_IOPEEN (1 << 4) #define RCC_AHB1ENR_GPIOEEN (1 << 4)
#define RCC_AHB1ENR_IOPDEN (1 << 3) #define RCC_AHB1ENR_GPIODEN (1 << 3)
#define RCC_AHB1ENR_IOPCEN (1 << 2) #define RCC_AHB1ENR_GPIOCEN (1 << 2)
#define RCC_AHB1ENR_IOPBEN (1 << 1) #define RCC_AHB1ENR_GPIOBEN (1 << 1)
#define RCC_AHB1ENR_IOPAEN (1 << 0) #define RCC_AHB1ENR_GPIOAEN (1 << 0)
/* --- RCC_AHB2ENR values ------------------------------------------------- */ /* --- RCC_AHB2ENR values ------------------------------------------------- */
@ -368,15 +368,15 @@
#define RCC_AHB1LPENR_SRAM1LPEN (1 << 16) #define RCC_AHB1LPENR_SRAM1LPEN (1 << 16)
#define RCC_AHB1LPENR_FLITFLPEN (1 << 15) #define RCC_AHB1LPENR_FLITFLPEN (1 << 15)
#define RCC_AHB1LPENR_CRCLPEN (1 << 12) #define RCC_AHB1LPENR_CRCLPEN (1 << 12)
#define RCC_AHB1LPENR_IOPILPEN (1 << 8) #define RCC_AHB1LPENR_GPIOILPEN (1 << 8)
#define RCC_AHB1LPENR_IOPHLPEN (1 << 7) #define RCC_AHB1LPENR_GPIOHLPEN (1 << 7)
#define RCC_AHB1LPENR_IOPGLPEN (1 << 6) #define RCC_AHB1LPENR_GPIOGLPEN (1 << 6)
#define RCC_AHB1LPENR_IOPFLPEN (1 << 5) #define RCC_AHB1LPENR_GPIOFLPEN (1 << 5)
#define RCC_AHB1LPENR_IOPELPEN (1 << 4) #define RCC_AHB1LPENR_GPIOELPEN (1 << 4)
#define RCC_AHB1LPENR_IOPDLPEN (1 << 3) #define RCC_AHB1LPENR_GPIODLPEN (1 << 3)
#define RCC_AHB1LPENR_IOPCLPEN (1 << 2) #define RCC_AHB1LPENR_GPIOCLPEN (1 << 2)
#define RCC_AHB1LPENR_IOPBLPEN (1 << 1) #define RCC_AHB1LPENR_GPIOBLPEN (1 << 1)
#define RCC_AHB1LPENR_IOPALPEN (1 << 0) #define RCC_AHB1LPENR_GPIOALPEN (1 << 0)
/* --- RCC_AHB2LPENR values ------------------------------------------------- */ /* --- RCC_AHB2LPENR values ------------------------------------------------- */

66
include/libopencm3/stm32/f4/rcc.h
View File

@ -288,17 +288,17 @@
#define RCC_AHB1RSTR_DMA2RST (1 << 22) #define RCC_AHB1RSTR_DMA2RST (1 << 22)
#define RCC_AHB1RSTR_DMA1RST (1 << 21) #define RCC_AHB1RSTR_DMA1RST (1 << 21)
#define RCC_AHB1RSTR_CRCRST (1 << 12) #define RCC_AHB1RSTR_CRCRST (1 << 12)
#define RCC_AHB1RSTR_IOPKRST (1 << 10) #define RCC_AHB1RSTR_GPIOKRST (1 << 10)
#define RCC_AHB1RSTR_IOPJRST (1 << 9) #define RCC_AHB1RSTR_GPIOJRST (1 << 9)
#define RCC_AHB1RSTR_IOPIRST (1 << 8) #define RCC_AHB1RSTR_GPIOIRST (1 << 8)
#define RCC_AHB1RSTR_IOPHRST (1 << 7) #define RCC_AHB1RSTR_GPIOHRST (1 << 7)
#define RCC_AHB1RSTR_IOPGRST (1 << 6) #define RCC_AHB1RSTR_GPIOGRST (1 << 6)
#define RCC_AHB1RSTR_IOPFRST (1 << 5) #define RCC_AHB1RSTR_GPIOFRST (1 << 5)
#define RCC_AHB1RSTR_IOPERST (1 << 4) #define RCC_AHB1RSTR_GPIOERST (1 << 4)
#define RCC_AHB1RSTR_IOPDRST (1 << 3) #define RCC_AHB1RSTR_GPIODRST (1 << 3)
#define RCC_AHB1RSTR_IOPCRST (1 << 2) #define RCC_AHB1RSTR_GPIOCRST (1 << 2)
#define RCC_AHB1RSTR_IOPBRST (1 << 1) #define RCC_AHB1RSTR_GPIOBRST (1 << 1)
#define RCC_AHB1RSTR_IOPARST (1 << 0) #define RCC_AHB1RSTR_GPIOARST (1 << 0)
/* --- RCC_AHB2RSTR values ------------------------------------------------- */ /* --- RCC_AHB2RSTR values ------------------------------------------------- */
@ -380,17 +380,17 @@
#define RCC_AHB1ENR_CCMDATARAMEN (1 << 20) #define RCC_AHB1ENR_CCMDATARAMEN (1 << 20)
#define RCC_AHB1ENR_BKPSRAMEN (1 << 18) #define RCC_AHB1ENR_BKPSRAMEN (1 << 18)
#define RCC_AHB1ENR_CRCEN (1 << 12) #define RCC_AHB1ENR_CRCEN (1 << 12)
#define RCC_AHB1ENR_IOPKEN (1 << 10) #define RCC_AHB1ENR_GPIOKEN (1 << 10)
#define RCC_AHB1ENR_IOPJEN (1 << 9) #define RCC_AHB1ENR_GPIOJEN (1 << 9)
#define RCC_AHB1ENR_IOPIEN (1 << 8) #define RCC_AHB1ENR_GPIOIEN (1 << 8)
#define RCC_AHB1ENR_IOPHEN (1 << 7) #define RCC_AHB1ENR_GPIOHEN (1 << 7)
#define RCC_AHB1ENR_IOPGEN (1 << 6) #define RCC_AHB1ENR_GPIOGEN (1 << 6)
#define RCC_AHB1ENR_IOPFEN (1 << 5) #define RCC_AHB1ENR_GPIOFEN (1 << 5)
#define RCC_AHB1ENR_IOPEEN (1 << 4) #define RCC_AHB1ENR_GPIOEEN (1 << 4)
#define RCC_AHB1ENR_IOPDEN (1 << 3) #define RCC_AHB1ENR_GPIODEN (1 << 3)
#define RCC_AHB1ENR_IOPCEN (1 << 2) #define RCC_AHB1ENR_GPIOCEN (1 << 2)
#define RCC_AHB1ENR_IOPBEN (1 << 1) #define RCC_AHB1ENR_GPIOBEN (1 << 1)
#define RCC_AHB1ENR_IOPAEN (1 << 0) #define RCC_AHB1ENR_GPIOAEN (1 << 0)
/* --- RCC_AHB2ENR values ------------------------------------------------- */ /* --- RCC_AHB2ENR values ------------------------------------------------- */
@ -474,17 +474,17 @@
#define RCC_AHB1LPENR_SRAM1LPEN (1 << 16) #define RCC_AHB1LPENR_SRAM1LPEN (1 << 16)
#define RCC_AHB1LPENR_FLITFLPEN (1 << 15) #define RCC_AHB1LPENR_FLITFLPEN (1 << 15)
#define RCC_AHB1LPENR_CRCLPEN (1 << 12) #define RCC_AHB1LPENR_CRCLPEN (1 << 12)
#define RCC_AHB1LPENR_IOPKLPEN (1 << 10) #define RCC_AHB1LPENR_GPIOKLPEN (1 << 10)
#define RCC_AHB1LPENR_IOPJLPEN (1 << 9) #define RCC_AHB1LPENR_GPIOJLPEN (1 << 9)
#define RCC_AHB1LPENR_IOPILPEN (1 << 8) #define RCC_AHB1LPENR_GPIOILPEN (1 << 8)
#define RCC_AHB1LPENR_IOPHLPEN (1 << 7) #define RCC_AHB1LPENR_GPIOHLPEN (1 << 7)
#define RCC_AHB1LPENR_IOPGLPEN (1 << 6) #define RCC_AHB1LPENR_GPIOGLPEN (1 << 6)
#define RCC_AHB1LPENR_IOPFLPEN (1 << 5) #define RCC_AHB1LPENR_GPIOFLPEN (1 << 5)
#define RCC_AHB1LPENR_IOPELPEN (1 << 4) #define RCC_AHB1LPENR_GPIOELPEN (1 << 4)
#define RCC_AHB1LPENR_IOPDLPEN (1 << 3) #define RCC_AHB1LPENR_GPIODLPEN (1 << 3)
#define RCC_AHB1LPENR_IOPCLPEN (1 << 2) #define RCC_AHB1LPENR_GPIOCLPEN (1 << 2)
#define RCC_AHB1LPENR_IOPBLPEN (1 << 1) #define RCC_AHB1LPENR_GPIOBLPEN (1 << 1)
#define RCC_AHB1LPENR_IOPALPEN (1 << 0) #define RCC_AHB1LPENR_GPIOALPEN (1 << 0)
/* --- RCC_AHB2LPENR values ------------------------------------------------- */ /* --- RCC_AHB2LPENR values ------------------------------------------------- */