diff --git a/include/libopencm3/stm32/common/flash_common_f01.h b/include/libopencm3/stm32/common/flash_common_f01.h
index e765c3bd..d14a9709 100644
--- a/include/libopencm3/stm32/common/flash_common_f01.h
+++ b/include/libopencm3/stm32/common/flash_common_f01.h
@@ -98,8 +98,8 @@
 BEGIN_DECLS
 
 void flash_set_ws(uint32_t ws);
-void flash_prefetch_buffer_enable(void);
-void flash_prefetch_buffer_disable(void);
+void flash_prefetch_enable(void);
+void flash_prefetch_disable(void);
 void flash_unlock(void);
 void flash_lock(void);
 void flash_clear_pgerr_flag(void);
diff --git a/lib/stm32/common/flash_common_f01.c b/lib/stm32/common/flash_common_f01.c
index 8c1a79ac..b4ec8188 100644
--- a/lib/stm32/common/flash_common_f01.c
+++ b/lib/stm32/common/flash_common_f01.c
@@ -37,7 +37,7 @@ the power-on low frequency mode before being set to a higher speed mode.
 See the reference manual for details.
 */
 
-void flash_prefetch_buffer_enable(void)
+void flash_prefetch_enable(void)
 {
 	FLASH_ACR |= FLASH_ACR_PRFTBE;
 }
@@ -49,7 +49,7 @@ Note carefully the clock restrictions under which the prefetch buffer may be
 set to disabled. See the reference manual for details.
 */
 
-void flash_prefetch_buffer_disable(void)
+void flash_prefetch_disable(void)
 {
 	FLASH_ACR &= ~FLASH_ACR_PRFTBE;
 }
diff --git a/lib/stm32/f0/rcc.c b/lib/stm32/f0/rcc.c
index 410c7644..fa85aeaf 100644
--- a/lib/stm32/f0/rcc.c
+++ b/lib/stm32/f0/rcc.c
@@ -543,7 +543,7 @@ void rcc_clock_setup_in_hse_8mhz_out_48mhz(void)
 	rcc_set_hpre(RCC_CFGR_HPRE_NODIV);
 	rcc_set_ppre(RCC_CFGR_PPRE_NODIV);
 
-	flash_prefetch_buffer_enable();
+	flash_prefetch_enable();
 	flash_set_ws(FLASH_ACR_LATENCY_024_048MHZ);
 
 	/* PLL: 8MHz * 6 = 48MHz */
@@ -571,7 +571,7 @@ void rcc_clock_setup_in_hsi_out_48mhz(void)
 	rcc_set_hpre(RCC_CFGR_HPRE_NODIV);
 	rcc_set_ppre(RCC_CFGR_PPRE_NODIV);
 
-	flash_prefetch_buffer_enable();
+	flash_prefetch_enable();
 	flash_set_ws(FLASH_ACR_LATENCY_024_048MHZ);
 
 	/* 8MHz * 12 / 2 = 48MHz */
@@ -597,7 +597,7 @@ void rcc_clock_setup_in_hsi48_out_48mhz(void)
 	rcc_set_hpre(RCC_CFGR_HPRE_NODIV);
 	rcc_set_ppre(RCC_CFGR_PPRE_NODIV);
 
-	flash_prefetch_buffer_enable();
+	flash_prefetch_enable();
 	flash_set_ws(FLASH_ACR_LATENCY_024_048MHZ);
 
 	rcc_set_sysclk_source(RCC_HSI48);