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stm32f3: flash_common_f24 now includes f3 support. Also, renamed to f234.

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- Makefiles of other stm32s updated accordingly.
- f3/rcc.c updated to some definition changes.
- f3/flash.c removed in order to use flash_common_f234.c to comply with new organization.
This commit is contained in:
Federico Ruiz Ugalde 2013-06-26 04:44:47 -06:00 committed by Piotr Esden-Tempski
parent 74a313625f
commit efe08e4898
11 changed files with 98 additions and 323 deletions
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68
include/libopencm3/stm32/common/flash_common_f24.h → include/libopencm3/stm32/common/flash_common_f234.h
View File

@ -40,15 +40,27 @@
#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08) #define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C) #define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10) #define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
#if !defined(STM32F3)
#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14) #define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
#else
#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
#endif
/* --- FLASH_ACR values ---------------------------------------------------- */ /* --- FLASH_ACR values ---------------------------------------------------- */
#if !defined(STM32F3)
#define FLASH_ACR_DCRST (1 << 12) #define FLASH_ACR_DCRST (1 << 12)
#define FLASH_ACR_ICRST (1 << 11) #define FLASH_ACR_ICRST (1 << 11)
#define FLASH_ACR_DCE (1 << 10) #define FLASH_ACR_DCE (1 << 10)
#define FLASH_ACR_ICE (1 << 9) #define FLASH_ACR_ICE (1 << 9)
#define FLASH_ACR_PRFTEN (1 << 8) #define FLASH_ACR_PRFTEN (1 << 8)
#else
#define FLASH_ACR_PRFTBS (1 << 5)
#define FLASH_ACR_PRFTBE (1 << 4)
#define FLASH_ACR_HLFCYA (1 << 3)
#endif
#define FLASH_ACR_LATENCY_0WS 0x00 #define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01 #define FLASH_ACR_LATENCY_1WS 0x01
#define FLASH_ACR_LATENCY_2WS 0x02 #define FLASH_ACR_LATENCY_2WS 0x02
@ -60,6 +72,7 @@
/* --- FLASH_SR values ----------------------------------------------------- */ /* --- FLASH_SR values ----------------------------------------------------- */
#if !defined(STM32F3)
#define FLASH_SR_BSY (1 << 16) #define FLASH_SR_BSY (1 << 16)
#define FLASH_SR_PGSERR (1 << 7) #define FLASH_SR_PGSERR (1 << 7)
#define FLASH_SR_PGPERR (1 << 6) #define FLASH_SR_PGPERR (1 << 6)
@ -67,9 +80,17 @@
#define FLASH_SR_WRPERR (1 << 4) #define FLASH_SR_WRPERR (1 << 4)
#define FLASH_SR_OPERR (1 << 1) #define FLASH_SR_OPERR (1 << 1)
#define FLASH_SR_EOP (1 << 0) #define FLASH_SR_EOP (1 << 0)
#else
#define FLASH_SR_BSY (1 << 0)
#define FLASH_SR_ERLYBSY (1 << 1)
#define FLASH_SR_PGPERR (1 << 2)
#define FLASH_SR_WRPRTERR (1 << 4)
#define FLASH_SR_EOP (1 << 5)
#endif
/* --- FLASH_CR values ----------------------------------------------------- */ /* --- FLASH_CR values ----------------------------------------------------- */
#if !defined(STM32F3)
#define FLASH_CR_LOCK (1 << 31) #define FLASH_CR_LOCK (1 << 31)
#define FLASH_CR_ERRIE (1 << 25) #define FLASH_CR_ERRIE (1 << 25)
#define FLASH_CR_EOPIE (1 << 24) #define FLASH_CR_EOPIE (1 << 24)
@ -93,7 +114,21 @@
#define FLASH_CR_PROGRAM_X16 (0x01 << 8) #define FLASH_CR_PROGRAM_X16 (0x01 << 8)
#define FLASH_CR_PROGRAM_X32 (0x02 << 8) #define FLASH_CR_PROGRAM_X32 (0x02 << 8)
#define FLASH_CR_PROGRAM_X64 (0x03 << 8) #define FLASH_CR_PROGRAM_X64 (0x03 << 8)
#else
#define FLASH_CR_OBL_LAUNCH (1 << 13)
#define FLASH_CR_EOPIE (1 << 12)
#define FLASH_CR_ERRIE (1 << 10)
#define FLASH_CR_OPTWRE (1 << 9)
#define FLASH_CR_LOCK (1 << 7)
#define FLASH_CR_STRT (1 << 6)
#define FLASH_CR_OPTER (1 << 5)
#define FLASH_CR_OPTPG (1 << 4)
#define FLASH_CR_MER (1 << 2)
#define FLASH_CR_PER (1 << 1)
#define FLASH_CR_PG (1 << 0)
#endif
#if !defined(STM32F3)
/* --- FLASH_OPTCR values -------------------------------------------------- */ /* --- FLASH_OPTCR values -------------------------------------------------- */
/* FLASH_OPTCR[27:16]: nWRP */ /* FLASH_OPTCR[27:16]: nWRP */
@ -107,18 +142,35 @@
#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2) #define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2) #define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
#define FLASH_OPTCR_BOR_OFF (0x03 << 2) #define FLASH_OPTCR_BOR_OFF (0x03 << 2)
#endif
/* --- FLASH Keys -----------------------------------------------------------*/ /* --- FLASH Keys -----------------------------------------------------------*/
#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123) #define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab) #define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
#if !defined(STM32F3)
#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b) #define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f) #define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
#endif
/* --- Function prototypes ------------------------------------------------- */ /* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS BEGIN_DECLS
void flash_set_ws(uint32_t ws);
void flash_unlock(void);
void flash_lock(void);
void flash_clear_pgperr_flag(void);
void flash_clear_eop_flag(void);
void flash_clear_bsy_flag(void);
void flash_clear_status_flags(void);
void flash_wait_for_last_operation(void);
#if !defined(STM32F3)
void flash_unlock_option_bytes(void);
void flash_lock_option_bytes(void);
void flash_clear_pgserr_flag(void);
void flash_clear_wrperr_flag(void);
void flash_clear_pgaerr_flag(void);
void flash_dcache_enable(void); void flash_dcache_enable(void);
void flash_dcache_disable(void); void flash_dcache_disable(void);
void flash_icache_enable(void); void flash_icache_enable(void);
@ -127,18 +179,6 @@ void flash_prefetch_enable(void);
void flash_prefetch_disable(void); void flash_prefetch_disable(void);
void flash_dcache_reset(void); void flash_dcache_reset(void);
void flash_icache_reset(void); void flash_icache_reset(void);
void flash_set_ws(uint32_t ws);
void flash_unlock(void);
void flash_lock(void);
void flash_clear_pgserr_flag(void);
void flash_clear_pgperr_flag(void);
void flash_clear_pgaerr_flag(void);
void flash_clear_eop_flag(void);
void flash_clear_wrperr_flag(void);
void flash_clear_bsy_flag(void);
void flash_clear_status_flags(void);
void flash_unlock_option_bytes(void);
void flash_lock_option_bytes(void);
void flash_erase_all_sectors(uint32_t program_size); void flash_erase_all_sectors(uint32_t program_size);
void flash_erase_sector(uint8_t sector, uint32_t program_size); void flash_erase_sector(uint8_t sector, uint32_t program_size);
void flash_program_double_word(uint32_t address, uint64_t data); void flash_program_double_word(uint32_t address, uint64_t data);
@ -146,8 +186,8 @@ void flash_program_word(uint32_t address, uint32_t data);
void flash_program_half_word(uint32_t address, uint16_t data); void flash_program_half_word(uint32_t address, uint16_t data);
void flash_program_byte(uint32_t address, uint8_t data); void flash_program_byte(uint32_t address, uint8_t data);
void flash_program(uint32_t address, uint8_t *data, uint32_t len); void flash_program(uint32_t address, uint8_t *data, uint32_t len);
void flash_wait_for_last_operation(void);
void flash_program_option_bytes(uint32_t data); void flash_program_option_bytes(uint32_t data);
#endif
END_DECLS END_DECLS

2
include/libopencm3/stm32/f2/flash.h
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@ -19,7 +19,7 @@
#define LIBOPENCM3_FLASH_H #define LIBOPENCM3_FLASH_H
#include <libopencm3/stm32/memorymap.h> #include <libopencm3/stm32/memorymap.h>
#include <libopencm3/stm32/common/flash_common_f24.h> #include <libopencm3/stm32/common/flash_common_f234.h>
#endif #endif

103
include/libopencm3/stm32/f3/flash.h
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@ -1,9 +1,6 @@
/* /*
* This file is part of the libopencm3 project. * This file is part of the libopencm3 project.
* *
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
*
* This library is free software: you can redistribute it and/or modify * This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by * it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
@ -18,107 +15,11 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>. * along with this library. If not, see <http://www.gnu.org/licenses/>.
*/ */
/*
* For details see:
* PM0081 Programming manual: STM32F30xxx and STM32F31xxx Flash programming
* September 2011, Doc ID 018520 Rev 1
* http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/PROGRAMMING_MANUAL/DM00023388.pdf
*/
#ifndef LIBOPENCM3_FLASH_H #ifndef LIBOPENCM3_FLASH_H
#define LIBOPENCM3_FLASH_H #define LIBOPENCM3_FLASH_H
#include <libopencm3/stm32/memorymap.h> #include <libopencm3/stm32/memorymap.h>
#include <libopencm3/cm3/common.h> #include <libopencm3/stm32/common/flash_common_f234.h>
/* --- FLASH registers ----------------------------------------------------- */
#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01
#define FLASH_LATENCY_2WS 0x02
#define FLASH_LATENCY_3WS 0x03
#define FLASH_LATENCY_4WS 0x04
#define FLASH_LATENCY_5WS 0x05
#define FLASH_LATENCY_6WS 0x06
#define FLASH_LATENCY_7WS 0x07
#define FLASH_PRFTBS (1 << 5)
#define FLASH_PRFTBE (1 << 4)
#define FLASH_HLFCYA (1 << 3)
/* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_BSY (1 << 0)
#define FLASH_ERLYBSY (1 << 1)
#define FLASH_PGPERR (1 << 2)
#define FLASH_WRPRTERR (1 << 4)
#define FLASH_EOP (1 << 5)
/* --- FLASH_CR values ----------------------------------------------------- */
#define FLASH_OBL_LAUNCH (1 << 13)
#define FLASH_EOPIE (1 << 12)
#define FLASH_ERRIE (1 << 10)
#define FLASH_OPTWRE (1 << 9)
#define FLASH_LOCK (1 << 7)
#define FLASH_STRT (1 << 6)
#define FLASH_OPTER (1 << 5)
#define FLASH_OPTPG (1 << 4)
#define FLASH_MER (1 << 2)
#define FLASH_PER (1 << 1)
#define FLASH_PG (1 << 0)
/* --- FLASH_OBR values ----------------------------------------------------- */
#define FLASH_OPTERR (1 << 0)
#define FLASH_RDPRT1 (1 << 1)
#define FLASH_RDPRT2 (1 << 2)
#define FLASH_WDG_SW (1 << 8)
#define FLASH_NRST_STOP (1 << 9)
#define FLASH_NRST_STDBY (1 << 10)
#define FLASH_NBOOT1 (1 << 12)
#define FLASH_VDDA_MONITOR (1 << 13)
#define FLASH_SRAM_PE (1 << 14)
/* --- FLASH Keys -----------------------------------------------------------*/
#define FLASH_KEY1 ((uint32_t)0x45670123)
#define FLASH_KEY2 ((uint32_t)0xcdef89ab)
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void flash_set_ws(uint32_t ws);
void flash_unlock(void);
void flash_lock(void);
void flash_clear_pgperr_flag(void);
void flash_clear_eop_flag(void);
void flash_clear_bsy_flag(void);
void flash_clear_status_flags(void);
/* Functions deactivated, please read flash.c for the reasons */
/* void flash_erase_all_pages(uint32_t program_size); */
/* void flash_erase_page(uint32_t page, uint32_t program_size); */
/* void flash_program_double_word(uint32_t address, uint64_t data, uint32_t program_size); */
/* void flash_program_word(uint32_t address, uint32_t data, uint32_t program_size); */
/* void flash_program_half_word(uint32_t address, uint16_t data, uint32_t program_size); */
/* void flash_program_byte(uint32_t address, uint8_t data, uint32_t program_size); */
void flash_wait_for_last_operation(void);
void flash_program_option_bytes(uint32_t data);
END_DECLS
#endif #endif

2
include/libopencm3/stm32/f4/flash.h
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@ -19,7 +19,7 @@
#define LIBOPENCM3_FLASH_H #define LIBOPENCM3_FLASH_H
#include <libopencm3/stm32/memorymap.h> #include <libopencm3/stm32/memorymap.h>
#include <libopencm3/stm32/common/flash_common_f24.h> #include <libopencm3/stm32/common/flash_common_f234.h>
#endif #endif

2
include/libopencm3/stm32/flash.h
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@ -21,6 +21,8 @@
# include <libopencm3/stm32/f1/flash.h> # include <libopencm3/stm32/f1/flash.h>
#elif defined(STM32F2) #elif defined(STM32F2)
# include <libopencm3/stm32/f2/flash.h> # include <libopencm3/stm32/f2/flash.h>
#elif defined(STM32F3)
# include <libopencm3/stm32/f3/flash.h>
#elif defined(STM32F4) #elif defined(STM32F4)
# include <libopencm3/stm32/f4/flash.h> # include <libopencm3/stm32/f4/flash.h>
#elif defined(STM32L1) #elif defined(STM32L1)

54
lib/stm32/common/flash_common_f24.c → lib/stm32/common/flash_common_f234.c
View File

@ -20,6 +20,7 @@
#include <libopencm3/stm32/flash.h> #include <libopencm3/stm32/flash.h>
#if !defined(STM32F3)
static inline void flash_set_program_size(uint32_t psize) static inline void flash_set_program_size(uint32_t psize)
{ {
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8); FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
@ -66,6 +67,24 @@ void flash_icache_reset(void)
FLASH_ACR |= FLASH_ACR_ICRST; FLASH_ACR |= FLASH_ACR_ICRST;
} }
void flash_clear_pgserr_flag(void)
{
FLASH_SR |= FLASH_SR_PGSERR;
}
void flash_clear_pgaerr_flag(void)
{
FLASH_SR |= FLASH_SR_PGAERR;
}
void flash_clear_wrperr_flag(void)
{
FLASH_SR |= FLASH_SR_WRPERR;
}
#endif
void flash_set_ws(uint32_t ws) void flash_set_ws(uint32_t ws)
{ {
uint32_t reg32; uint32_t reg32;
@ -91,31 +110,16 @@ void flash_lock(void)
FLASH_CR |= FLASH_CR_LOCK; FLASH_CR |= FLASH_CR_LOCK;
} }
void flash_clear_pgserr_flag(void)
{
FLASH_SR |= FLASH_SR_PGSERR;
}
void flash_clear_pgperr_flag(void) void flash_clear_pgperr_flag(void)
{ {
FLASH_SR |= FLASH_SR_PGPERR; FLASH_SR |= FLASH_SR_PGPERR;
} }
void flash_clear_pgaerr_flag(void)
{
FLASH_SR |= FLASH_SR_PGAERR;
}
void flash_clear_eop_flag(void) void flash_clear_eop_flag(void)
{ {
FLASH_SR |= FLASH_SR_EOP; FLASH_SR |= FLASH_SR_EOP;
} }
void flash_clear_wrperr_flag(void)
{
FLASH_SR |= FLASH_SR_WRPERR;
}
void flash_clear_bsy_flag(void) void flash_clear_bsy_flag(void)
{ {
FLASH_SR &= ~FLASH_SR_BSY; FLASH_SR &= ~FLASH_SR_BSY;
@ -123,14 +127,23 @@ void flash_clear_bsy_flag(void)
void flash_clear_status_flags(void) void flash_clear_status_flags(void)
{ {
#if !defined(STM32F3)
flash_clear_pgserr_flag(); flash_clear_pgserr_flag();
flash_clear_pgperr_flag();
flash_clear_pgaerr_flag(); flash_clear_pgaerr_flag();
flash_clear_eop_flag();
flash_clear_wrperr_flag(); flash_clear_wrperr_flag();
#endif
flash_clear_pgperr_flag();
flash_clear_eop_flag();
flash_clear_bsy_flag(); flash_clear_bsy_flag();
} }
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
}
#if !defined(STM32F3)
void flash_unlock_option_bytes(void) void flash_unlock_option_bytes(void)
{ {
/* Clear the unlock state. */ /* Clear the unlock state. */
@ -146,11 +159,6 @@ void flash_lock_option_bytes(void)
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK; FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
} }
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
}
void flash_program_double_word(uint32_t address, uint64_t data) void flash_program_double_word(uint32_t address, uint64_t data)
{ {
/* Ensure that all flash operations are complete. */ /* Ensure that all flash operations are complete. */
@ -267,3 +275,5 @@ void flash_program_option_bytes(uint32_t data)
FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte prog. */ FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte prog. */
flash_wait_for_last_operation(); flash_wait_for_last_operation();
} }
#endif

2
lib/stm32/f2/Makefile
View File

@ -39,7 +39,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \ gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \ iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \
timer_common_all.o timer_common_f24.o usart_common_all.o \ timer_common_all.o timer_common_f24.o usart_common_all.o \
flash_common_f24.o hash_common_f24.o crypto_common_f24.o flash_common_f234.o hash_common_f24.o crypto_common_f24.o
VPATH += ../../usb:../:../../cm3:../common VPATH += ../../usb:../:../../cm3:../common

4
lib/stm32/f3/Makefile
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@ -34,12 +34,12 @@ CFLAGS = -Os -g \
# ARFLAGS = rcsv # ARFLAGS = rcsv
ARFLAGS = rcs ARFLAGS = rcs
OBJS = rcc.o gpio.o flash.o adc.o exti2.o OBJS = rcc.o gpio.o adc.o exti2.o
OBJS += gpio_common_all.o gpio_common_f234.o i2c_common_all.o\ OBJS += gpio_common_all.o gpio_common_f234.o i2c_common_all.o\
dac_common_all.o usart_common_all.o crc_common_all.o\ dac_common_all.o usart_common_all.o crc_common_all.o\
iwdg_common_all.o spi_common_all.o dma_common_f13.o\ iwdg_common_all.o spi_common_all.o dma_common_f13.o\
timer_common_all.o timer_common_f24.o timer_common_all.o timer_common_f24.o flash_common_f234.o
VPATH += ../../usb:../:../../cm3:../common VPATH += ../../usb:../:../../cm3:../common

178
lib/stm32/f3/flash.c
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@ -1,178 +0,0 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/f3/flash.h>
/* This function is probably wrong, since deactivated. Please check and fix!
static inline void flash_set_program_size(uint32_t psize)
{
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
FLASH_CR |= psize;
}
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
reg32 |= ws;
FLASH_ACR = reg32;
}
void flash_unlock(void)
{
/* Authorize the FPEC access. */
FLASH_KEYR = FLASH_KEY1;
FLASH_KEYR = FLASH_KEY2;
}
void flash_lock(void)
{
FLASH_CR |= FLASH_LOCK;
}
void flash_clear_pgperr_flag(void)
{
FLASH_SR |= FLASH_PGPERR;
}
void flash_clear_eop_flag(void)
{
FLASH_SR |= FLASH_EOP;
}
void flash_clear_bsy_flag(void)
{
FLASH_SR &= ~FLASH_BSY;
}
void flash_clear_status_flags(void)
{
flash_clear_pgperr_flag();
flash_clear_eop_flag();
flash_clear_bsy_flag();
}
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_BSY) == FLASH_BSY)
;
}
/* Functions deactivated because flash_set_program_size function may not be */
/* working well */
/* void flash_program_double_word(uint32_t address, u64 data, uint32_t program_size) */
/* { */
/* /\* Ensure that all flash operations are complete. *\/ */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* /\* Enable writes to flash. *\/ */
/* FLASH_CR |= FLASH_PG; */
/* /\* Program the first half of the word. *\/ */
/* MMIO64(address) = data; */
/* /\* Wait for the write to complete. *\/ */
/* flash_wait_for_last_operation(); */
/* /\* Disable writes to flash. *\/ */
/* FLASH_CR &= ~FLASH_PG; */
/* } */
/* void flash_program_word(uint32_t address, uint32_t data, uint32_t program_size) */
/* { */
/* /\* Ensure that all flash operations are complete. *\/ */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* /\* Enable writes to flash. *\/ */
/* FLASH_CR |= FLASH_PG; */
/* /\* Program the first half of the word. *\/ */
/* MMIO32(address) = data; */
/* /\* Wait for the write to complete. *\/ */
/* flash_wait_for_last_operation(); */
/* /\* Disable writes to flash. *\/ */
/* FLASH_CR &= ~FLASH_PG; */
/* } */
/* void flash_program_half_word(uint32_t address, u16 data, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_PG; */
/* MMIO16(address) = data; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PG; /\* Disable the PG bit. *\/ */
/* } */
/* void flash_program_byte(uint32_t address, u8 data, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_PG; */
/* MMIO8(address) = data; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PG; /\* Disable the PG bit. *\/ */
/* } */
/* void flash_erase_page(uint32_t page, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); */
/* FLASH_CR |= page; */
/* FLASH_CR |= FLASH_PER; */
/* FLASH_CR |= FLASH_STRT; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PER; */
/* FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); */
/* } */
/* void flash_erase_all_pages(uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_MER; /\* Enable mass erase. *\/ */
/* FLASH_CR |= FLASH_STRT; /\* Trigger the erase. *\/ */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_MER; /\* Disable mass erase. *\/ */
/* } */

4
lib/stm32/f3/rcc.c
View File

@ -38,7 +38,7 @@ const clock_scale_t hsi_8mhz[CLOCK_END] =
.ppre1 = RCC_CFGR_PPRE1_DIV_2, .ppre1 = RCC_CFGR_PPRE1_DIV_2,
.ppre2 = RCC_CFGR_PPRE2_DIV_NONE, .ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
.power_save = 1, .power_save = 1,
.flash_config = FLASH_PRFTBE | FLASH_LATENCY_2WS, .flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2WS,
.apb1_frequency = 22000000, .apb1_frequency = 22000000,
.apb2_frequency = 44000000, .apb2_frequency = 44000000,
}, },
@ -49,7 +49,7 @@ const clock_scale_t hsi_8mhz[CLOCK_END] =
.ppre1 = RCC_CFGR_PPRE1_DIV_2, .ppre1 = RCC_CFGR_PPRE1_DIV_2,
.ppre2 = RCC_CFGR_PPRE2_DIV_NONE, .ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
.power_save = 1, .power_save = 1,
.flash_config = FLASH_PRFTBE| FLASH_LATENCY_3WS, .flash_config = FLASH_ACR_PRFTBE| FLASH_ACR_LATENCY_3WS,
.apb1_frequency = 32000000, .apb1_frequency = 32000000,
.apb2_frequency = 64000000, .apb2_frequency = 64000000,
} }

2
lib/stm32/f4/Makefile
View File

@ -40,7 +40,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \ gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \ iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \
spi_common_all.o timer_common_all.o timer_common_f24.o \ spi_common_all.o timer_common_all.o timer_common_f24.o \
usart_common_all.o flash_common_f24.o hash_common_f24.o \ usart_common_all.o flash_common_f234.o hash_common_f24.o \
crypto_common_f24.o crypto_common_f24.o
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \ OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \