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stm32: Fix typo in RCC related comments

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ABP -> APB

Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
This commit is contained in:
Sam Protsenko 2019-12-15 23:03:53 +02:00 committed by Karl Palsson
parent df15b263d2
commit f7a952c41a
6 changed files with 16 additions and 16 deletions
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16
lib/stm32/f1/rcc.c
View File

@ -628,7 +628,7 @@ void rcc_clock_setup_in_hsi_out_64mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSICLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 64MHz Max. 72MHz */
@ -681,7 +681,7 @@ void rcc_clock_setup_in_hsi_out_48mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSICLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /*Set.48MHz Max.72MHz */
@ -735,7 +735,7 @@ void rcc_clock_setup_in_hsi_out_24mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSICLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 24MHz Max. 24MHz */
@ -793,7 +793,7 @@ void rcc_clock_setup_in_hse_8mhz_out_24mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 24MHz Max. 72MHz */
@ -857,7 +857,7 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 72MHz Max. 72MHz */
@ -921,7 +921,7 @@ void rcc_clock_setup_in_hse_12mhz_out_72mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 72MHz Max. 72MHz */
@ -985,7 +985,7 @@ void rcc_clock_setup_in_hse_16mhz_out_72mhz(void)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 72MHz Max. 72MHz */
@ -1050,7 +1050,7 @@ void rcc_clock_setup_in_hse_25mhz_out_72mhz(void)
flash_set_ws(FLASH_ACR_LATENCY_2WS);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 72MHz Max. 72MHz */

2
lib/stm32/f2/rcc.c
View File

@ -348,7 +348,7 @@ void rcc_clock_setup_hse_3v3(const struct rcc_clock_scale *clock)
rcc_wait_for_osc_ready(RCC_HSE);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);

2
lib/stm32/f3/rcc.c
View File

@ -418,7 +418,7 @@ void __attribute__((deprecated)) rcc_clock_setup_hsi(const struct rcc_clock_scal
rcc_osc_on(RCC_PLL);
rcc_wait_for_osc_ready(RCC_PLL);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);

2
lib/stm32/f4/rcc.c
View File

@ -726,7 +726,7 @@ void rcc_clock_setup_pll(const struct rcc_clock_scale *clock)
pwr_set_vos_scale(clock->voltage_scale);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);

6
lib/stm32/f7/rcc.c
View File

@ -396,7 +396,7 @@ void rcc_clock_setup_hse(const struct rcc_clock_scale *clock, uint32_t hse_mhz)
}
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);
@ -453,7 +453,7 @@ void rcc_clock_setup_hsi(const struct rcc_clock_scale *clock)
}
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);
@ -484,4 +484,4 @@ void rcc_clock_setup_hsi(const struct rcc_clock_scale *clock)
rcc_apb2_frequency = clock->apb2_frequency;
}
/**@}*/
/**@}*/

4
lib/stm32/l1/rcc.c
View File

@ -439,7 +439,7 @@ void rcc_clock_setup_msi(const struct rcc_clock_scale *clock)
rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_MSICLK);
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);
@ -520,7 +520,7 @@ void rcc_clock_setup_pll(const struct rcc_clock_scale *clock)
}
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Set prescalers for AHB, ADC, APB1, APB2.
* Do this before touching the PLL (TODO: why?).
*/
rcc_set_hpre(clock->hpre);