diff --git a/Makefile b/Makefile
index 6b7cc83f..daf5dc7c 100644
--- a/Makefile
+++ b/Makefile
@@ -32,7 +32,7 @@ SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts
INSTALL = install
SRCLIBDIR = $(shell pwd)/lib
-TARGETS = stm32/f1 stm32/f2 stm32/f4 stm32/l1 lpc13xx lpc17xx lpc43xx lm3s efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg
+TARGETS = stm32/f1 stm32/f2 stm32/f4 stm32/l1 lpc13xx lpc17xx lpc43xx lm3s lm4f efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg
# Be silent per default, but 'make V=1' will show all compiler calls.
ifneq ($(V),1)
diff --git a/doc/Doxyfile b/doc/Doxyfile
index 75f01f81..f5380da0 100644
--- a/doc/Doxyfile
+++ b/doc/Doxyfile
@@ -24,6 +24,7 @@ TAGFILES = ./cm3/cm3.tag=../cm3/html \
./stm32f1/stm32f1.tag=../stm32f1/html \
./stm32f4/stm32f4.tag=../stm32f4/html \
./lm3s/lm3s.tag=../lm3s/html \
+ ./lm4f/lm4f.tag=../lm4f/html \
./lpc13xx/lpc13xx.tag=../lpc13xx/html \
./lpc17xx/lpc17xx.tag=../lpc17xx/html \
./lpc43xx/lpc43xx.tag=../lpc43xx/html
diff --git a/doc/DoxygenLayout.xml b/doc/DoxygenLayout.xml
index b97c54da..a6026520 100644
--- a/doc/DoxygenLayout.xml
+++ b/doc/DoxygenLayout.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/Makefile b/doc/Makefile
index a9b44388..ee6b2bb3 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -5,7 +5,7 @@
doc: html latex
-html: cm3 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg lm3s lpc13 lpc17 lpc43 top
+html: cm3 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg lm3s lm4f lpc13 lpc17 lpc43 top
cm3:
cd cm3/; doxygen
@@ -13,6 +13,9 @@ cm3:
lm3s:
cd lm3s/; doxygen
+lm4f:
+ cd lm4f/; doxygen
+
efm32g:
cd efm32g/; doxygen
@@ -49,7 +52,7 @@ stm32l1:
top:
doxygen
-latex: stm32l1.pdf stm32f1.pdf stm32f2.pdf stm32f4.pdf lm3s.pdf lpc13.pdf lpc17.pdf lpc43.pdf efm32g.pdf efm32gg.pdf efm32lg.pdf efm32tg.pdf
+latex: stm32l1.pdf stm32f1.pdf stm32f2.pdf stm32f4.pdf lm3s.pdf lm4f.pdf lpc13.pdf lpc17.pdf lpc43.pdf efm32g.pdf efm32gg.pdf efm32lg.pdf efm32tg.pdf
stm32l1.pdf:
cd stm32l1/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../stm32l1.pdf
@@ -66,6 +69,9 @@ stm32f4.pdf:
lm3s.pdf:
cd lm3s/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../lm3s.pdf
+lm4f.pdf:
+ cd lm4f/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../lm4f.pdf
+
lpc13.pdf:
cd lpc13xx/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../lpc13.pdf
@@ -90,5 +96,5 @@ efm32tg.pdf:
clean:
@rm -rf html/ */html/ */latex/ *.pdf */*.tag
-.PHONY: doc html cm3 lm3s lpc13 lpc17 lpc43 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg top latex
+.PHONY: doc html cm3 lm3s lm4f lpc13 lpc17 lpc43 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg top latex
diff --git a/doc/cm3/DoxygenLayout_cm3.xml b/doc/cm3/DoxygenLayout_cm3.xml
index 275846e8..66ed9f33 100644
--- a/doc/cm3/DoxygenLayout_cm3.xml
+++ b/doc/cm3/DoxygenLayout_cm3.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/efm32g/DoxygenLayout_efm32g.xml b/doc/efm32g/DoxygenLayout_efm32g.xml
index 32a668d6..1ec60aaf 100644
--- a/doc/efm32g/DoxygenLayout_efm32g.xml
+++ b/doc/efm32g/DoxygenLayout_efm32g.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/efm32gg/DoxygenLayout_efm32gg.xml b/doc/efm32gg/DoxygenLayout_efm32gg.xml
index 09b37432..89b43a40 100644
--- a/doc/efm32gg/DoxygenLayout_efm32gg.xml
+++ b/doc/efm32gg/DoxygenLayout_efm32gg.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/efm32lg/DoxygenLayout_efm32lg.xml b/doc/efm32lg/DoxygenLayout_efm32lg.xml
index dd5a712a..d1e29749 100644
--- a/doc/efm32lg/DoxygenLayout_efm32lg.xml
+++ b/doc/efm32lg/DoxygenLayout_efm32lg.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/efm32tg/DoxygenLayout_efm32tg.xml b/doc/efm32tg/DoxygenLayout_efm32tg.xml
index afab4c7c..63811df6 100644
--- a/doc/efm32tg/DoxygenLayout_efm32tg.xml
+++ b/doc/efm32tg/DoxygenLayout_efm32tg.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/lm3s/DoxygenLayout_lm3s.xml b/doc/lm3s/DoxygenLayout_lm3s.xml
index f70a4c1c..1077ee5b 100644
--- a/doc/lm3s/DoxygenLayout_lm3s.xml
+++ b/doc/lm3s/DoxygenLayout_lm3s.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/lm4f/Doxyfile b/doc/lm4f/Doxyfile
new file mode 100644
index 00000000..183338c4
--- /dev/null
+++ b/doc/lm4f/Doxyfile
@@ -0,0 +1,27 @@
+# HTML Documentation for LM3S code level
+
+# 14 September 2012
+# (C) Ken Sarkies
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_lm4f.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/lm4f \
+ ../../lib/lm4f
+
+LAYOUT_FILE = DoxygenLayout_lm4f.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html
+
+GENERATE_TAGFILE = lm4f.tag
+
diff --git a/doc/lm4f/Doxyfile_latex b/doc/lm4f/Doxyfile_latex
new file mode 100644
index 00000000..da3c0dd5
--- /dev/null
+++ b/doc/lm4f/Doxyfile_latex
@@ -0,0 +1,33 @@
+# LaTeX Documentation for LM3S code level
+
+# 14 September 2012
+# Copyright (C) Ken Sarkies
+# Copyright (C) 2012 Alexandru Gagniuc
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_lm4f_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/lm4f \
+ ../../lib/lm4f
+
+EXCLUDE = ../../include/libopencm3/lm4f/doc-lm4f.h
+
+LAYOUT_FILE = DoxygenLayout_lm4f.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_lm4f.tex
+
diff --git a/doc/lm4f/DoxygenLayout_lm4f.xml b/doc/lm4f/DoxygenLayout_lm4f.xml
new file mode 100644
index 00000000..43e51f62
--- /dev/null
+++ b/doc/lm4f/DoxygenLayout_lm4f.xml
@@ -0,0 +1,198 @@
+
+
+
+
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diff --git a/doc/lm4f/header_lm4f.tex b/doc/lm4f/header_lm4f.tex
new file mode 100644
index 00000000..68f02bad
--- /dev/null
+++ b/doc/lm4f/header_lm4f.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ TI LM4f ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/doc/lpc13xx/DoxygenLayout_lpc13xx.xml b/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
index adb366ce..370eb9f9 100644
--- a/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
+++ b/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/lpc17xx/DoxygenLayout_lpc17xx.xml b/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
index b1c6d346..098edea3 100644
--- a/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
+++ b/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/lpc43xx/DoxygenLayout_lpc43xx.xml b/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
index 197a488e..e8320791 100644
--- a/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
+++ b/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/stm32f1/DoxygenLayout_stm32f1.xml b/doc/stm32f1/DoxygenLayout_stm32f1.xml
index 4f63cebe..c3dfdf22 100644
--- a/doc/stm32f1/DoxygenLayout_stm32f1.xml
+++ b/doc/stm32f1/DoxygenLayout_stm32f1.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/stm32f2/DoxygenLayout_stm32f2.xml b/doc/stm32f2/DoxygenLayout_stm32f2.xml
index 7c43e915..b7d810a9 100644
--- a/doc/stm32f2/DoxygenLayout_stm32f2.xml
+++ b/doc/stm32f2/DoxygenLayout_stm32f2.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/stm32f4/DoxygenLayout_stm32f4.xml b/doc/stm32f4/DoxygenLayout_stm32f4.xml
index d8fdc8be..ce247bf2 100644
--- a/doc/stm32f4/DoxygenLayout_stm32f4.xml
+++ b/doc/stm32f4/DoxygenLayout_stm32f4.xml
@@ -10,6 +10,7 @@
+
diff --git a/doc/stm32l1/DoxygenLayout_stm32l1.xml b/doc/stm32l1/DoxygenLayout_stm32l1.xml
index 5d288e6b..86ee511a 100644
--- a/doc/stm32l1/DoxygenLayout_stm32l1.xml
+++ b/doc/stm32l1/DoxygenLayout_stm32l1.xml
@@ -10,6 +10,7 @@
+
diff --git a/examples/lm4f/Makefile.include b/examples/lm4f/Makefile.include
new file mode 100644
index 00000000..60987e8d
--- /dev/null
+++ b/examples/lm4f/Makefile.include
@@ -0,0 +1,139 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann
+## Copyright (C) 2010 Piotr Esden-Tempski
+## Copyright (C) 2012 Alexandru Gagniuc
+##
+## This library is free software: you can redistribute it and/or modify
+## it undebipr the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see .
+##
+
+PREFIX ?= arm-none-eabi
+CC = $(PREFIX)-gcc
+LD = $(PREFIX)-gcc
+OBJCOPY = $(PREFIX)-objcopy
+OBJDUMP = $(PREFIX)-objdump
+
+TOOLCHAIN_DIR ?= ../../../..
+ifeq ($(wildcard ../../../../lib/libopencm3_lm4f.a),)
+ifneq ($(strip $(shell which $(CC))),)
+TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX)
+endif
+else
+ifeq ($(V),1)
+$(info We seem to be building the example in the source directory. Using local library!)
+endif
+endif
+
+ARCH_FLAGS = -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
+CFLAGS += -O0 -g3 -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \
+ -fno-common $(ARCH_FLAGS) -MD -DLM4F
+LDSCRIPT ?= $(BINARY).ld
+LDFLAGS += --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \
+ -L$(TOOLCHAIN_DIR)/lib \
+ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \
+ $(ARCH_FLAGS)
+
+OBJS += $(BINARY).o
+
+# Support for ICDI is not in any openocd release as of yet
+# A patch to add support for ICDI is under review
+OOCD ?= openocd
+OOCD_INTERFACE ?= ti-icdi
+# No official board.cfg for the stellaris launchpad
+OOCD_BOARD ?= stellaris_launchpad
+
+# Be silent per default, but 'make V=1' will show all compiler calls.
+ifneq ($(V),1)
+Q := @
+NULL := 2>/dev/null
+else
+LDFLAGS += -Wl,--print-gc-sections
+endif
+
+.SUFFIXES: .elf .bin .hex .srec .list .images
+.SECONDEXPANSION:
+.SECONDARY:
+
+all: images
+
+images: $(BINARY).images
+flash: $(BINARY).flash
+
+%.images: %.bin %.hex %.srec %.list
+ @#echo "*** $* images generated ***"
+
+%.bin: %.elf
+ @#printf " OBJCOPY $(*).bin\n"
+ $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
+
+%.hex: %.elf
+ @#printf " OBJCOPY $(*).hex\n"
+ $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex
+
+%.srec: %.elf
+ @#printf " OBJCOPY $(*).srec\n"
+ $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec
+
+%.list: %.elf
+ @#printf " OBJDUMP $(*).list\n"
+ $(Q)$(OBJDUMP) -S $(*).elf > $(*).list
+
+%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/libopencm3_lm4f.a
+ @#printf " LD $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_lm4f $(LDFLAGS)
+
+%.o: %.c Makefile
+ @#printf " CC $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
+clean:
+ $(Q)rm -f *.o
+ $(Q)rm -f *.d
+ $(Q)rm -f *.elf
+ $(Q)rm -f *.bin
+ $(Q)rm -f *.hex
+ $(Q)rm -f *.srec
+ $(Q)rm -f *.list
+
+# FIXME: Replace STM32 stuff with proper Stellaris support.
+ifeq ($(OOCD_SERIAL),)
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "init" -c "reset init" \
+ -c "stm32x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+else
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "ft2232_serial $(OOCD_SERIAL)" \
+ -c "init" -c "reset init" \
+ -c "stm32x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+endif
+
+.PHONY: images clean
+
+-include $(OBJS:.o=.d)
+
diff --git a/examples/lm4f/stellaris-ek-lm4f120xl/ek-lm4f120xl.ld b/examples/lm4f/stellaris-ek-lm4f120xl/ek-lm4f120xl.ld
new file mode 100644
index 00000000..8a096fab
--- /dev/null
+++ b/examples/lm4f/stellaris-ek-lm4f120xl/ek-lm4f120xl.ld
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Uwe Hermann
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+/* Linker script for TI Stellaris EX-LM4F120XL evaluation board. */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x00000000, LENGTH = 256K
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
+}
+
+/* Include the common ld script. */
+INCLUDE libopencm3_lm4f.ld
+
diff --git a/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/Makefile b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/Makefile
new file mode 100644
index 00000000..9a014a74
--- /dev/null
+++ b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2012 Alexandru Gagniuc
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see .
+##
+
+BINARY = miniblink
+
+LDSCRIPT = ../ek-lm4f120xl.ld
+
+include ../../Makefile.include
+
diff --git a/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/README b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/README
new file mode 100644
index 00000000..f6441bec
--- /dev/null
+++ b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/README
@@ -0,0 +1,9 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+Flashes the Red, Green and Blue diodes on the board, in order.
+RED controlled by PF1
+Green controlled by PF3
+Blue controlled by PF2
+
diff --git a/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/miniblink.c b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/miniblink.c
new file mode 100644
index 00000000..0231a905
--- /dev/null
+++ b/examples/lm4f/stellaris-ek-lm4f120xl/miniblink/miniblink.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin
+ * Copyright (C) 2012 Alexandru Gagniuc
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+/**
+ * \addtogroup Examples
+ *
+ * Flashes the Red, Green and Blue diodes on the board, in order.
+ *
+ * RED controlled by PF1
+ * Green controlled by PF3
+ * Blue controlled by PF2
+ */
+#include
+#include
+
+void gpio_setup(void)
+{
+ SYSCTL_RCGCGPIO |= 0x20; /* Enable GPIOF in run mode. */
+ const u32 outpins = ((1<<3) | (1<<2) | (1<<1));
+
+ GPIO_DIR(GPIOF) |= outpins; /* Configure outputs. */
+ GPIO_DEN(GPIOF) |= outpins; /* Enable digital function on outputs. */
+}
+
+#define FLASH_DELAY 800000
+int main(void)
+{
+ int i;
+
+ gpio_setup();
+
+ /* Blink STATUS LED (PF0) on the board. */
+ while (1) {
+ /*
+ * Flash the Red diode
+ */
+ gpio_set(GPIOF, GPIO1);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+
+ gpio_clear(GPIOF, GPIO1);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+
+ /*
+ * Flash the Green diode
+ */
+ gpio_set(GPIOF, GPIO3);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+
+ gpio_clear(GPIOF, GPIO3);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+
+ /*
+ * Flash the Blue diode
+ */
+ gpio_set(GPIOF, GPIO2);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+
+ gpio_clear(GPIOF, GPIO2);
+
+ for (i = 0; i < FLASH_DELAY; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/include/libopencm3/dispatch/nvic.h b/include/libopencm3/dispatch/nvic.h
index 08074e31..c671d094 100644
--- a/include/libopencm3/dispatch/nvic.h
+++ b/include/libopencm3/dispatch/nvic.h
@@ -23,7 +23,8 @@
#elif defined(LPC43XX)
# include
-#elif defined(LM3S)
+#elif defined(LM3S) || defined(LM4F)
+/* Yes, we use the same interrupt table for both LM3S and LM4F */
# include
#else
diff --git a/include/libopencm3/lm3s/irq.yaml b/include/libopencm3/lm3s/irq.yaml
index 7d5ff3a5..15abb81d 100644
--- a/include/libopencm3/lm3s/irq.yaml
+++ b/include/libopencm3/lm3s/irq.yaml
@@ -1,3 +1,8 @@
+# Although this says LM3S, the interrupt table applies to the LM4F as well
+# Some interrupt vectores marked as reserved in LM3S are used in LM4F, and some
+# vectors in LM3S are marked reserved for LM4F. However, the common vectors are
+# identical, and we can safely use the same interrupt table. Reserved vectors
+# will never be triggered, so having them is perfectly safe.
includeguard: LIBOPENCM3_LM3S_NVIC_H
partname_humanreadable: LM3S series
partname_doxygen: LM3S
diff --git a/include/libopencm3/lm4f/doc-lm4f.h b/include/libopencm3/lm4f/doc-lm4f.h
new file mode 100644
index 00000000..130da54d
--- /dev/null
+++ b/include/libopencm3/lm4f/doc-lm4f.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 LM4F
+
+@version 1.0.0
+
+@date 22 November 2012
+
+API documentation for TI Stellaris LM4F Cortex M4F series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LM4F LM4F
+Libraries for TI Stellaris LM4F series.
+
+@version 1.0.0
+
+@date 22 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LM4F_defines LM4F Defines
+
+@brief Defined Constants and Types for the LM4F series
+
+@version 1.0.0
+
+@date 22 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/include/libopencm3/lm4f/gpio.h b/include/libopencm3/lm4f/gpio.h
new file mode 100644
index 00000000..19987c7a
--- /dev/null
+++ b/include/libopencm3/lm4f/gpio.h
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+#ifndef LM4F_GPIO_H
+#define LM4F_GPIO_H
+
+#include
+#include
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+#define GPIOA GPIOA_APB_BASE
+#define GPIOB GPIOB_APB_BASE
+#define GPIOC GPIOC_APB_BASE
+#define GPIOD GPIOD_APB_BASE
+#define GPIOE GPIOE_APB_BASE
+#define GPIOF GPIOF_APB_BASE
+#define GPIOG GPIOG_APB_BASE
+#define GPIOH GPIOH_APB_BASE
+
+/* GPIO number definitions (for convenience) */
+#define GPIO0 (1 << 0)
+#define GPIO1 (1 << 1)
+#define GPIO2 (1 << 2)
+#define GPIO3 (1 << 3)
+#define GPIO4 (1 << 4)
+#define GPIO5 (1 << 5)
+#define GPIO6 (1 << 6)
+#define GPIO7 (1 << 7)
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+#define GPIO_DATA(port) ((volatile u32 *)(port + 0x000))
+#define GPIO_DIR(port) MMIO32(port + 0x400)
+#define GPIO_IS(port) MMIO32(port + 0x404)
+#define GPIO_IBE(port) MMIO32(port + 0x408)
+#define GPIO_IEV(port) MMIO32(port + 0x40c)
+#define GPIO_IM(port) MMIO32(port + 0x410)
+#define GPIO_RIS(port) MMIO32(port + 0x414)
+#define GPIO_MIS(port) MMIO32(port + 0x418)
+#define GPIO_ICR(port) MMIO32(port + 0x41c)
+#define GPIO_AFSEL(port) MMIO32(port + 0x420)
+#define GPIO_DR2R(port) MMIO32(port + 0x500)
+#define GPIO_DR4R(port) MMIO32(port + 0x504)
+#define GPIO_DR8R(port) MMIO32(port + 0x508)
+#define GPIO_ODR(port) MMIO32(port + 0x50c)
+#define GPIO_PUR(port) MMIO32(port + 0x510)
+#define GPIO_PDR(port) MMIO32(port + 0x514)
+#define GPIO_SLR(port) MMIO32(port + 0x518)
+#define GPIO_DEN(port) MMIO32(port + 0x51c)
+#define GPIO_LOCK(port) MMIO32(port + 0x520)
+#define GPIO_CR(port) MMIO32(port + 0x524)
+#define GPIO_AMSEL(port) MMIO32(port + 0x528)
+
+BEGIN_DECLS
+
+void gpio_set(u32 gpioport, u8 gpios);
+void gpio_clear(u32 gpioport, u8 gpios);
+
+END_DECLS
+
+#endif
diff --git a/include/libopencm3/lm4f/memorymap.h b/include/libopencm3/lm4f/memorymap.h
new file mode 100644
index 00000000..7e09a0bd
--- /dev/null
+++ b/include/libopencm3/lm4f/memorymap.h
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+#ifndef LM4F_MEMORYMAP_H
+#define LM4F_MEMORYMAP_H
+
+#include
+
+/* --- LM4F specific peripheral definitions ----------------------------- */
+
+#define GPIOA_APB_BASE (0x40004000)
+#define GPIOB_APB_BASE (0x40005000)
+#define GPIOC_APB_BASE (0x40006000)
+#define GPIOD_APB_BASE (0x40007000)
+#define GPIOE_APB_BASE (0x40024000)
+#define GPIOF_APB_BASE (0x40025000)
+#define GPIOG_APB_BASE (0x40026000)
+#define GPIOH_APB_BASE (0x40027000)
+
+#define GPIOA_BASE (0x40058000)
+#define GPIOB_BASE (0x40059000)
+#define GPIOC_BASE (0x4005A000)
+#define GPIOD_BASE (0x4005B000)
+#define GPIOE_BASE (0x4005C000)
+#define GPIOF_BASE (0x4005D000)
+#define GPIOG_BASE (0x4005E000)
+#define GPIOH_BASE (0x4005F000)
+
+#define UART0_BASE (0x4000C000)
+#define UART1_BASE (0x4000D000)
+#define UART2_BASE (0x4000E000)
+#define UART3_BASE (0x4000F000)
+#define UART4_BASE (0x40010000)
+#define UART5_BASE (0x40011000)
+#define UART6_BASE (0x40012000)
+#define UART7_BASE (0x40013000)
+
+#define SYSCTL_BASE (0x400FE000)
+
+#endif
diff --git a/include/libopencm3/lm4f/nvic.h b/include/libopencm3/lm4f/nvic.h
new file mode 100644
index 00000000..d29ea9cf
--- /dev/null
+++ b/include/libopencm3/lm4f/nvic.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Alexandru Gagniuc
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+#ifndef LIBOPENCM3_LM3S_NVIC_H
+#define LIBOPENCM3_LM3S_NVIC_H
+
+#include
+
+/*
+ * The LM3S interrupt table applies to the LM4F as well.
+ * Some interrupt vectores marked as reserved in LM3S are used in LM4F, and some
+ * vectors in LM3S are marked reserved for LM4F. However, the common vectors are
+ * identical, and we can safely use the same interrupt table. Reserved vectors
+ * will never be triggered, so having them is perfectly safe.
+ */
+#include
+
+#endif /* LIBOPENCM3_LM3S_NVIC_H */
diff --git a/include/libopencm3/lm4f/systemcontrol.h b/include/libopencm3/lm4f/systemcontrol.h
new file mode 100644
index 00000000..af4b71f3
--- /dev/null
+++ b/include/libopencm3/lm4f/systemcontrol.h
@@ -0,0 +1,456 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Alexandru Gagniuc
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+#ifndef LM4F_SYSTEMCONTROL_H
+#define LM4F_SYSTEMCONTROL_H
+
+#include
+
+#define SYSCTL_DID0 MMIO32(SYSCTL_BASE + 0x000)
+#define SYSCTL_DID1 MMIO32(SYSCTL_BASE + 0x004)
+#define SYSCTL_PBORCTL MMIO32(SYSCTL_BASE + 0x030)
+#define SYSCTL_LDORCTL MMIO32(SYSCTL_BASE + 0x034)
+#define SYSCTL_RIS MMIO32(SYSCTL_BASE + 0x050)
+#define SYSCTL_IMC MMIO32(SYSCTL_BASE + 0x054)
+#define SYSCTL_MISC MMIO32(SYSCTL_BASE + 0x058)
+#define SYSCTL_RESC MMIO32(SYSCTL_BASE + 0x05C)
+#define SYSCTL_RCC MMIO32(SYSCTL_BASE + 0x060)
+#define SYSCTL_PLLCFG MMIO32(SYSCTL_BASE + 0x064)
+#define SYSCTL_GPIOHBCTL MMIO32(SYSCTL_BASE + 0x06C)
+#define SYSCTL_RCC2 MMIO32(SYSCTL_BASE + 0x070)
+#define SYSCTL_MOSCCTL MMIO32(SYSCTL_BASE + 0x07C)
+#define SYSCTL_DSLPCLKCFG MMIO32(SYSCTL_BASE + 0x144)
+#define SYSCTL_SYSPROP MMIO32(SYSCTL_BASE + 0x14C)
+#define SYSCTL_PIOSCCAL MMIO32(SYSCTL_BASE + 0x150)
+#define SYSCTL_PIOSCSTAT MMIO32(SYSCTL_BASE + 0x154)
+#define SYSCTL_PLLFREQ0 MMIO32(SYSCTL_BASE + 0x160)
+#define SYSCTL_PLLFREQ1 MMIO32(SYSCTL_BASE + 0x164)
+#define SYSCTL_PLLSTAT MMIO32(SYSCTL_BASE + 0x168)
+/* Peripheral present */
+#define SYSCTL_PPWD MMIO32(SYSCTL_BASE + 0x300)
+#define SYSCTL_PPTIMER MMIO32(SYSCTL_BASE + 0x304)
+#define SYSCTL_PPGPIO MMIO32(SYSCTL_BASE + 0x308)
+#define SYSCTL_PPDMA MMIO32(SYSCTL_BASE + 0x30C)
+#define SYSCTL_PPHIB MMIO32(SYSCTL_BASE + 0x314)
+#define SYSCTL_PPUART MMIO32(SYSCTL_BASE + 0x318)
+#define SYSCTL_PPSSI MMIO32(SYSCTL_BASE + 0x31C)
+#define SYSCTL_PPI2C MMIO32(SYSCTL_BASE + 0x320)
+#define SYSCTL_PPUSB MMIO32(SYSCTL_BASE + 0x328)
+#define SYSCTL_PPCAN MMIO32(SYSCTL_BASE + 0x334)
+#define SYSCTL_PPADC MMIO32(SYSCTL_BASE + 0x338)
+#define SYSCTL_PPACMP MMIO32(SYSCTL_BASE + 0x33C)
+#define SYSCTL_PPPWM MMIO32(SYSCTL_BASE + 0x340)
+#define SYSCTL_PPQEI MMIO32(SYSCTL_BASE + 0x344)
+#define SYSCTL_PPEEPROM MMIO32(SYSCTL_BASE + 0x358)
+#define SYSCTL_PPWTIMER MMIO32(SYSCTL_BASE + 0x35C)
+/* Peripheral software reset */
+#define SYSCTL_SRWD MMIO32(SYSCTL_BASE + 0x500)
+#define SYSCTL_SRTIMER MMIO32(SYSCTL_BASE + 0x504)
+#define SYSCTL_SRGPIO MMIO32(SYSCTL_BASE + 0x508)
+#define SYSCTL_SRDMA MMIO32(SYSCTL_BASE + 0x50C)
+#define SYSCTL_SRHIB MMIO32(SYSCTL_BASE + 0x514)
+#define SYSCTL_SRUART MMIO32(SYSCTL_BASE + 0x518)
+#define SYSCTL_SRSSI MMIO32(SYSCTL_BASE + 0x51C)
+#define SYSCTL_SRI2C MMIO32(SYSCTL_BASE + 0x520)
+#define SYSCTL_SRUSB MMIO32(SYSCTL_BASE + 0x528)
+#define SYSCTL_SRCAN MMIO32(SYSCTL_BASE + 0x534)
+#define SYSCTL_SRADC MMIO32(SYSCTL_BASE + 0x538)
+#define SYSCTL_SRACMP MMIO32(SYSCTL_BASE + 0x53C)
+#define SYSCTL_SRPWM MMIO32(SYSCTL_BASE + 0x540)
+#define SYSCTL_SRQEI MMIO32(SYSCTL_BASE + 0x544)
+#define SYSCTL_SREEPROM MMIO32(SYSCTL_BASE + 0x558)
+#define SYSCTL_SRWTIMER MMIO32(SYSCTL_BASE + 0x55C)
+/* Peripheral run mode clock gating control */
+#define SYSCTL_RCGCWD MMIO32(SYSCTL_BASE + 0x600)
+#define SYSCTL_RCGCTIMER MMIO32(SYSCTL_BASE + 0x604)
+#define SYSCTL_RCGCGPIO MMIO32(SYSCTL_BASE + 0x608)
+#define SYSCTL_RCGCDMA MMIO32(SYSCTL_BASE + 0x60C)
+#define SYSCTL_RCGCHIB MMIO32(SYSCTL_BASE + 0x614)
+#define SYSCTL_RCGCUART MMIO32(SYSCTL_BASE + 0x618)
+#define SYSCTL_RCGCSSI MMIO32(SYSCTL_BASE + 0x61C)
+#define SYSCTL_RCGCI2C MMIO32(SYSCTL_BASE + 0x620)
+#define SYSCTL_RCGCUSB MMIO32(SYSCTL_BASE + 0x628)
+#define SYSCTL_RCGCCAN MMIO32(SYSCTL_BASE + 0x634)
+#define SYSCTL_RCGCADC MMIO32(SYSCTL_BASE + 0x638)
+#define SYSCTL_RCGCACMP MMIO32(SYSCTL_BASE + 0x63C)
+#define SYSCTL_RCGCPWM MMIO32(SYSCTL_BASE + 0x640)
+#define SYSCTL_RCGCQEI MMIO32(SYSCTL_BASE + 0x644)
+#define SYSCTL_RCGCEEPROM MMIO32(SYSCTL_BASE + 0x658)
+#define SYSCTL_RCGCWTIMER MMIO32(SYSCTL_BASE + 0x65C)
+/* Peripheral sleep mode clock gating control */
+#define SYSCTL_SCGCWD MMIO32(SYSCTL_BASE + 0x700)
+#define SYSCTL_SCGCTIMER MMIO32(SYSCTL_BASE + 0x704)
+#define SYSCTL_SCGCGPIO MMIO32(SYSCTL_BASE + 0x708)
+#define SYSCTL_SCGCDMA MMIO32(SYSCTL_BASE + 0x70C)
+#define SYSCTL_SCGCHIB MMIO32(SYSCTL_BASE + 0x714)
+#define SYSCTL_SCGCUART MMIO32(SYSCTL_BASE + 0x718)
+#define SYSCTL_SCGCSSI MMIO32(SYSCTL_BASE + 0x71C)
+#define SYSCTL_SCGCI2C MMIO32(SYSCTL_BASE + 0x720)
+#define SYSCTL_SCGCUSB MMIO32(SYSCTL_BASE + 0x728)
+#define SYSCTL_SCGCCAN MMIO32(SYSCTL_BASE + 0x734)
+#define SYSCTL_SCGCADC MMIO32(SYSCTL_BASE + 0x738)
+#define SYSCTL_SCGCACMP MMIO32(SYSCTL_BASE + 0x73C)
+#define SYSCTL_SCGCPWM MMIO32(SYSCTL_BASE + 0x740)
+#define SYSCTL_SCGCQEI MMIO32(SYSCTL_BASE + 0x744)
+#define SYSCTL_SCGCEEPROM MMIO32(SYSCTL_BASE + 0x758)
+#define SYSCTL_SCGCWTIMER MMIO32(SYSCTL_BASE + 0x75C)
+/* Peripheral deep-sleep mode clock gating control */
+#define SYSCTL_DCGCWD MMIO32(SYSCTL_BASE + 0x800)
+#define SYSCTL_DCGCTIMER MMIO32(SYSCTL_BASE + 0x804)
+#define SYSCTL_DCGCGPIO MMIO32(SYSCTL_BASE + 0x808)
+#define SYSCTL_DCGCDMA MMIO32(SYSCTL_BASE + 0x80C)
+#define SYSCTL_DCGCHIB MMIO32(SYSCTL_BASE + 0x814)
+#define SYSCTL_DCGCUART MMIO32(SYSCTL_BASE + 0x818)
+#define SYSCTL_DCGCSSI MMIO32(SYSCTL_BASE + 0x81C)
+#define SYSCTL_DCGCI2C MMIO32(SYSCTL_BASE + 0x820)
+#define SYSCTL_DCGCUSB MMIO32(SYSCTL_BASE + 0x828)
+#define SYSCTL_DCGCCAN MMIO32(SYSCTL_BASE + 0x834)
+#define SYSCTL_DCGCADC MMIO32(SYSCTL_BASE + 0x838)
+#define SYSCTL_DCGCACMP MMIO32(SYSCTL_BASE + 0x83C)
+#define SYSCTL_DCGCPWM MMIO32(SYSCTL_BASE + 0x840)
+#define SYSCTL_DCGCQEI MMIO32(SYSCTL_BASE + 0x844)
+#define SYSCTL_DCGCEEPROM MMIO32(SYSCTL_BASE + 0x858)
+#define SYSCTL_DCGCWTIMER MMIO32(SYSCTL_BASE + 0x85C)
+/* Peripheral ready */
+#define SYSCTL_PRWD MMIO32(SYSCTL_BASE + 0xA00)
+#define SYSCTL_PRTIMER MMIO32(SYSCTL_BASE + 0xA04)
+#define SYSCTL_PRGPIO MMIO32(SYSCTL_BASE + 0xA08)
+#define SYSCTL_PRDMA MMIO32(SYSCTL_BASE + 0xA0C)
+#define SYSCTL_PRHIB MMIO32(SYSCTL_BASE + 0xA14)
+#define SYSCTL_PRUART MMIO32(SYSCTL_BASE + 0xA18)
+#define SYSCTL_PRSSI MMIO32(SYSCTL_BASE + 0xA1C)
+#define SYSCTL_PRI2C MMIO32(SYSCTL_BASE + 0xA20)
+#define SYSCTL_PRUSB MMIO32(SYSCTL_BASE + 0xA28)
+#define SYSCTL_PRCAN MMIO32(SYSCTL_BASE + 0xA34)
+#define SYSCTL_PRADC MMIO32(SYSCTL_BASE + 0xA38)
+#define SYSCTL_PRACMP MMIO32(SYSCTL_BASE + 0xA3C)
+#define SYSCTL_PRPWM MMIO32(SYSCTL_BASE + 0xA40)
+#define SYSCTL_PRQEI MMIO32(SYSCTL_BASE + 0xA44)
+#define SYSCTL_PREEPROM MMIO32(SYSCTL_BASE + 0xA58)
+#define SYSCTL_PRWTIMER MMIO32(SYSCTL_BASE + 0xA5C)
+/* =============================================================================
+ * System Control Legacy Registers
+ * ---------------------------------------------------------------------------*/
+#ifdef LM4F_LEGACY_SYSCTL
+#define SYSCTL_DC0 MMIO32(SYSCTL_BASE + 0x008)
+#define SYSCTL_DC1 MMIO32(SYSCTL_BASE + 0x010)
+#define SYSCTL_DC2 MMIO32(SYSCTL_BASE + 0x014)
+#define SYSCTL_DC3 MMIO32(SYSCTL_BASE + 0x018)
+#define SYSCTL_DC4 MMIO32(SYSCTL_BASE + 0x01C)
+#define SYSCTL_DC5 MMIO32(SYSCTL_BASE + 0x020)
+#define SYSCTL_DC6 MMIO32(SYSCTL_BASE + 0x024)
+#define SYSCTL_DC7 MMIO32(SYSCTL_BASE + 0x028)
+#define SYSCTL_DC8 MMIO32(SYSCTL_BASE + 0x02C)
+#define SYSCTL_SRCR0 MMIO32(SYSCTL_BASE + 0x040)
+#define SYSCTL_SRCR1 MMIO32(SYSCTL_BASE + 0x044)
+#define SYSCTL_SRCR2 MMIO32(SYSCTL_BASE + 0x048)
+#define SYSCTL_RCGC0 MMIO32(SYSCTL_BASE + 0x100)
+#define SYSCTL_RCGC1 MMIO32(SYSCTL_BASE + 0x104)
+#define SYSCTL_RCGC2 MMIO32(SYSCTL_BASE + 0x108)
+#define SYSCTL_SCGC0 MMIO32(SYSCTL_BASE + 0x110)
+#define SYSCTL_SCGC1 MMIO32(SYSCTL_BASE + 0x114)
+#define SYSCTL_SCGC2 MMIO32(SYSCTL_BASE + 0x118)
+#define SYSCTL_DCGC0 MMIO32(SYSCTL_BASE + 0x120)
+#define SYSCTL_DCGC1 MMIO32(SYSCTL_BASE + 0x124)
+#define SYSCTL_DCGC2 MMIO32(SYSCTL_BASE + 0x128)
+#define SYSCTL_DC9 MMIO32(SYSCTL_BASE + 0x190)
+#define SYSCTL_NVMSTAT MMIO32(SYSCTL_BASE + 0x1A0)
+#endif /* LM4F_LEGACY_SYSCTL */
+
+/* =============================================================================
+ * SYSCTL_DID0 values
+ * ---------------------------------------------------------------------------*/
+/** DID0 version */
+#define SYSCTL_DID0_VER_MASK (7 << 28)
+/** Device class */
+#define SYSCTL_DID0_CLASS_MASK (0xFF << 16)
+/** Major revision */
+#define SYSCTL_DID0_MAJOR_MASK (0xFF << 8)
+/** Minor revision */
+#define SYSCTL_DID0_MAJOR_MASK (0xFF << 8)
+
+/* =============================================================================
+ * SYSCTL_DID1 values
+ * ---------------------------------------------------------------------------*/
+/** DID1 version */
+#define SYSCTL_DID1_VER_MASK (0xF << 28)
+/** Family */
+#define SYSCTL_DID1_FAM_MASK (0xF << 24)
+/** Part number */
+#define SYSCTL_DID1_PARTNO_MASK (0xFF << 16)
+/** Pin count */
+#define SYSCTL_DID1_PINCOUNT_MASK (0x7 << 13)
+#define SYSCTL_DID1_PINCOUNT_28P (0x0 << 13)
+#define SYSCTL_DID1_PINCOUNT_48P (0x1 << 13)
+#define SYSCTL_DID1_PINCOUNT_100P (0x2 << 13)
+#define SYSCTL_DID1_PINCOUNT_64P (0x3 << 13)
+#define SYSCTL_DID1_PINCOUNT_144P (0x4 << 13)
+#define SYSCTL_DID1_PINCOUNT_157P (0x5 << 13)
+/** Temperature range */
+#define SYSCTL_DID1_TEMP_MASK (0x7 << 5)
+#define SYSCTL_DID1_TEMP_0_70 (0x0 << 5)
+#define SYSCTL_DID1_TEMP_M40_85 (0x1 << 5)
+#define SYSCTL_DID1_TEMP_M40_105 (0x2 << 5)
+/** Package */
+#define SYSCTL_DID1_PKG_MASK (0x3 << 5)
+#define SYSCTL_DID1_PKG_SOIC (0x0 << 5)
+#define SYSCTL_DID1_PKG_LQFP (0x1 << 5)
+#define SYSCTL_DID1_PKG_BGA (0x2 << 5)
+/** ROHS compliance */
+#define SYSCTL_DID1_ROHS (1 << 2)
+/** Qualification status */
+#define SYSCTL_DID1_QUAL_MASK (3 << 0)
+
+/* =============================================================================
+ * SYSCTL_PBORCTL values
+ * ---------------------------------------------------------------------------*/
+/** BOR interrupt or reset */
+#define SYSCTL_PBORCTL_BORIOR (1 << 1)
+
+/* =============================================================================
+ * SYSCTL_RIS values
+ * ---------------------------------------------------------------------------*/
+/** MOSC Power Up Raw Interrupt Status */
+#define SYSCTL_RIS_MOSCPUPRIS (1 << 8)
+/** USB PLL Lock Raw Interrupt Status */
+#define SYSCTL_RIS_USBPLLLRIS (1 << 7)
+/** PLL Lock Raw Interrupt Status */
+#define SYSCTL_RIS_PLLLRIS (1 << 6)
+/** Main Oscillator Failure Raw Interrupt Status */
+#define SYSCTL_RIS_MOFRIS (1 << 3)
+/** Brown-Out Reset Raw Interrupt Status */
+#define SYSCTL_RIS_BORRIS (1 << 1)
+
+/* =============================================================================
+ * SYSCTL_IMC values
+ * ---------------------------------------------------------------------------*/
+/** MOSC Power Up Raw Interrupt Status */
+#define SYSCTL_IMC_MOSCPUPIM (1 << 8)
+/** USB PLL Lock Raw Interrupt Status */
+#define SYSCTL_IMC_USBPLLLIM (1 << 7)
+/** PLL Lock Raw Interrupt Status */
+#define SYSCTL_IMC_PLLLIM (1 << 6)
+/** Main Oscillator Failure Raw Interrupt Status */
+#define SYSCTL_IMC_MOFIM (1 << 3)
+/** Brown-Out Reset Raw Interrupt Status */
+#define SYSCTL_IMC_BORIM (1 << 1)
+
+/* =============================================================================
+ * SYSCTL_MISC values
+ * ---------------------------------------------------------------------------*/
+/** MOSC Power Up Raw Interrupt Status */
+#define SYSCTL_MISC_MOSCPUPMIS (1 << 8)
+/** USB PLL Lock Raw Interrupt Status */
+#define SYSCTL_MISC_USBPLLLMIS (1 << 7)
+/** PLL Lock Raw Interrupt Status */
+#define SYSCTL_MISC_PLLLMIS (1 << 6)
+/** Main Oscillator Failure Raw Interrupt Status */
+#define SYSCTL_MISC_MOFMIS (1 << 3)
+/** Brown-Out Reset Raw Interrupt Status */
+#define SYSCTL_MISC_BORMIS (1 << 1)
+
+/* =============================================================================
+ * SYSCTL_RESC values
+ * ---------------------------------------------------------------------------*/
+/** MOSC Failure Reset */
+#define SYSCTL_RESC_MOSCFAIL (1 << 18)
+/** Watchdog Timer 1 Reset */
+#define SYSCTL_RESC_WDT1 (1 << 5)
+/** Software Reset */
+#define SYSCTL_RESC_SW (1 << 4)
+/** Watchdog Timer 0 Reset */
+#define SYSCTL_RESC_WDT0 (1 << 3)
+/** Brown-Out Reset */
+#define SYSCTL_RESC_BOR (1 << 2)
+/** Power-On Reset */
+#define SYSCTL_RESC_POR (1 << 1)
+/** External Reset */
+#define SYSCTL_RESC_EXT (1 << 0)
+
+/* =============================================================================
+ * SYSCTL_RCC values
+ * ---------------------------------------------------------------------------*/
+/** Auto Clock Gating */
+#define SYSCTL_RCC_ACG (1 << 27)
+/** System Clock Divisor */
+#define SYSCTL_RCC_SYSDIV_MASK (0xF << 23)
+/** Enable System Clock Divider */
+#define SYSCTL_RCC_USESYSDIV (1 << 22)
+/** Enable PWM Clock Divisor */
+#define SYSCTL_RCC_USEPWMDIV (1 << 20)
+/** PWM Unit Clock Divisor */
+#define SYSCTL_RCC_PWMDIV_MASK (0xF << 17)
+#define SYSCTL_RCC_PWMDIV_2 (0x0 << 17)
+#define SYSCTL_RCC_PWMDIV_4 (0x1 << 17)
+#define SYSCTL_RCC_PWMDIV_8 (0x2 << 17)
+#define SYSCTL_RCC_PWMDIV_16 (0x3 << 17)
+#define SYSCTL_RCC_PWMDIV_32 (0x4 << 17)
+#define SYSCTL_RCC_PWMDIV_64 (0x5 << 17)
+/** PLL Power Down */
+#define SYSCTL_RCC_PWRDN (1 << 13)
+/** PLL Bypass */
+#define SYSCTL_RCC_BYPASS (1 << 11)
+/** Crystal Value */
+#define SYSCTL_RCC_XTAL_MASK (0x1F << 6)
+#define SYSCTL_RCC_XTAL_4M (0x06 << 6)
+#define SYSCTL_RCC_XTAL_4M_096 (0x07 << 6)
+#define SYSCTL_RCC_XTAL_4M_9152 (0x08 << 6)
+#define SYSCTL_RCC_XTAL_5M (0x09 << 6)
+#define SYSCTL_RCC_XTAL_5M_12 (0x0A << 6)
+#define SYSCTL_RCC_XTAL_6M (0x0B << 6)
+#define SYSCTL_RCC_XTAL_6M_144 (0x0C << 6)
+#define SYSCTL_RCC_XTAL_7M_3728 (0x0D << 6)
+#define SYSCTL_RCC_XTAL_8M (0x0E << 6)
+#define SYSCTL_RCC_XTAL_8M_192 (0x0F << 6)
+#define SYSCTL_RCC_XTAL_10M (0x10 << 6)
+#define SYSCTL_RCC_XTAL_12M (0x11 << 6)
+#define SYSCTL_RCC_XTAL_12M_288 (0x12 << 6)
+#define SYSCTL_RCC_XTAL_13M_56 (0x13 << 6)
+#define SYSCTL_RCC_XTAL_14M_31818 (0x14 << 6)
+#define SYSCTL_RCC_XTAL_16M (0x15 << 6)
+#define SYSCTL_RCC_XTAL_16M_384 (0x16 << 6)
+#define SYSCTL_RCC_XTAL_18M (0x17 << 6)
+#define SYSCTL_RCC_XTAL_20M (0x18 << 6)
+#define SYSCTL_RCC_XTAL_24M (0x19 << 6)
+#define SYSCTL_RCC_XTAL_25M (0x1A << 6)
+/** Oscillator Source */
+#define SYSCTL_RCC_OSCSRC_MASK (0x3 << 4)
+#define SYSCTL_RCC_OSCSRC_MOSC (0x0 << 4)
+#define SYSCTL_RCC_OSCSRC_PIOSC (0x1 << 4)
+#define SYSCTL_RCC_OSCSRC_PIOSC_D4 (0x2 << 4)
+#define SYSCTL_RCC_OSCSRC_30K (0x3 << 4)
+/** Precision Internal Oscillator Disable */
+#define SYSCTL_RCC_IOSCDIS (1 << 1)
+/** Main Oscillator Disable */
+#define SYSCTL_RCC_MOSCDIS (1 << 0)
+
+/* =============================================================================
+ * SYSCTL_GPIOHBCTL values
+ * ---------------------------------------------------------------------------*/
+#define SYSCTL_GPIOHBCTL_PORTQ (1 << 14)
+#define SYSCTL_GPIOHBCTL_PORTP (1 << 13)
+#define SYSCTL_GPIOHBCTL_PORTN (1 << 12)
+#define SYSCTL_GPIOHBCTL_PORTM (1 << 11)
+#define SYSCTL_GPIOHBCTL_PORTL (1 << 10)
+#define SYSCTL_GPIOHBCTL_PORTK (1 << 9)
+#define SYSCTL_GPIOHBCTL_PORTJ (1 << 8)
+#define SYSCTL_GPIOHBCTL_PORTH (1 << 7)
+#define SYSCTL_GPIOHBCTL_PORTG (1 << 6)
+#define SYSCTL_GPIOHBCTL_PORTF (1 << 5)
+#define SYSCTL_GPIOHBCTL_PORTE (1 << 4)
+#define SYSCTL_GPIOHBCTL_PORTD (1 << 3)
+#define SYSCTL_GPIOHBCTL_PORTC (1 << 2)
+#define SYSCTL_GPIOHBCTL_PORTB (1 << 1)
+#define SYSCTL_GPIOHBCTL_PORTA (1 << 0)
+
+/* =============================================================================
+ * SYSCTL_RCC2 values
+ * ---------------------------------------------------------------------------*/
+/** RCC2 overides RCC */
+#define SYSCTL_RCC2_USERCC2 (1 << 31)
+/** Divide PLL as 400 MHz vs. 200 MHz */
+#define SYSCTL_RCC2_DIV400 (1 << 30)
+/** Auto Clock Gating */
+#define SYSCTL_RCC2_ACG (1 << 27)
+/** System Clock Divisor 2 */
+#define SYSCTL_RCC2_SYSDIV2_MASK (0xF << 23)
+/** Additional LSB for SYSDIV2 */
+#define SYSCTL_RCC2_SYSDIV2LSB (1 << 22)
+/** Power-Down USB PLL */
+#define SYSCTL_RCC2_USBPWRDN (1 << 14)
+/** PLL Power Down 2 */
+#define SYSCTL_RCC2_PWRDN2 (1 << 13)
+/** PLL Bypass 2 */
+#define SYSCTL_RCC2_BYPASS2 (1 << 11)
+/** Oscillator Source 2 */
+#define SYSCTL_RCC2_OSCSRC2_MASK (0x7 << 4)
+#define SYSCTL_RCC2_OSCSRC2_MOSC (0x0 << 4)
+#define SYSCTL_RCC2_OSCSRC2_PIOSC (0x1 << 4)
+#define SYSCTL_RCC2_OSCSRC2_PIOSC_D4 (0x2 << 4)
+#define SYSCTL_RCC2_OSCSRC2_30K (0x3 << 4)
+#define SYSCTL_RCC2_OSCSRC2_32K768 (0x7 << 4)
+
+/* =============================================================================
+ * SYSCTL_MOSCCTL values
+ * ---------------------------------------------------------------------------*/
+/** No Crystal Connected */
+#define SYSCTL_MOSCCTL_NOXTAL (1 << 2)
+/** MOSC Failure Action */
+#define SYSCTL_MOSCCTL_MOSCIM (1 << 1)
+/** Clock Validation for MOSC */
+#define SYSCTL_MOSCCTL_CVAL (1 << 0)
+
+/* =============================================================================
+ * SYSCTL_DSLPCLKCFG values
+ * ---------------------------------------------------------------------------*/
+/*TODO*/
+
+/* =============================================================================
+ * SYSCTL_SYSPROP values
+ * ---------------------------------------------------------------------------*/
+/** FPU present */
+#define SYSCTL_SYSPROP_FPU (1 << 0)
+
+/* =============================================================================
+ * SYSCTL_PIOSCCAL values
+ * ---------------------------------------------------------------------------*/
+/** Use User Trim Value */
+#define SYSCTL_PIOSCCAL_UTEN (1 << 31)
+/** Start calibration */
+#define SYSCTL_PIOSCCAL_CAL (1 << 9)
+/** Update trim */
+#define SYSCTL_PIOSCCAL_UPDATE (1 << 8)
+/** User Trim Value */
+#define SYSCTL_PIOSCCAL_UT_MASK (0x7F << 0)
+
+/* =============================================================================
+ * SYSCTL_PIOSCSTAT values
+ * ---------------------------------------------------------------------------*/
+/** Default Trim Value */
+#define SYSCTL_PIOSCSTAT_DT_MASK (0x7F << 16)
+/** Calibration result */
+#define SYSCTL_PIOSCSTAT_RESULT_MASK (0x3 << 8)
+/** Calibration Trim Value */
+#define SYSCTL_PIOSCSTAT_CT_MASK (0x7F << 0)
+/* =============================================================================
+ * SYSCTL_PLLFREQ0 values
+ * ---------------------------------------------------------------------------*/
+/** PLL M fractional value */
+#define SYSCTL_PLLFREQ0_MFRAC_MASK (0x3FF << 10)
+/** PLL M integer value */
+#define SYSCTL_PLLFREQ0_MINT_MASK (0x3FF << 0)
+
+/* =============================================================================
+ * SYSCTL_PLLFREQ1 values
+ * ---------------------------------------------------------------------------*/
+/** PLL Q value */
+#define SYSCTL_PLLFREQ1_Q_MASK (0x1F << 8)
+/** PLL N value */
+#define SYSCTL_PLLFREQ1_N_MASK (0x1F << 0)
+
+/* =============================================================================
+ * SYSCTL_PLLSTAT values
+ * ---------------------------------------------------------------------------*/
+/** PLL lock */
+#define SYSCTL_PLLSTAT_LOCK (1 << 0)
+
+#endif /* LM4F_SYSTEMCONTROL_H */
+
+
+
diff --git a/lib/dispatch/vector_nvic.c b/lib/dispatch/vector_nvic.c
index 33104eb2..182de4c8 100644
--- a/lib/dispatch/vector_nvic.c
+++ b/lib/dispatch/vector_nvic.c
@@ -23,7 +23,8 @@
#elif defined(LPC43XX)
# include "../lpc43xx/vector_nvic.c"
-#elif defined(LM3S)
+#elif defined(LM3S) || defined(LM4F)
+/* Yes, we use the same interrupt table for both LM3S and LM4F */
# include "../lm3s/vector_nvic.c"
#else
diff --git a/lib/lm4f/Makefile b/lib/lm4f/Makefile
new file mode 100644
index 00000000..8f4c1519
--- /dev/null
+++ b/lib/lm4f/Makefile
@@ -0,0 +1,35 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see .
+##
+
+LIBNAME = libopencm3_lm4f
+
+PREFIX ?= arm-none-eabi
+#PREFIX ?= arm-elf
+CC = $(PREFIX)-gcc
+AR = $(PREFIX)-ar
+CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \
+ -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -Wstrict-prototypes \
+ -ffunction-sections -fdata-sections -MD -DLM4F
+# ARFLAGS = rcsv
+ARFLAGS = rcs
+OBJS = gpio.o vector.o assert.o
+
+VPATH += ../cm3
+
+include ../Makefile.include
diff --git a/lib/lm4f/gpio.c b/lib/lm4f/gpio.c
new file mode 100644
index 00000000..2d50116a
--- /dev/null
+++ b/lib/lm4f/gpio.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+#include
+
+void gpio_set(u32 gpioport, u8 gpios)
+{
+ /* ipaddr[9:2] mask the bits to be set, hence the array index */
+ GPIO_DATA(gpioport)[gpios] = 0xff;
+}
+
+void gpio_clear(u32 gpioport, u8 gpios)
+{
+ GPIO_DATA(gpioport)[gpios] = 0;
+}
diff --git a/lib/lm4f/libopencm3_lm4f.ld b/lib/lm4f/libopencm3_lm4f.ld
new file mode 100644
index 00000000..12d939e2
--- /dev/null
+++ b/lib/lm4f/libopencm3_lm4f.ld
@@ -0,0 +1,2 @@
+/* Yes, we can simply use the lm3s linker script */
+INCLUDE "libopencm3_lm3s.ld"