stm32f1: rcc: timer 15,16,27 rcc bits missing for old style
The bits definitions for direct manipulation were missing, and should be present for completeness. However, this only affects the legacy (error prone) API, replaced some time ago. old and error prone: (stop using code like this) rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM16EN); rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_TIM16RST); new: rcc_periph_clock_enable(RCC_TIM16); rcc_periph_reset_{pulse,hold,release}(RCC_TIM16); Fixes github issue #361
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@ -289,6 +289,9 @@
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@ingroup STM32F1xx_rcc_defines
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@{*/
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#define RCC_APB2RSTR_TIM17RST (1 << 18)
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#define RCC_APB2RSTR_TIM16RST (1 << 17)
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#define RCC_APB2RSTR_TIM15RST (1 << 16)
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#define RCC_APB2RSTR_ADC3RST (1 << 15) /* (XX) */
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#define RCC_APB2RSTR_USART1RST (1 << 14)
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#define RCC_APB2RSTR_TIM8RST (1 << 13) /* (XX) */
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@ -362,6 +365,9 @@
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@ingroup STM32F1xx_rcc_defines
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@{*/
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#define RCC_APB2ENR_TIM17EN (1 << 17)
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#define RCC_APB2ENR_TIM16EN (1 << 16)
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#define RCC_APB2ENR_TIM15EN (1 << 16)
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#define RCC_APB2ENR_ADC3EN (1 << 15) /* (XX) */
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#define RCC_APB2ENR_USART1EN (1 << 14)
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#define RCC_APB2ENR_TIM8EN (1 << 13) /* (XX) */
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