Guillaume Revaillot
1ab0d2445f
stm32l0: NVIC: channel 16 is tim3 on stm32l0x0, stm32l0x1 and stm32l0x2.
...
tim3 interrupt is wired to nvic channel 16 if present.
2018-03-08 10:25:34 +01:00
Karl Palsson
1379ab4777
stm32l4: enable common exti functionality
...
tested on l476 disco board.
2018-03-04 00:02:44 +00:00
Karl Palsson
8feb711ca0
stm32l0:rcc: add rcc_set_pll_source() as per L1
...
reported by: kaeipnos in https://github.com/libopencm3/libopencm3/pull/609
2018-03-02 22:42:05 +00:00
Frantisek Burian
28aa1e57e9
[ETH/PHY] Add support for STE100 PHY used on some boards from ST
2018-03-02 22:42:05 +00:00
Frantisek Burian
67c2f19d19
[ETH/PHY] Add support for LAN87XX family of PHYs
2018-03-02 22:42:05 +00:00
Frantisek Burian
c2c2ac766b
[eth/phy] Updated style
2018-03-02 22:42:05 +00:00
Karl Palsson
54b117c5a5
usb: Use enumerated return codes
...
The enum usbd_request_return_codes has been available for some time. It
should be used internally, not just by users of this code.
2018-03-02 22:42:05 +00:00
Karl Palsson
93cf76b9d1
stm32l1: syscfg: add USB pullup control definition
...
On original stm32l1s, this internal pullup was out of spec, and not
recommended for use. But the -A parts have this fixed, so make sure we
can use it.
2018-03-02 22:42:05 +00:00
Sebastian Holzapfel
995d19ebfd
efm32hg: usb: add usb support
2018-03-02 22:42:05 +00:00
Sebastian Holzapfel
a2ee90fbfe
usb: stm32fx07 -> usb_dwc_common
...
The stm32fx07 is common DesignWare IP, used in both STM32 and EFM32 chips.
Rename the files to make this more clear, and easier to use in other
targets.
2018-03-02 22:42:05 +00:00
Sebastian Holzapfel
3c855e75d1
efm32hg: cmu: add updated cmu implementation based on efm32lg
2018-03-02 22:42:05 +00:00
Sebastian Holzapfel
18f64812eb
efm32hg/lg: timer: use common timer implementation
2018-03-02 22:42:04 +00:00
Sebastian Holzapfel
b0fdbe2aea
efm32hg/lg: wdog: use common wdog implementation
2018-03-02 22:42:04 +00:00
Sebastian Holzapfel
c6296a4d88
efm32hg/lg: gpio: use common gpio implementation
2018-03-02 22:42:04 +00:00
Sebastian Holzapfel
fd28881559
efm32hg: add memory map
2018-03-02 22:42:04 +00:00
Sebastian Holzapfel
a86948ec6e
efm32hg: add basic makefile, interrupts, device information
2018-03-02 22:42:04 +00:00
Christian Tacke
a1264f5065
stm32l4: usart: Fix USART3 definition/typo
...
USART*3* should point to *3* not *2*.
2018-02-26 12:53:42 +00:00
Bruno Randolf
ec748dc895
stm32:l4: Add SYSCFG definitions
...
From RM0394 and RM0351
2018-02-13 23:57:43 +00:00
Bruno Randolf
b438edf45d
stm32:l4: Add SPI
...
Same as F3, tested
2018-02-13 23:57:43 +00:00
Bruno Randolf
075ef82a4b
stm32:l4: Enable USB FS support
...
Reviewed against RM0394 and tested with STM32L433CC.
Aparently some other L4 have USB OTG.
2018-02-13 23:57:42 +00:00
Bruno Randolf
de39ab1584
stm32:l4: Add CRS
...
Reviewed against RM0394, untested
2018-02-13 23:57:42 +00:00
Bruno Randolf
2dd4655aed
stm32:l4: rcc: Add CLK48SEL HSI48
...
This is not NONE on the L4 but HSI48.
Reviewed against RM0394 and RM0351.
2018-02-13 23:57:42 +00:00
Bruno Randolf
f2c629c4ff
stm32:l4: rcc: Add support for HSI48 clock
2018-02-13 23:57:42 +00:00
Bruno Randolf
0cd92c31d6
stm32:l4: Add RTC
...
Use common, some additional registers missing
2018-02-13 23:57:42 +00:00
Bruno Randolf
c90c9fe801
stm32:l4: Add IWDG
...
Same as F3, reviewed against RM0394, tested
2018-02-13 23:57:42 +00:00
Karl Palsson
55ea31fd04
stm32l4: crc-v2: enable common code
...
Possible now that the v2 unification code has landed.
2018-02-13 23:57:42 +00:00
Bruno Randolf
7b6710a914
stm32:l4: Add DMA
...
Same as L1 according to L1-L4 migration guide, untested
2018-02-13 23:57:42 +00:00
Karl Palsson
316c33a6a3
stm32: crc-v2: tweak doxygen output
...
Make it group better and include labels
2018-02-13 23:57:42 +00:00
Gregory Schlomoff
88ca8058aa
ethernet: Add missing BEGIN_DECLS / END_DECLS
2018-02-13 23:57:42 +00:00
Gregory Schlomoff
329b611e4f
stm32: ethernet, flash: tagging some function arguments as const
2018-02-13 23:57:42 +00:00
Grigory Revzin
9ef5860863
stm32: can: removed canport argument from can_filter functions
2018-02-13 23:57:42 +00:00
Karl Palsson
0965e691a9
stm32f2/f4: rcc: deprecate old IO definitions
...
instead of hard breaking, provide them as macros pointing to the new
values, and document them as deprecated.
2018-02-13 23:57:41 +00:00
Yonghua Zheng
eeef996cb0
[BREAKING] rcc: change gpio bit defines to be consistent with reference manual
...
This _breaks_ your gpio code for F2 and F4. It makes them consistent
with the reference manual, and more consistent with all other families
and general expectations.
OLD code -> NEW code
RCC_AHB1RSTR_IOPxRST -> RCC_AHB1RSTR_GPIOxRST
RCC_AHB1ENR_IOPIxEN -> RCC_AHB1ENR_GPIOxEN
RCC_AHB1LPENR_IOPxLPEN -> RCC_AHB1LPENR_GPIOxLPEN
[We're not actually breaking it, see the next commit for deprecated
aliases]
2018-02-13 23:57:21 +00:00
Cem Basoglu
34f57ae06e
stm32: crc-v2: STM32F0/3 extended crc unit
...
Implementation of extended crc unit in f0 and f3
2018-02-13 23:57:21 +00:00
Karl Palsson
6580721fd1
doc: stm32 can: fix missing doxygen group
2018-02-13 23:05:21 +00:00
Karl Palsson
67d1a63412
doc: stm32:gpio: fix invalid doxygen
...
Just reduces more doxygen warnings, and adds more helpful text.
2018-02-13 23:05:21 +00:00
King Kévin
3922cc7d3e
STM32: add MASK defines in sdio.h
2018-01-08 11:18:38 +00:00
Karl Palsson
ed90df85f0
stm32:i2c-v2: Clarify digital filter setting
...
Drop redundant field definitions, fix truncation of argument bug and add
documentation.
Fixes: https://github.com/libopencm3/libopencm3/issues/831
2018-01-08 11:16:24 +00:00
WGH
f59d47cbd1
docs: usb: clarify usbd_register_control_callback()
...
Expand notes on when the control callbacks must be registered.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-01-04 17:01:48 +00:00
Yonghua Zheng
580a2a4a63
stm32f7: usart: enable usart peripheral
...
Add usart-v2 to stm32f7 to provide usart support in f7 series.
2017-12-07 10:59:32 +00:00
Karl Palsson
ef04708e92
stm32: pwr-v1: doxygen-ize bit definitions.
...
Rich commentary already existed, just add the second * to let doxygen
pick it up.
2017-12-07 10:33:09 +00:00
Karl Palsson
297d996fa0
stm32f3: pwr: drop duplicate definitions
...
These definitions were in the already included pwr_common_v1.h file.
And add extra WKUP bit definitions.
2017-12-07 10:33:09 +00:00
Damien Nicolet
19d296dd7b
stm32f4: qspi: Typo correction in QUADSPI_ABR
2017-11-16 23:57:11 +00:00
Karl Palsson
368a33773f
stm32:l4: usart: add missing header
...
Fixes: f6796604 stm32:l4: enable usart peripheral
2017-11-10 18:02:14 +00:00
Karl Palsson
f67966046a
stm32:l4: enable usart peripheral
...
Tests in https://github.com/karlp/libopencm3-tests/tree/master/tests/uart-basic
2017-10-25 23:54:32 +00:00
Karl Palsson
c119ee7f9a
stm32:l0: enable usart peripheral
...
Now that the usart-v2 peripheral is extracted cleanly, adding it for l0
is very simple.
2017-10-25 23:26:52 +00:00
Karl Palsson
a23d65e7dd
stm32: usart-v2: pull up remaining f3/f0 defns
...
Final chunk of register definitions to be pulled up.
Now the "target" files are _only_ defining the list of u(s)arts
available, and any _specific_ functions for that target.
2017-10-25 23:03:48 +00:00
Karl Palsson
b20d0ff1fb
stm32: usart-v2: pull up CR2 register values from f0/f3
...
Just small pieces at a time to make it easy to see what's happening.
Taking definitions currently implemented in both f0/f3 headers and
making combined, documented versions in the -v2 header.
2017-10-25 22:57:18 +00:00
Karl Palsson
670a7cd83e
stm32f0: use usart-v2 instead of private usart
...
Use the usart-common base plus the usart-v2 code, instead of private
implementations. Less code, more common apis across targets.
Of note is the trick to make F0 look like it has an APB2 bus. It's the
only stm32 that doesn't have a documented APB2 bus, but still has
peripherals enabled via an "APB2" register, and they match how other
targets have an APB2. Simply make APB2 an alias of APB1, as it's only
used for clock speed detection.
2017-10-25 22:55:10 +00:00
Karl Palsson
9d709e52b4
stm32: usart: move USARTX definitions to target/version specific
...
Instead of declaring that _every_ device has USART1,2,3 and UART4,5, let
the targets themselves define what periphs they do, along with their
USARTx_BASE defines, and let the common headers just have the common
abstractions.
2017-10-25 22:55:09 +00:00