5 Commits

Author SHA1 Message Date
Piotr Esden-Tempski
a909b5ca9e [Style] Global style fix run. 2014-01-03 01:07:30 +01:00
BuFran
6570f6eb07 Fix the order of ADC injected channel list
According to RM0090, page 301, paragraph 11.13.12 Note. (For F4, for F1 and F3 is it in the corresponding manuals)

The JSQR are filled always ending at SQR4 ie for those lists we must set this list:

(A)       ->                               JSQ4 = A,
(A,B)     ->                     JSQ3 = A, JSQ4 = B,
(A,B,C)   ->           JSQ2 = A, JSQ3 = B, JSQ4 = C,
(A,B,C,D) -> JSQ1 = A, JSQ2 = B, JSQ3 = C, JSQ4 = D,

The readed values are in correct order, starting from JDR1:

(A)       -> JDR1 = A,
(A,B)     -> JDR1 = A, JDR2 = B,
(A,B,C)   -> JDR1 = A, JDR2 = B, JDR3 = C,
(A,B,C,D) -> JDR1 = A, JDR2 = B, JDR3 = C, JDR4 = D,
2013-12-04 22:03:23 +00:00
BuFran
d63bf5ac64 [STM32F3:doc] Add doxygen documentation page to output 2013-08-22 23:08:52 -07:00
Piotr Esden-Tempski
62e6635992 [Style] Fixed style in the newly added F3 code. 2013-07-07 16:01:52 -07:00
Federico Ruiz Ugalde
0a39eab19a Missing files for adc stm32f3 support added. 2013-07-07 16:01:47 -07:00