7 Commits

Author SHA1 Message Date
Karl Palsson
3cc6ecd203 doc: stm32l1: exclude unshared common code
Fixes Github issue #458
Fixes Github issue #300
2016-08-18 23:51:32 +00:00
Karl Palsson
33a2d057f4 doc: exclude CRS from f1, f2, f3, f4, l1 2015-10-15 00:13:33 +00:00
Ken Sarkies
3c6e9fd56d Fix a number of top level doxygen issues.
So that the navigation pane works correctly in browsers.
Some additional doc fixes put in where found (but many more still to go).
Added some dummy .c and .h files to bring the associated docs into line.
makefile changed to allow 'make html' as well as 'make doc' (the latter only does html anyway).
2014-01-15 22:19:52 +01:00
Ken Sarkies
f5c9bdfe61 Changes to doxygen markup to solve a few problems that upset
doxygen, and to correct minor errors.
2013-06-02 18:17:49 -07:00
Ken Sarkies
5b8953124e This mainly moves the STM32 timers' code to the common area.
F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only)
L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files

Note that F3 and F05 timers should fit into this scheme, with F3 having additional features.

Bundled with this is L1/pwr.h to change a documentation setting
Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
2013-03-09 14:39:01 +10:30
Ken Sarkies
7ec382c7d5 STM32: Moved SPI code into the common area.
Updated the documentation so that it appears in all families
Also added it to the L1 area, but is untested. An addition to the memorymap
allows commonality and a #ifdef added to the spi_common_all code to
exclude the case of SPI3 for L1 and F0 as SPI3 doesn't exist in those.
An rcc dispatch header was added to remove same code from the spi header.
2013-01-08 19:48:52 +10:30
Ken Sarkies
35c0863a75 Documentation updates 2012-11-12 21:44:52 +10:30