18 Commits

Author SHA1 Message Date
Karl Palsson
4e70d06d63 stm32g4: Add basic support
* memorymap
* vectors
* rcc
* gpios
* makefiles
* devices for linker script generation
* doc structure
2020-04-09 23:29:00 +00:00
Brian Viele
53302439df stm32h7: Initial introduction into libopencm3.
Updates to a base set of includes to map to the h7 include files which are
mainly based on the f7 versions for simple devices (e.g. SPI, USART, GPIO).

Custom files that have been implemented from the datasheet/ref manual include
the memory map, RCC, PWR definitions, and irq.json file for generation of
nvic files for interrupt mapping.

Additional functionality, especially PLL and tweaks for non-F7 compatible
implementations coming in future commits.

Added documentation tree configuration.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Changed dmaX_streamX to dmaX_strX in a few places for consistency
2019-11-28 22:15:24 +00:00
Guillaume Revaillot
afd2db3097 stm32g0: add rcc. 2019-05-21 00:05:22 +00:00
Icenowy Zheng
330d5fd5be gd32: add new chip series f1x0
GD32F1X0 (X can be 3, 5, 7 and 9) is a series of Cortex-M3 MCUs by
GigaDevice, which features pin-to-pin package compatibility with
STM32F030 MCU line. F150 adds USB support to F130, and F170/F190 adds
CAN support.

Currently the code mainly targets GD32F130 and F150 chips. Some register
are different between F130/150 and F170/190, just like the difference
between STM32F1 Performance line and Connectivity line.

From the perspective of registers and memory map, GD32F1X0 seems like a
mixture between STM32F1 and STM32F0 (because it is designed to be
pin-to-pin compatible with F0, but with Cortex-M3 like F1). A bunch of
code are shared between STM32 and GD32, and these code are specially
processed to include the GD32 headers instead of STM32 headers when meet
GD32F1X0.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
gd32/rcc.[ch] are forks of stm32f1/rcc
gd32/flash.[ch] are forks of stm32f0/flash
No attempts at deduplicating this have been done at this stage.  We can
see where they move in the future.
2019-04-03 12:53:33 +00:00
Matthew Lai
62b58555e2 stm32: rcc: added missing ifdef for STM32F7 in rcc 2017-02-28 16:57:20 +00:00
Karl Palsson
5bf61c537f trivial: stop referring to STM32F when we mean all 2017-01-10 23:06:59 +00:00
Karl Palsson
8afc983f3e stm32l4: Add RCC definitions
Bring in the core common code, and now that it's used, pull in the common
memorymap
2015-11-13 01:15:17 +00:00
Karl Palsson
378069091a stm32:l0: Add RCC register definitions
Tested with a miniblink example on the l053 discovery board.

Only register definitions at this stage, no helpers.
Register definitions from RM0367r2, hopefully the biggest
superset of L0 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2014-12-03 11:13:39 +00:00
Ken Sarkies
7816501dbc Changes to the header includes for all STM32 peripherals
to remove variations, redundancies, add missing, fix errors. All c files
refer only to the dispatch style headers in /include/stm32. Those headers
#include memorymap.h and cm3/common.h. All references to
these are removed from the family specific headers. Ethernet untouched as
it appears incomplete.

Added dummy spi.c for F0/F3. Fix some doxygen anomalies.
2014-03-11 16:40:31 +00:00
BuFran
18c4d299c1 [STM32F0] Add preliminary support for the family 2013-08-22 17:18:35 -07:00
Federico Ruiz Ugalde
be841154a9 i2c support added.
Most of the changes went to i2c_common_all.h file.
F3 is considerably different than all the other in i2c.
2013-07-07 16:01:47 -07:00
Ken Sarkies
7ec382c7d5 STM32: Moved SPI code into the common area.
Updated the documentation so that it appears in all families
Also added it to the L1 area, but is untested. An addition to the memorymap
allows commonality and a #ifdef added to the spi_common_all code to
exclude the case of SPI3 for L1 and F0 as SPI3 doesn't exist in those.
An rcc dispatch header was added to remove same code from the spi header.
2013-01-08 19:48:52 +10:30
Fergus Noble
18648708c8 Moving renaming stm32 header files for f1 series. 2011-10-12 22:13:01 -04:00
Piotr Esden-Tempski
149c0c7dc0 Added missing 12mhz to 72mhz rcc setup routine prototype. 2011-03-15 11:27:28 -07:00
Piotr Esden-Tempski
3d20f37b27 RCC now has two variables to hold the current apb1 and apb2 frequency. 2011-03-11 19:49:23 -08:00
Gareth McMullin
554feb7f27 USB driver for Connectivity-line devices partially working. 2011-02-20 12:28:23 +13:00
Uwe Hermann
0a0ce22762 Add rcc_clock_setup_in_hse_8mhz_out_24mhz().
Thanks Marko Kraljevic <krasnaya.zvezda@gmail.com> for the patch!
2011-02-09 02:48:51 +01:00
Uwe Hermann
8f251e8a9d Some more file/path restructuring.
All #includes now explicitly use the "<libopencm3/stm32/rcc.h>" format.
If you want to get rid of the "libopencm3" prefix in your local project you
can add a respective -I entry in your Makefile (not recommended though).

All .ld files and .a libs are installed in $(TOOLCHAIN_DIR)/lib
directly (as before), but are now renamed to avoid potential
conflicts now or in the future. Examples:

  libopencm3_lpc13xx.a
  libopencm3_lpc13xx.ld
  libopencm3_stm32.a
  libopencm3_stm32.ld
2010-12-31 18:18:39 +01:00