4 Commits

Author	SHA1	Message	Date
Uwe Bonnes	54f73858f9	Provide a target function to write with given size.	2018-06-16 13:30:08 +02:00
Gareth McMullin	c53a12bfd1	cortexm: Better cache support for Cortex-M7 ... - On probe, read CTR for cache presence and minimum line length - Make D-Cache clean a function - Clean before memory reads - Clean and invalidate before memory writes - Flush all I-Cache before resume	2017-10-12 09:26:01 +13:00
Nick Downing	0e5b3ab00e	Make Cortex M driver write DCCIMVAC (Data cache clean and invalidate by address to the PoC=Point of Coherency) prior to reading or writing each 32 bytes of RAM	2017-10-12 08:41:58 +13:00
Gareth McMullin	b494279fe5	Move target files into separate directory.	2016-07-13 08:31:09 +12:00